diff --git a/overlay/Makefile b/overlay/Makefile index e30210a..1b71a4a 100644 --- a/overlay/Makefile +++ b/overlay/Makefile @@ -10,6 +10,8 @@ dtbo-y += tegra234-p3737-0000+p3701-0000.dtbo dtbo-y += tegra234-jetson.dtbo dtbo-y += tegra234-carveouts.dtbo dtbo-y += tegra234-audio-overlay.dtbo +dtbo-y += tegra234-p3768-0000+p3767-0000.dtbo +dtbo-y += tegra234-p3767-overlay.dtbo ifneq ($(dtb-y),) dtb-y := $(addprefix $(makefile-path)/,$(dtb-y)) diff --git a/overlay/tegra234-p3767-0000.dtsi b/overlay/tegra234-p3767-0000.dtsi new file mode 100644 index 0000000..f74b910 --- /dev/null +++ b/overlay/tegra234-p3767-0000.dtsi @@ -0,0 +1,42 @@ +// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include + +/ { + p3767-0000-fragment@0 { + target-path = "/"; + + __overlay__ { + bus@0 { + pinmux: tegra_pinctrl: pinmux@2430000 { + compatible = "nvidia,tegra234-pinmux"; + reg = <0x0 0x2430000 0x0 0x19100>, + <0x0 0xc300000 0x0 0x4000>; + #gpio-range-cells = <3>; + status = "okay"; + }; + mmc@3400000 { + no-sdio; + no-mmc; + nvidia,cd-wakeup-capable; + nvidia,boot-detect-delay = <1000>; + cd-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>; + }; + }; + + reserved-memory { + linux,cma { /* Needed for nvgpu comptags */ + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x10000000>; /* 256MB */ + alignment = <0x0 0x10000>; + linux,cma-default; + status = "okay"; + }; + }; + }; + }; +}; diff --git a/overlay/tegra234-p3767-overlay.dts b/overlay/tegra234-p3767-overlay.dts new file mode 100644 index 0000000..6d4e950 --- /dev/null +++ b/overlay/tegra234-p3767-overlay.dts @@ -0,0 +1,58 @@ +// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// SPDX-License-Identifier: GPL-2.0-only + +/dts-v1/; +/plugin/; + +/ { + overlay-name = "Tegra234 P3767 Overlay"; + + p3767-overlay-fragment@0 { + target-path = "/bus@0/host1x@13e00000"; + board_config { + fuse-info = "fuse-disable-nvenc"; + }; + __overlay__ { + nvenc@154c0000 { + status = "disabled"; + }; + }; + }; + + p3767-overlay-fragment@1 { + target-path = "/bus@0/host1x@13e00000"; + board_config { + fuse-info = "fuse-disable-pva"; + }; + __overlay__ { + pva0@16000000 { + status = "disabled"; + }; + }; + }; + + p3767-overlay-fragment@2 { + target-path = "/bus@0/host1x@13e00000"; + board_config { + fuse-info = "fuse-disable-dla0"; + }; + __overlay__ { + nvdla0@15880000 { + status = "disabled"; + }; + }; + }; + + p3767-overlay-fragment@3 { + target-path = "/bus@0/host1x@13e00000"; + board_config { + fuse-info = "fuse-disable-dla1"; + }; + __overlay__ { + nvdla1@158c0000 { + status = "disabled"; + }; + }; + }; + +}; diff --git a/overlay/tegra234-p3768-0000+p3767-0000.dts b/overlay/tegra234-p3768-0000+p3767-0000.dts new file mode 100644 index 0000000..c4e8626 --- /dev/null +++ b/overlay/tegra234-p3768-0000+p3767-0000.dts @@ -0,0 +1,11 @@ +// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +// SPDX-License-Identifier: GPL-2.0-only + +/dts-v1/; +/plugin/; + +#include "tegra234-p3767-0000.dtsi" + +/ { + overlay-name = "Tegra234 P3768-0000+P3767-0000 Overlay"; +};