overlay: Add safety dts for hope devkit

Add safety dts support for the hope devkit. The safety extension package
(SEP) includes safety dtb with below addition from non-safety dts.
- Requires SPI3 to communicate to SMCU as client device
- Requires hsp@1600000 instance to talk to FSI
- Requires FSI communication nodes for userspace safety apps

Why changes in the existing fsicom dtsi file:
- safety dts leverages fsicom dtsi
- fsicom_client label and node name are same which gives issue during
the compile time
- Added epl kernel node which is required for the Error propagation
library feature.

Bug 4122084
Bug 4128263

Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Change-Id: Ied29a993ab7f9141a3688b33c064721dfbbdff2b
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2907719
(cherry picked from commit bf73d28760 in dev-main)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2927947
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>

overlay/Makefile

@@ -15,6 +15,7 @@ dtbo-y += tegra234-carveouts.dtbo
 dtbo-y += tegra234-jetson.dtbo
 dtbo-y += tegra234-p3737-0000+p3701-0000.dtbo
 dtbo-y += tegra234-p3740-0002+p3701-0008.dtbo
+dtbo-y += tegra234-p3740-0002+p3701-0008-safety.dtbo
 dtbo-y += tegra234-p3768-0000+p3767-0000.dtbo
 
 ifneq ($(dtb-y),)

overlay/tegra234-p3740-0002+p3701-0008-safety.dts

@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+
+
+/dts-v1/;
+/plugin/;
+
+#include "tegra234-soc-safetyservice-fsicom.dtsi"
+
+/ {
+	compatible = "nvidia,p3740-0002+p3701-0008-safety";
+
+	fragment-t234-p3740-p3701-safety@0 {
+		target-path = "/";
+		__overlay__ {
+			bus@0 {
+				hsp_top2: hsp@1600000 {
+					status = "okay";
+				};
+				spi@3230000  {
+					compatible = "nvidia,tegra186-spi-slave";
+					status = "okay";
+					spi@0 {
+						compatible = "nvidia,tegra-spidev";
+						reg = <0>;
+						spi-max-frequency = <50000000>;
+						controller-data {
+							nvidia,lsbyte-first;
+						};
+					};
+				};
+			};
+		};
+	};
+
+	fragment-t234-p3740-p3701-safety@1 {
+		target-path = "/";
+		__overlay__ {
+			fsicom_client {
+				status = "okay";
+			};
+
+			safetyservices_epl_client {
+				/* userspace app uses this driver to send error code */
+				status = "okay";
+			};
+
+			FsiComIvc {
+				status = "okay";
+			};
+
+			/* FSI<->CCPLEX Communication through DRAM Carveout demo app */
+			FsiComAppChConfApp1 {
+				compatible = "nvidia,tegra-fsicom-sampleApp1";
+				status = "okay";
+				channelid_list = <3>;
+			};
+		};
+	};
+};

overlay/tegra234-soc-safetyservice-fsicom.dtsi

@@ -10,12 +10,12 @@
 		__overlay__ {
 			reserved-memory {
 				fsicom_resv: reservation-fsicom {
-					iommu-addresses = <&fsicom_client 0x0 0x0 0x0 0xf0000000>,
+					iommu-addresses = <&fsiccplex_com 0x0 0x0 0x0 0xf0000000>,
-						<&fsicom_client 0x0 0xf1000000 0xffffffff 0x0effffff>;
+						<&fsiccplex_com 0x0 0xf1000000 0xffffffff 0x0effffff>;
 				};
 			};
 
-			fsicom_client: fsicom_client {
+			fsiccplex_com:fsicom_client {
 				compatible = "nvidia,tegra234-fsicom-client";
 				mboxes =
 					<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(2)>,
@@ -27,6 +27,33 @@
 				status = "disabled";
 			};
 
+			safetyservices_epl_client {
+				compatible = "nvidia,tegra234-epl-client";
+				mboxes = <&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(0)>;
+				mbox-names = "epl-tx";
+				reg = <0x0 0x00110000 0x0 0x4>,
+					  <0x0 0x00110004 0x0 0x4>,
+					  <0x0 0x00120000 0x0 0x4>,
+					  <0x0 0x00120004 0x0 0x4>,
+					  <0x0 0x00130000 0x0 0x4>,
+					  <0x0 0x00130004 0x0 0x4>,
+					  <0x0 0x00140000 0x0 0x4>,
+					  <0x0 0x00140004 0x0 0x4>,
+					  <0x0 0x00150000 0x0 0x4>,
+					  <0x0 0x00150004 0x0 0x4>,
+					  <0x0 0x024e0038 0x0 0x4>;
+
+				/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR0_SW_ERR_CODE_0 */
+				client-misc-sw-generic-err0 = "fsicom_client";
+				/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR1_SW_ERR_CODE_0 */
+				client-misc-sw-generic-err1 = "gk20b";
+				/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR3_SW_ERR_CODE_0 */
+				client-misc-sw-generic-err3 = "gk20d";
+				/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR4_SW_ERR_CODE_0 */
+				client-misc-sw-generic-err4 = "gk20e";
+				status = "disabled";
+			};
+
 			FsiComIvc {
 				compatible = "nvidia,tegra-fsicom-channels";
 				status = "disabled";