diff --git a/nv-platform/tegra234-p3737-0000.dtsi b/nv-platform/tegra234-p3737-0000.dtsi
index c615947..5c6d81f 100644
--- a/nv-platform/tegra234-p3737-0000.dtsi
+++ b/nv-platform/tegra234-p3737-0000.dtsi
@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-only
-// SPDX-FileCopyrightText: Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+// SPDX-FileCopyrightText: Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
 
 / {
 	bus@0 {
@@ -63,7 +63,6 @@
 			/* 1=enable, 0=disable */
 			nvidia,pause_frames = <1>;
 			phy-handle = <&mgbe0_aqr113c_phy>;
-			phy-mode = "10gbase-r";
 			/* 0:XFI 10G, 1:XFI 5G, 2:USXGMII 10G, 3:USXGMII 5G */
 			nvidia,phy-iface-mode = <0>;
 			nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(Y, 1) 0>;
diff --git a/nv-soc/tegra234-base-overlay.dtsi b/nv-soc/tegra234-base-overlay.dtsi
index f7b5fe6..9d4a01c 100644
--- a/nv-soc/tegra234-base-overlay.dtsi
+++ b/nv-soc/tegra234-base-overlay.dtsi
@@ -384,7 +384,6 @@
 					<&mc TEGRA234_MEMORY_CLIENT_MGBEAWR>;
 			interconnect-names = "dma-mem", "write";
 			iommus = <&smmu_niso0 TEGRA234_SID_MGBE>;
-			power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEB>;
 			nvidia,vm-irq-config = <&mgbe_vm_irq_config>;
 			nvidia,num-dma-chans = <10>;
 			nvidia,dma-chans = <0 1 2 3 4 5 6 7 8 9>;