tegra234-camera: Update DT property for VI HW.

Update DT property for VI from "non-coherent" to "dma-noncoherent"
to adopt to the latest upstream kernel change which intrun fixes
the RAW image corruption.

Bug 4640366

Change-Id: Ib49d5d69fb144a0ec87683b6c650507373be5579
Signed-off-by: Praveen AC <pac@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3172429
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Ankur Pawar <ankurp@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
This commit is contained in:
Praveen AC
2024-07-10 12:35:40 +00:00
committed by mobile promotions
parent a289da3a6f
commit 4bb0bcd039

View File

@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
// SPDX-FileCopyrightText: Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. // SPDX-FileCopyrightText: Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/* /*
* tegra234-soc-camera.dtsi: Camera RTCPU DTSI file. * tegra234-soc-camera.dtsi: Camera RTCPU DTSI file.
@@ -28,7 +28,7 @@
iommus = <&smmu_iso TEGRA234_SID_ISO_VI>; iommus = <&smmu_iso TEGRA234_SID_ISO_VI>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIW &emc>; interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIW &emc>;
interconnect-names = "write"; interconnect-names = "write";
non-coherent; dma-noncoherent;
status = "okay"; status = "okay";
}; };
@@ -37,7 +37,7 @@
resets = <&bpmp TEGRA234_RESET_VI>; resets = <&bpmp TEGRA234_RESET_VI>;
reset-names = "vi0_thi"; reset-names = "vi0_thi";
iommus = <&smmu_iso TEGRA234_SID_ISO_VI>; iommus = <&smmu_iso TEGRA234_SID_ISO_VI>;
non-coherent; dma-noncoherent;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2FALR &emc>, interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2FALR &emc>,
<&mc TEGRA234_MEMORY_CLIENT_VI2FALW &emc>; <&mc TEGRA234_MEMORY_CLIENT_VI2FALW &emc>;
interconnect-names = "dma-mem", "write"; interconnect-names = "dma-mem", "write";
@@ -54,7 +54,7 @@
iommus = <&smmu_iso TEGRA234_SID_ISO_VI2>; iommus = <&smmu_iso TEGRA234_SID_ISO_VI2>;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2W &emc>; interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2W &emc>;
interconnect-names = "write"; interconnect-names = "write";
non-coherent; dma-noncoherent;
status = "okay"; status = "okay";
}; };
@@ -63,7 +63,7 @@
resets = <&bpmp TEGRA234_RESET_VI2>; resets = <&bpmp TEGRA234_RESET_VI2>;
reset-names = "vi1_thi"; reset-names = "vi1_thi";
iommus = <&smmu_iso TEGRA234_SID_ISO_VI2>; iommus = <&smmu_iso TEGRA234_SID_ISO_VI2>;
non-coherent; dma-noncoherent;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIFALR &emc>, interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIFALR &emc>,
<&mc TEGRA234_MEMORY_CLIENT_VIFALW &emc>; <&mc TEGRA234_MEMORY_CLIENT_VIFALW &emc>;
interconnect-names = "dma-mem", "write"; interconnect-names = "dma-mem", "write";