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t23x: overlay: Remove duplicate thermal entries

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Remove duplicate thermal entries which already landed on the mainline
v6.5 and were backported.

Bug 3960800
Bug 4035713
Bug 4204722

Signed-off-by: Yi-Wei Wang <yiweiw@nvidia.com>
Change-Id: Iaa7bbe01ed1cb6135ea360378559fcd931b15d75
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2944082
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Yi-Wei Wang
2023-07-28 13:36:03 +08:00
committed by mobile promotions
parent fab0ba210e
commit 5108617a44
4 changed files with 0 additions and 67 deletions
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19
include/nvidia-oot/dt-bindings/thermal/tegra234-bpmp-thermal-oot.h
View File

@@ -1,19 +0,0 @@
/*
* This header provides constants for binding nvidia,tegra234-bpmp-thermal.
*/
#ifndef _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H
#define _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H
#define TEGRA234_THERMAL_ZONE_CPU 0
#define TEGRA234_THERMAL_ZONE_GPU 1
#define TEGRA234_THERMAL_ZONE_CV0 2
#define TEGRA234_THERMAL_ZONE_CV1 3
#define TEGRA234_THERMAL_ZONE_CV2 4
#define TEGRA234_THERMAL_ZONE_SOC0 5
#define TEGRA234_THERMAL_ZONE_SOC1 6
#define TEGRA234_THERMAL_ZONE_SOC2 7
#define TEGRA234_THERMAL_ZONE_TJ_MAX 8
#define TEGRA234_THERMAL_ZONE_COUNT 9
#endif

10
overlay/tegra234-p3737-0000+p3701-0000.dts
View File

@@ -20,12 +20,6 @@
fragment-t234-p3737-p3701@0 { fragment-t234-p3737-p3701@0 {
target-path = "/"; target-path = "/";
__overlay__ { __overlay__ {
bpmp {
thermal {
status = "okay";
};
};
cpus { cpus {
idle-states { idle-states {
c7 { c7 {
@@ -78,10 +72,6 @@
soc2-thermal { soc2-thermal {
status = "okay"; status = "okay";
}; };
tj-thermal {
status = "okay";
};
}; };
bus@0 { bus@0 {

10
overlay/tegra234-p3768-0000+p3767-0000.dts
View File

@@ -207,12 +207,6 @@
status = "okay"; status = "okay";
}; };
bpmp {
thermal {
status = "okay";
};
};
thermal-zones { thermal-zones {
cpu-thermal { cpu-thermal {
status = "okay"; status = "okay";
@@ -245,10 +239,6 @@
soc2-thermal { soc2-thermal {
status = "okay"; status = "okay";
}; };
tj-thermal {
status = "okay";
};
}; };
}; };
}; };

28
overlay/tegra234-soc-thermal.dtsi
View File

@@ -1,8 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. // Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#include <dt-bindings/thermal/tegra234-bpmp-thermal-oot.h>
#define TEGRA234_THERMAL_POLLING_DELAY 1000 #define TEGRA234_THERMAL_POLLING_DELAY 1000
/ { / {
@@ -10,76 +8,50 @@
fragment-t234-thermal@0 { fragment-t234-thermal@0 {
target-path = "/"; target-path = "/";
__overlay__ { __overlay__ {
bpmp {
bpmp_thermal: thermal {
compatible = "nvidia,tegra186-bpmp-thermal";
#thermal-sensor-cells = <1>;
status = "disabled";
};
};
thermal-zones { thermal-zones {
cpu-thermal { cpu-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_CPU>;
status = "disabled";
}; };
gpu-thermal { gpu-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_GPU>;
status = "disabled";
}; };
cv0-thermal { cv0-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_CV0>;
status = "disabled";
}; };
cv1-thermal { cv1-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_CV1>;
status = "disabled";
}; };
cv2-thermal { cv2-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_CV2>;
status = "disabled";
}; };
soc0-thermal { soc0-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_SOC0>;
status = "disabled";
}; };
soc1-thermal { soc1-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_SOC1>;
status = "disabled";
}; };
soc2-thermal { soc2-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_SOC2>;
status = "disabled";
}; };
tj-thermal { tj-thermal {
polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>; polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
thermal-sensors = <&bpmp_thermal TEGRA234_THERMAL_ZONE_TJ_MAX>;
status = "disabled";
}; };
}; };
}; };