overlay: put runtime fragments in separate overlay

This is an incremental step toward having a "with-oot" base dtb
that contains both the upstream dtb as well as the nvidia-oot
data in a single statically built dtb.

Note that currently the base dtb is stored and managed in the
rootfs via extlinux.conf file.  The overlays however live inside
the UEFI partition.  The ultimate goal is to have consistency
in how the dtb files are managed.

After we combine the data from nvidia-oot overlay dtb into the
future "with-oot" base dtb then we can move the remaining overlays
to the rootfs and manage all dtbs/overlays there.

This patch takes the first critical step toward this goal by
separating the static overlay data from the dynamic overlay data
that gets applied conditionally at run-time.

Bug 4290389

Change-Id: I403ac84b0737368b8bc96952552729ab7e46802b
Signed-off-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2991524
(cherry picked from commit af4c57cd95)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3001549
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Gautham Srinivasan <gauthams@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
This commit is contained in:
Brad Griffis
2023-10-05 01:15:16 +00:00
committed by mobile promotions
parent 53c13363cb
commit 57d03cac4b
6 changed files with 99 additions and 82 deletions

View File

@@ -16,9 +16,11 @@ dtbo-y += tegra234-carveouts.dtbo
dtbo-y += tegra234-jetson.dtbo dtbo-y += tegra234-jetson.dtbo
dtbo-y += tegra234-p3737-0000+p3701-0000.dtbo dtbo-y += tegra234-p3737-0000+p3701-0000.dtbo
dtbo-y += tegra234-p3737-0000+p3701-0000-pcie-no-tra.dtbo dtbo-y += tegra234-p3737-0000+p3701-0000-pcie-no-tra.dtbo
dtbo-y += tegra234-p3737-0000+p3701-0000-dynamic.dtbo
dtbo-y += tegra234-p3740-0002+p3701-0008.dtbo dtbo-y += tegra234-p3740-0002+p3701-0008.dtbo
dtbo-y += tegra234-p3740-0002+p3701-0008-safety.dtbo dtbo-y += tegra234-p3740-0002+p3701-0008-safety.dtbo
dtbo-y += tegra234-p3768-0000+p3767-0000.dtbo dtbo-y += tegra234-p3768-0000+p3767-0000.dtbo
dtbo-y += tegra234-p3768-0000+p3767-0000-dynamic.dtbo
dtbo-y += tegra234-p3737-0000+p3701-0000-audio-adafruit-uda1334a.dtbo dtbo-y += tegra234-p3737-0000+p3701-0000-audio-adafruit-uda1334a.dtbo
dtbo-y += tegra234-p3737-0000+p3701-0000-audio-adafruit-sph0645lm4h.dtbo dtbo-y += tegra234-p3737-0000+p3701-0000-audio-adafruit-sph0645lm4h.dtbo
dtbo-y += tegra234-p3737-0000+p3701-0000-audio-fe-pi.dtbo dtbo-y += tegra234-p3737-0000+p3701-0000-audio-fe-pi.dtbo

View File

@@ -151,18 +151,4 @@
}; };
}; };
}; };
fragment-t234-p3701-0000@1 {
target-path = "/";
board_config {
ids = "3701-0005-*","3701-0008-*";
};
__overlay__ {
reserved-memory {
linux,cma { /* Needed for nvgpu comptags */
size = <0x0 0x20000000>; /* 512MB */
};
};
};
};
}; };

View File

@@ -0,0 +1,84 @@
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/tegra234-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
fragment-t234-p3737-0000-p3701-0000@0 {
target-path = "/";
board_config {
ids = "3701-0005-*","3701-0008-*";
};
__overlay__ {
reserved-memory {
linux,cma { /* Needed for nvgpu comptags */
size = <0x0 0x20000000>; /* 512MB */
};
};
};
};
fragment-t234-p3737-0000-p3701-0000@1 {
target-path = "/";
board_config {
ids = ">=3737-0000-TS4", ">=3737-0000-RC1", ">=3737-0000-300";
};
__overlay__ {
bus@0 {
i2c@31e0000 {
rt5640: audio-codec@1c {
#sound-dai-cells = <1>;
status = "okay";
};
};
};
sound {
nvidia-audio-card,widgets =
"Headphone", "CVB-RT Headphone Jack",
"Microphone", "CVB-RT Mic Jack",
"Speaker", "CVB-RT Int Spk",
"Microphone", "CVB-RT Int Mic";
nvidia-audio-card,routing =
"CVB-RT Headphone Jack", "CVB-RT HPOL",
"CVB-RT Headphone Jack", "CVB-RT HPOR",
"CVB-RT IN1P", "CVB-RT Mic Jack",
"CVB-RT IN2P", "CVB-RT Mic Jack",
"CVB-RT Int Spk", "CVB-RT SPOLP",
"CVB-RT Int Spk", "CVB-RT SPORP",
"CVB-RT DMIC1", "CVB-RT Int Mic",
"CVB-RT DMIC2", "CVB-RT Int Mic";
nvidia-audio-card,dai-link@76 {
link-name = "rt5640-playback";
codec {
sound-dai = <&rt5640 0>;
prefix = "CVB-RT";
};
};
};
};
};
fragment-t234-p3737-0000-p3701-0000@2 {
target-path = "/";
board_config {
ids = "3737-0000-TS1","3737-0000-TS2","3737-0000-TS3","3737-0000-EB1","3737-0000-EB2","3737-0000-EB3","3737-0000-000","3737-0000-100","3737-0000-200";
};
__overlay__ {
bus@0{
i2c@c240000 {
typec@8 {
interrupt-parent = <&gpio_aon>;
interrupts = <TEGRA234_AON_GPIO(BB, 2) IRQ_TYPE_LEVEL_LOW>;
};
};
};
};
};
};

View File

@@ -127,64 +127,4 @@
}; };
}; };
}; };
fragment-t234-p3737-0000@1 {
target-path = "/";
board_config {
ids = ">=3737-0000-TS4", ">=3737-0000-RC1", ">=3737-0000-300";
};
__overlay__ {
bus@0 {
i2c@31e0000 {
rt5640: audio-codec@1c {
#sound-dai-cells = <1>;
status = "okay";
};
};
};
sound {
nvidia-audio-card,widgets =
"Headphone", "CVB-RT Headphone Jack",
"Microphone", "CVB-RT Mic Jack",
"Speaker", "CVB-RT Int Spk",
"Microphone", "CVB-RT Int Mic";
nvidia-audio-card,routing =
"CVB-RT Headphone Jack", "CVB-RT HPOL",
"CVB-RT Headphone Jack", "CVB-RT HPOR",
"CVB-RT IN1P", "CVB-RT Mic Jack",
"CVB-RT IN2P", "CVB-RT Mic Jack",
"CVB-RT Int Spk", "CVB-RT SPOLP",
"CVB-RT Int Spk", "CVB-RT SPORP",
"CVB-RT DMIC1", "CVB-RT Int Mic",
"CVB-RT DMIC2", "CVB-RT Int Mic";
nvidia-audio-card,dai-link@76 {
link-name = "rt5640-playback";
codec {
sound-dai = <&rt5640 0>;
prefix = "CVB-RT";
};
};
};
};
};
fragment-t234-p3737-0000@3 {
target-path = "/";
board_config {
ids = "3737-0000-TS1","3737-0000-TS2","3737-0000-TS3","3737-0000-EB1","3737-0000-EB2","3737-0000-EB3","3737-0000-000","3737-0000-100","3737-0000-200";
};
__overlay__ {
bus@0{
i2c@c240000 {
typec@8 {
interrupt-parent = <&gpio_aon>;
interrupts = <TEGRA234_AON_GPIO(BB, 2) IRQ_TYPE_LEVEL_LOW>;
};
};
};
};
};
}; };

View File

@@ -0,0 +1,13 @@
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/dts-v1/;
/plugin/;
/*
* Include this file last in the device tree. It manages run-time
* pruning of peripherals that are not available across the various
* SKUs of p3767. For example PVA can be enabled in the device tree
* and it will automatically be disabled for SKUs without PVA support.
*/
#include "tegra234-p3767-sku-handling.dtsi"

View File

@@ -458,11 +458,3 @@
}; };
}; };
}; };
/*
* Include this file last in the device tree. It manages run-time
* pruning of peripherals that are not available across the various
* SKUs of p3767. For example PVA can be enabled in the device tree
* and it will automatically be disabled for SKUs without PVA support.
*/
#include "tegra234-p3767-sku-handling.dtsi"