diff --git a/overlay/tegra234-jetson.dts b/overlay/tegra234-jetson.dts index eaa41d5..edd3af9 100644 --- a/overlay/tegra234-jetson.dts +++ b/overlay/tegra234-jetson.dts @@ -15,100 +15,6 @@ #include #include -#define TEGRA234_CLK_NVJPG1 20U -#define TEGRA234_CLK_GPC0CLK 41U -#define TEGRA234_CLK_NVDEC 83U -#define TEGRA234_CLK_NVENC 89U -#define TEGRA234_CLK_NVJPG 90U -#define TEGRA234_CLK_TSEC_PKA 154U -#define TEGRA234_CLK_DLA0_FALCON 174U -#define TEGRA234_CLK_DLA0_CORE 175U -#define TEGRA234_CLK_DLA1_FALCON 176U -#define TEGRA234_CLK_DLA1_CORE 177U -#define TEGRA234_CLK_NAFLL_PVA0_CORE 211U -#define TEGRA234_CLK_NAFLL_PVA0_VPS 212U -#define TEGRA234_CLK_GPC1CLK 236U -#define TEGRA234_CLK_PVA0_CPU_AXI 295U -#define TEGRA234_CLK_PVA0_VPS 297U -#define TEGRA234_CLK_GPUSYS 304U -#define TEGRA234_CLK_OFA 334U - -#define TEGRA234_MEMORY_CLIENT_NVENCSRD 0x1c -#define TEGRA234_MEMORY_CLIENT_NVENCSWR 0x2b -#define TEGRA234_MEMORY_CLIENT_DLA0RDB 0x2c -#define TEGRA234_MEMORY_CLIENT_DLA0RDB1 0x2d -#define TEGRA234_MEMORY_CLIENT_DLA0WRB 0x2e -#define TEGRA234_MEMORY_CLIENT_DLA1RDB 0x2f -#define TEGRA234_MEMORY_CLIENT_OFAR1 0x3a -#define TEGRA234_MEMORY_CLIENT_OFAR 0x5d -#define TEGRA234_MEMORY_CLIENT_OFAW 0x5e -#define TEGRA234_MEMORY_CLIENT_DLA1RDB1 0x6e -#define TEGRA234_MEMORY_CLIENT_DLA1WRB 0x6f -#define TEGRA234_MEMORY_CLIENT_NVDECSRD 0x78 -#define TEGRA234_MEMORY_CLIENT_NVDECSWR 0x79 -#define TEGRA234_MEMORY_CLIENT_NVJPGSRD 0x7e -#define TEGRA234_MEMORY_CLIENT_NVJPGSWR 0x7f -#define TEGRA234_MEMORY_CLIENT_DLA0RDA 0xbe -#define TEGRA234_MEMORY_CLIENT_DLA0FALRDB 0xbf -#define TEGRA234_MEMORY_CLIENT_DLA0WRA 0xc0 -#define TEGRA234_MEMORY_CLIENT_DLA0FALWRB 0xc1 -#define TEGRA234_MEMORY_CLIENT_DLA1RDA 0xc2 -#define TEGRA234_MEMORY_CLIENT_DLA1FALRDB 0xc3 -#define TEGRA234_MEMORY_CLIENT_DLA1WRA 0xc4 -#define TEGRA234_MEMORY_CLIENT_DLA1FALWRB 0xc5 -#define TEGRA234_MEMORY_CLIENT_PVA0RDA 0xc6 -#define TEGRA234_MEMORY_CLIENT_PVA0RDB 0xc7 -#define TEGRA234_MEMORY_CLIENT_PVA0RDC 0xc8 -#define TEGRA234_MEMORY_CLIENT_PVA0WRA 0xc9 -#define TEGRA234_MEMORY_CLIENT_PVA0WRB 0xca -#define TEGRA234_MEMORY_CLIENT_PVA0WRC 0xcb -#define TEGRA234_MEMORY_CLIENT_DLA0RDA1 0xe9 -#define TEGRA234_MEMORY_CLIENT_DLA1RDA1 0xea -#define TEGRA234_MEMORY_CLIENT_PVA0RDA1 0xeb -#define TEGRA234_MEMORY_CLIENT_PVA0RDB1 0xec -#define TEGRA234_MEMORY_CLIENT_NVENCSRD1 0xf0 -#define TEGRA234_MEMORY_CLIENT_NVJPG1SRD 0x123 -#define TEGRA234_MEMORY_CLIENT_NVJPG1SWR 0x124 - -#define TEGRA234_RESET_DLA0 6U -#define TEGRA234_RESET_DLA1 7U -#define TEGRA234_RESET_OFA 9U -#define TEGRA234_RESET_NVJPG1 10U -#define TEGRA234_RESET_GPU 19U -#define TEGRA234_RESET_NVDEC 44U -#define TEGRA234_RESET_NVENC 59U -#define TEGRA234_RESET_NVJPG 61U -#define TEGRA234_RESET_PVA0_ALL 66U - -#define TEGRA234_POWER_DOMAIN_OFA 1U -#define TEGRA234_POWER_DOMAIN_NVDEC 23U -#define TEGRA234_POWER_DOMAIN_NVJPGA 24U -#define TEGRA234_POWER_DOMAIN_NVENC 25U -#define TEGRA234_POWER_DOMAIN_VIC 29U -#define TEGRA234_POWER_DOMAIN_PVA 30U -#define TEGRA234_POWER_DOMAIN_DLAA 32U -#define TEGRA234_POWER_DOMAIN_DLAB 33U -#define TEGRA234_POWER_DOMAIN_GPU 35U -#define TEGRA234_POWER_DOMAIN_NVJPGB 36U - -#define TEGRA234_SID_NVDLA1 0x23 -#define TEGRA234_SID_NVENC 0x24 -#define TEGRA234_SID_NVJPG1 0x25 -#define TEGRA234_SID_OFA 0x26 - -#define TEGRA234_SID_PVA0_VM0 0x12U -#define TEGRA234_SID_PVA0_VM1 0x13U -#define TEGRA234_SID_PVA0_VM2 0x14U -#define TEGRA234_SID_PVA0_VM3 0x15U -#define TEGRA234_SID_PVA0_VM4 0x16U -#define TEGRA234_SID_PVA0_VM5 0x17U -#define TEGRA234_SID_PVA0_VM6 0x18U -#define TEGRA234_SID_PVA0_VM7 0x19U -#define TEGRA234_SID_NVDEC 0x29 -#define TEGRA234_SID_NVJPG 0x2a -#define TEGRA234_SID_NVDLA0 0x2B -#define TEGRA234_SID_PVA0 0x2C - / { overlay-name = "Tegra234 Jetson Overlay"; compatible = "nvidia,tegra234";