arm64: tegra: Remove duplicate nodes on Jetson Orin NX

The SBSA UART and TCU as well as the TCU alias and the stdout-path are
configured via the P3768 carrier board DTS include, so the can be
removed from the system DTS file.

Bug 4037899

Change-Id: I518acd5930ea7a7428cf39136e3b2c5929eff280
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3037844
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Thierry Reding
2023-08-17 16:14:04 +02:00
committed by mobile promotions
parent a7d01fe7f4
commit 69ca9e6a61

View File

@@ -12,15 +12,10 @@
model = "NVIDIA Jetson Orin NX Engineering Reference Developer Kit"; model = "NVIDIA Jetson Orin NX Engineering Reference Developer Kit";
aliases { aliases {
serial0 = &tcu;
serial1 = &uarta; serial1 = &uarta;
serial2 = &uarte; serial2 = &uarte;
}; };
chosen {
stdout-path = "serial0:115200n8";
};
bus@0 { bus@0 {
serial@3100000 { serial@3100000 {
compatible = "nvidia,tegra194-hsuart"; compatible = "nvidia,tegra194-hsuart";
@@ -34,10 +29,6 @@
status = "okay"; status = "okay";
}; };
serial@31d0000 {
status = "okay";
};
pwm@32a0000 { pwm@32a0000 {
assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>; assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>;
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>; assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
@@ -94,10 +85,6 @@
enable-active-high; enable-active-high;
}; };
serial {
status = "okay";
};
thermal-zones { thermal-zones {
tj-thermal { tj-thermal {
cooling-maps { cooling-maps {