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[UPSTREAM V6.6] arm64: tegra: Add SPI device tree nodes for Tegra234

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Create the device tree nodes for the SPI1, SPI2 and SPI3 controllers
found on Tegra234.

Bug 4130525

Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from mainline commit bb9667d8187b58f1524a3ce203a0ddd7b107347a)

Change-Id: I3269d358f8cac2500963afa26651e3f2995a3fc6
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3019986
(cherry picked from commit 4c2aab0767)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3020231
Tested-by: Gautham Srinivasan <gauthams@nvidia.com>
Reviewed-by: Gautham Srinivasan <gauthams@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Gautham Srinivasan
2023-07-21 16:10:50 +00:00
committed by mobile promotions
parent dc46feb7e0
commit 7b12220c93
1 changed files with 57 additions and 0 deletions
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57
tegra234.dtsi
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@@ -818,6 +818,44 @@
dma-names = "rx", "tx";
};
spi@3210000 {
compatible = "nvidia,tegra210-spi";
reg = <0x0 0x03210000 0x0 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA234_CLK_SPI1>;
assigned-clocks = <&bpmp TEGRA234_CLK_SPI1>;
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
clock-names = "spi";
iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
resets = <&bpmp TEGRA234_RESET_SPI1>;
reset-names = "spi";
dmas = <&gpcdma 15>, <&gpcdma 15>;
dma-names = "rx", "tx";
dma-coherent;
status = "disabled";
};
spi@3230000 {
compatible = "nvidia,tegra210-spi";
reg = <0x0 0x03230000 0x0 0x1000>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA234_CLK_SPI3>;
clock-names = "spi";
iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
assigned-clocks = <&bpmp TEGRA234_CLK_SPI3>;
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
resets = <&bpmp TEGRA234_RESET_SPI3>;
reset-names = "spi";
dmas = <&gpcdma 17>, <&gpcdma 17>;
dma-names = "rx", "tx";
dma-coherent;
status = "disabled";
};
spi@3270000 {
compatible = "nvidia,tegra234-qspi";
reg = <0x0 0x3270000 0x0 0x1000>;
@@ -1743,6 +1781,25 @@
dma-names = "rx", "tx";
};
spi@c260000 {
compatible = "nvidia,tegra210-spi";
reg = <0x0 0x0c260000 0x0 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA234_CLK_SPI2>;
clock-names = "spi";
iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
assigned-clocks = <&bpmp TEGRA234_CLK_SPI2>;
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
resets = <&bpmp TEGRA234_RESET_SPI2>;
reset-names = "spi";
dmas = <&gpcdma 19>, <&gpcdma 19>;
dma-names = "rx", "tx";
dma-coherent;
status = "disabled";
};
rtc@c2a0000 {
compatible = "nvidia,tegra234-rtc", "nvidia,tegra20-rtc";
reg = <0x0 0x0c2a0000 0x0 0x10000>;