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nv-platform: p3737: enable hdr40 spi nodes

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Enable SPI nodes for Concord 40-pin header.

Bug 4397019

Signed-off-by: Vishwaroop A <va@nvidia.com>
Change-Id: I1e475f404520aa847befa591d55f67563fcdad00
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3025462
(cherry picked from commit d0aa71b652)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3025579
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Vishwaroop A
2023-11-30 10:48:49 +00:00
committed by mobile promotions
parent 244dddb9b6
commit 895148c1f3
1 changed files with 2 additions and 0 deletions
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2
nv-platform/tegra234-p3737-0000.dtsi
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@@ -4,6 +4,7 @@
/ { / {
bus@0 { bus@0 {
spi@3210000{ /* SPI1 in 40 pin conn */ spi@3210000{ /* SPI1 in 40 pin conn */
status = "okay";
spi@0 { /* chip select 0 */ spi@0 { /* chip select 0 */
compatible = "tegra-spidev"; compatible = "tegra-spidev";
reg = <0x0>; reg = <0x0>;
@@ -17,6 +18,7 @@
}; };
spi@3230000{ /* SPI3 in 40 pin conn */ spi@3230000{ /* SPI3 in 40 pin conn */
status = "okay";
spi@0 { /* chip select 0 */ spi@0 { /* chip select 0 */
compatible = "tegra-spidev"; compatible = "tegra-spidev";
reg = <0x0>; reg = <0x0>;