diff --git a/nv-platform/tegra234-camera-p3785.dtsi b/nv-platform/tegra234-camera-p3785.dtsi
index 8d4c1d4..5c0886a 100644
--- a/nv-platform/tegra234-camera-p3785.dtsi
+++ b/nv-platform/tegra234-camera-p3785.dtsi
@@ -6,397 +6,397 @@
 #define CAM0_PWDN	TEGRA234_AON_GPIO(AA, 4)
 
 / {
-			gpio@c2f0000 {
-				camera-control-output-high {
-					gpio-hog;
-					output-high;
-					gpios = <CAM0_PWDN 0>;
-					label = "cam0-pwdn";
+	gpio@c2f0000 {
+		camera-control-output-high {
+			gpio-hog;
+			output-high;
+			gpios = <CAM0_PWDN 0>;
+			label = "cam0-pwdn";
+		};
+	};
+
+	tegra-capture-vi {
+		nvidia,vi-mapping =
+			<0 0>,
+			<1 0>,
+			<2 0>,
+			<3 0>,
+			<4 1>,
+			<5 1>;
+		num-channels = <1>;
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			port@0 {
+				reg = <0>;
+				p3785_vi_in0: endpoint {
+					port-index = <0>;
+					bus-width = <8>;
+					remote-endpoint = <&p3785_csi_out0>;
 				};
 			};
-
-			tegra-capture-vi {
-				nvidia,vi-mapping =
-					<0 0>,
-					<1 0>,
-					<2 0>,
-					<3 0>,
-					<4 1>,
-					<5 1>;
+		};
+	};
+	bus@0 {
+		host1x@13e00000 {
+			nvcsi@15a00000 {
 				num-channels = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				channel@0 {
+					reg = <0>;
+					ports {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						port@0 {
+							reg = <0>;
+							p3785_csi_in0: endpoint@0 {
+								port-index = <0>;
+								bus-width = <8>;
+								remote-endpoint = <&p3785_out0>;
+							};
+						};
+						port@1 {
+							reg = <1>;
+							p3785_csi_out0: endpoint@1 {
+								remote-endpoint = <&p3785_vi_in0>;
+							};
+						};
+					};
+				};
+			};
+		};
+
+		i2c@3180000 {
+			p3785@56 {
+				compatible = "nvidia,lt6911uxc";
+				/* I2C device address */
+				reg = <0x56>;
+
+				/* V4L2 device node location */
+				devnode = "video0";
+
+				/* Physical dimensions of sensor */
+				physical_w = "3.674";
+				physical_h = "2.738";
+
+				sensor_model = "p3785";
+
+				/* Define any required hw resources needed by driver */
+				/* ie. clocks, io pins, power sources
+				avdd-reg = "vana";
+				iovdd-reg = "vif";
+				dvdd-reg = "vdig";*/
+
+				/* Defines number of frames to be dropped by driver internally after applying */
+				/* sensor crop settings. Some sensors send corrupt frames after applying */
+				/* crop co-ordinates */
+				/*post_crop_frame_drop = "0";*/
+
+				/* Define any required hw resources needed by driver */
+				/* ie. clocks, io pins, power sources */
+				clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
+					<&bpmp TEGRA234_CLK_EXTPERIPH1>;
+				clock-names = "extperiph1", "pllp_grtba";
+				mclk = "extperiph1";
+				reset-gpios = <&gpio_aon CAM0_PWDN GPIO_ACTIVE_HIGH>;
+
+				/**
+				* ==== Modes ====
+				* A modeX node is required to support v4l2 driver
+				* implementation with NVIDIA camera software stack
+				*
+				* == Signal properties ==
+				*
+				* phy_mode = "";
+				* PHY mode used by the MIPI lanes for this device
+				*
+				* tegra_sinterface = "";
+				* CSI Serial interface connected to tegra
+				* Incase of virtual HW devices, use virtual
+				* For SW emulated devices, use host
+				*
+				* pix_clk_hz = "";
+				* Sensor pixel clock used for calculations like exposure and framerate
+				*
+				* readout_orientation = "0";
+				* Based on camera module orientation.
+				* Only change readout_orientation if you specifically
+				* Program a different readout order for this mode
+				*
+				* == Image format Properties ==
+				*
+				* active_w = "";
+				* Pixel active region width
+				*
+				* active_h = "";
+				* Pixel active region height
+				*
+				* pixel_t = "";
+				* The sensor readout pixel pattern
+				*
+				* line_length = "";
+				* Pixel line length (width) for sensor mode.
+				*
+				* == Source Control Settings ==
+				*
+				* Gain factor used to convert fixed point integer to float
+				* Gain range [min_gain/gain_factor, max_gain/gain_factor]
+				* Gain step [step_gain/gain_factor is the smallest step that can be configured]
+				* Default gain [Default gain to be initialized for the control.
+						*     use min_gain_val as default for optimal results]
+				* Framerate factor used to convert fixed point integer to float
+				* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
+				* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
+				* Default Framerate [Default framerate to be initialized for the control.
+						*     use max_framerate to get required performance]
+				* Exposure factor used to convert fixed point integer to float
+				* For convenience use 1 sec = 1000000us as conversion factor
+				* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
+				* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
+				* Default Exposure Time [Default exposure to be initialized for the control.
+						*     Set default exposure based on the default_framerate for optimal exposure settings]
+				* For convenience use 1 sec = 1000000us as conversion factor
+				*
+				* gain_factor = ""; (integer factor used for floating to fixed point conversion)
+				* min_gain_val = ""; (ceil to integer)
+				* max_gain_val = ""; (ceil to integer)
+				* step_gain_val = ""; (ceil to integer)
+				* default_gain = ""; (ceil to integer)
+				* Gain limits for mode
+				*
+				* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
+				* min_exp_time = ""; (ceil to integer)
+				* max_exp_time = ""; (ceil to integer)
+				* step_exp_time = ""; (ceil to integer)
+				* default_exp_time = ""; (ceil to integer)
+				* Exposure Time limits for mode (sec)
+				*
+				* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
+				* min_framerate = ""; (ceil to integer)
+				* max_framerate = ""; (ceil to integer)
+				* step_framerate = ""; (ceil to integer)
+				* default_framerate = ""; (ceil to integer)
+				* Framerate limits for mode (fps)
+				*
+				* embedded_metadata_height = "";
+				* Sensor embedded metadata height in units of rows.
+				* If sensor does not support embedded metadata value should be 0.
+
+				* num_of_exposure = "";
+				* Digital overlap(Dol) frames
+				*
+				* num_of_ignored_lines = "";
+				* Used for cropping, eg. OB lines + Ignored area of effective pixel lines
+				*
+				* num_of_lines_offset_0 = "";
+				* Used for cropping, vertical blanking in front of short exposure data
+				* If more Dol frames are used, it can be extended, eg. num_of_lines_offset_1
+				*
+				* num_of_ignored_pixels = "";
+				* Used for cropping, The length of line info(pixels)
+				*
+				* num_of_left_margin_pixels = "";
+				* Used for cropping, the size of the left edge margin before
+				* the active pixel area (after ignored pixels)
+				*
+				* num_of_right_margin_pixels = "";
+				* Used for cropping, the size of the right edge margin after
+				* the active pixel area
+				*
+				*/
+				mode0 { // E2832_1920x1080_60Fps
+					mclk_khz = "24000";
+					num_lanes = "4";
+					tegra_sinterface = "serial_a";
+					phy_mode = "DPHY";
+					discontinuous_clk = "yes";
+					dpcm_enable = "false";
+					cil_settletime = "0";
+
+					active_w = "1920";
+					active_h = "1080";
+					mode_type = "rgb";
+					pixel_phase = "rgb888";
+					csi_pixel_bit_depth = "24";
+					readout_orientation = "0";
+					line_length = "1920";
+					inherent_gain = "1";
+					mclk_multiplier = "24";
+					pix_clk_hz = "250000000";
+
+					gain_factor = "16";
+					framerate_factor = "1000000";
+					exposure_factor = "1000000";
+					min_gain_val = "16"; /* 1.00x */
+					max_gain_val = "170"; /* 10.66x */
+					step_gain_val = "1";
+					default_gain = "16"; /* 1.00x */
+					min_hdr_ratio = "1";
+					max_hdr_ratio = "1";
+					min_framerate = "2000000"; /* 2.0 fps */
+					max_framerate = "60000000"; /* 60.0 fps */
+					step_framerate = "1";
+					default_framerate = "60000000"; /* 60.0 fps */
+					min_exp_time = "13"; /* us */
+					max_exp_time = "683709"; /* us */
+					step_exp_time = "1";
+					default_exp_time = "16667"; /* us  */
+				};
+				mode1 { // E2832_3840x2160
+					mclk_khz = "24000";
+					num_lanes = "8";
+					tegra_sinterface = "serial_a";
+					phy_mode = "DPHY";
+					discontinuous_clk = "yes";
+					dpcm_enable = "false";
+					cil_settletime = "0";
+
+					active_w = "3840";
+					active_h = "2160";
+					mode_type = "rgb";
+					pixel_phase = "rgb888";
+					csi_pixel_bit_depth = "24";
+					readout_orientation = "0";
+					line_length = "3840";
+					inherent_gain = "1";
+					mclk_multiplier = "24";
+					pix_clk_hz = "500000000";
+
+					gain_factor = "16";
+					framerate_factor = "1000000";
+					exposure_factor = "1000000";
+					min_gain_val = "16"; /* 1.00x */
+					max_gain_val = "170"; /* 10.66x */
+					step_gain_val = "1";
+					default_gain = "16"; /* 1.00x */
+					min_hdr_ratio = "1";
+					max_hdr_ratio = "1";
+					min_framerate = "2000000"; /* 2.0 fps */
+					max_framerate = "60000000"; /* 60.0 fps */
+					step_framerate = "1";
+					default_framerate = "60000000"; /* 60.0 fps */
+					min_exp_time = "13"; /* us */
+					max_exp_time = "683709"; /* us */
+					step_exp_time = "1";
+					default_exp_time = "16667"; /* us  */
+				};
+
+				mode2 { // E2832_1280x720_60Fps
+					mclk_khz = "24000";
+					num_lanes = "4";
+					tegra_sinterface = "serial_a";
+					phy_mode = "DPHY";
+					discontinuous_clk = "yes";
+					dpcm_enable = "false";
+					cil_settletime = "0";
+
+					active_w = "1280";
+					active_h = "720";
+					mode_type = "rgb";
+					pixel_phase = "rgb888";
+					csi_pixel_bit_depth = "24";
+					readout_orientation = "0";
+					line_length = "1280";
+					inherent_gain = "1";
+					mclk_multiplier = "24";
+					pix_clk_hz = "250000000";
+
+					gain_factor = "16";
+					framerate_factor = "1000000";
+					exposure_factor = "1000000";
+					min_gain_val = "16"; /* 1.00x */
+					max_gain_val = "170"; /* 10.66x */
+					step_gain_val = "1";
+					default_gain = "16"; /* 1.00x */
+					min_hdr_ratio = "1";
+					max_hdr_ratio = "1";
+					min_framerate = "2000000"; /* 2.0 fps */
+					max_framerate = "60000000"; /* 60.0 fps */
+					step_framerate = "1";
+					default_framerate = "60000000"; /* 60.0 fps */
+					min_exp_time = "13"; /* us */
+					max_exp_time = "683709"; /* us */
+					step_exp_time = "1";
+					default_exp_time = "16667"; /* us  */
+				};
+
 				ports {
 					#address-cells = <1>;
 					#size-cells = <0>;
 					port@0 {
 						reg = <0>;
-						p3785_vi_in0: endpoint {
+						p3785_out0: endpoint {
 							port-index = <0>;
 							bus-width = <8>;
-							remote-endpoint = <&p3785_csi_out0>;
+							remote-endpoint = <&p3785_csi_in0>;
 						};
 					};
 				};
 			};
-			bus@0 {
-				host1x@13e00000 {
-					nvcsi@15a00000 {
-						num-channels = <1>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						channel@0 {
-							reg = <0>;
-							ports {
-								#address-cells = <1>;
-								#size-cells = <0>;
-								port@0 {
-									reg = <0>;
-									p3785_csi_in0: endpoint@0 {
-										port-index = <0>;
-										bus-width = <8>;
-										remote-endpoint = <&p3785_out0>;
-									};
-								};
-								port@1 {
-									reg = <1>;
-									p3785_csi_out0: endpoint@1 {
-										remote-endpoint = <&p3785_vi_in0>;
-									};
-								};
-							};
-						};
-					};
-				};
+		};
+	};
 
-				i2c@3180000 {
-					p3785@56 {
-						compatible = "nvidia,lt6911uxc";
-						/* I2C device address */
-						reg = <0x56>;
+	tegra-camera-platform {
+		compatible = "nvidia, tegra-camera-platform";
+		/**
+		* Physical settings to calculate max ISO BW
+		*
+		* num_csi_lanes = <>;
+		* Total number of CSI lanes when all cameras are active
+		*
+		* max_lane_speed = <>;
+		* Max lane speed in Kbit/s
+		*
+		* min_bits_per_pixel = <>;
+		* Min bits per pixel
+		*
+		* vi_peak_byte_per_pixel = <>;
+		* Max byte per pixel for the VI ISO case
+		*
+		* vi_bw_margin_pct = <>;
+		* Vi bandwidth margin in percentage
+		*
+		* max_pixel_rate = <>;
+		* Max pixel rate in Kpixel/s for the ISP ISO case
+		*
+		* isp_peak_byte_per_pixel = <>;
+		* Max byte per pixel for the ISP ISO case
+		*
+		* isp_bw_margin_pct = <>;
+		* Isp bandwidth margin in percentage
+		*/
+		num_csi_lanes = <4>;
+		max_lane_speed = <1500000>;
+		min_bits_per_pixel = <10>;
+		vi_peak_byte_per_pixel = <2>;
+		vi_bw_margin_pct = <25>;
+		max_pixel_rate = <750000>;
+		isp_peak_byte_per_pixel = <5>;
+		isp_bw_margin_pct = <25>;
 
-						/* V4L2 device node location */
-						devnode = "video0";
-
-						/* Physical dimensions of sensor */
-						physical_w = "3.674";
-						physical_h = "2.738";
-
-						sensor_model = "p3785";
-
-						/* Define any required hw resources needed by driver */
-						/* ie. clocks, io pins, power sources
-						avdd-reg = "vana";
-						iovdd-reg = "vif";
-						dvdd-reg = "vdig";*/
-
-						/* Defines number of frames to be dropped by driver internally after applying */
-						/* sensor crop settings. Some sensors send corrupt frames after applying */
-						/* crop co-ordinates */
-						/*post_crop_frame_drop = "0";*/
-
-						/* Define any required hw resources needed by driver */
-						/* ie. clocks, io pins, power sources */
-						clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
-							<&bpmp TEGRA234_CLK_EXTPERIPH1>;
-						clock-names = "extperiph1", "pllp_grtba";
-						mclk = "extperiph1";
-						reset-gpios = <&gpio_aon CAM0_PWDN GPIO_ACTIVE_HIGH>;
-
-						/**
-						* ==== Modes ====
-						* A modeX node is required to support v4l2 driver
-						* implementation with NVIDIA camera software stack
-						*
-						* == Signal properties ==
-						*
-						* phy_mode = "";
-						* PHY mode used by the MIPI lanes for this device
-						*
-						* tegra_sinterface = "";
-						* CSI Serial interface connected to tegra
-						* Incase of virtual HW devices, use virtual
-						* For SW emulated devices, use host
-						*
-						* pix_clk_hz = "";
-						* Sensor pixel clock used for calculations like exposure and framerate
-						*
-						* readout_orientation = "0";
-						* Based on camera module orientation.
-						* Only change readout_orientation if you specifically
-						* Program a different readout order for this mode
-						*
-						* == Image format Properties ==
-						*
-						* active_w = "";
-						* Pixel active region width
-						*
-						* active_h = "";
-						* Pixel active region height
-						*
-						* pixel_t = "";
-						* The sensor readout pixel pattern
-						*
-						* line_length = "";
-						* Pixel line length (width) for sensor mode.
-						*
-						* == Source Control Settings ==
-						*
-						* Gain factor used to convert fixed point integer to float
-						* Gain range [min_gain/gain_factor, max_gain/gain_factor]
-						* Gain step [step_gain/gain_factor is the smallest step that can be configured]
-						* Default gain [Default gain to be initialized for the control.
-								*     use min_gain_val as default for optimal results]
-						* Framerate factor used to convert fixed point integer to float
-						* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
-						* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
-						* Default Framerate [Default framerate to be initialized for the control.
-								*     use max_framerate to get required performance]
-						* Exposure factor used to convert fixed point integer to float
-						* For convenience use 1 sec = 1000000us as conversion factor
-						* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
-						* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
-						* Default Exposure Time [Default exposure to be initialized for the control.
-								*     Set default exposure based on the default_framerate for optimal exposure settings]
-						* For convenience use 1 sec = 1000000us as conversion factor
-						*
-						* gain_factor = ""; (integer factor used for floating to fixed point conversion)
-						* min_gain_val = ""; (ceil to integer)
-						* max_gain_val = ""; (ceil to integer)
-						* step_gain_val = ""; (ceil to integer)
-						* default_gain = ""; (ceil to integer)
-						* Gain limits for mode
-						*
-						* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
-						* min_exp_time = ""; (ceil to integer)
-						* max_exp_time = ""; (ceil to integer)
-						* step_exp_time = ""; (ceil to integer)
-						* default_exp_time = ""; (ceil to integer)
-						* Exposure Time limits for mode (sec)
-						*
-						* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
-						* min_framerate = ""; (ceil to integer)
-						* max_framerate = ""; (ceil to integer)
-						* step_framerate = ""; (ceil to integer)
-						* default_framerate = ""; (ceil to integer)
-						* Framerate limits for mode (fps)
-						*
-						* embedded_metadata_height = "";
-						* Sensor embedded metadata height in units of rows.
-						* If sensor does not support embedded metadata value should be 0.
-
-						* num_of_exposure = "";
-						* Digital overlap(Dol) frames
-						*
-						* num_of_ignored_lines = "";
-						* Used for cropping, eg. OB lines + Ignored area of effective pixel lines
-						*
-						* num_of_lines_offset_0 = "";
-						* Used for cropping, vertical blanking in front of short exposure data
-						* If more Dol frames are used, it can be extended, eg. num_of_lines_offset_1
-						*
-						* num_of_ignored_pixels = "";
-						* Used for cropping, The length of line info(pixels)
-						*
-						* num_of_left_margin_pixels = "";
-						* Used for cropping, the size of the left edge margin before
-						* the active pixel area (after ignored pixels)
-						*
-						* num_of_right_margin_pixels = "";
-						* Used for cropping, the size of the right edge margin after
-						* the active pixel area
-						*
-						*/
-						mode0 { // E2832_1920x1080_60Fps
-							mclk_khz = "24000";
-							num_lanes = "4";
-							tegra_sinterface = "serial_a";
-							phy_mode = "DPHY";
-							discontinuous_clk = "yes";
-							dpcm_enable = "false";
-							cil_settletime = "0";
-
-							active_w = "1920";
-							active_h = "1080";
-							mode_type = "rgb";
-							pixel_phase = "rgb888";
-							csi_pixel_bit_depth = "24";
-							readout_orientation = "0";
-							line_length = "1920";
-							inherent_gain = "1";
-							mclk_multiplier = "24";
-							pix_clk_hz = "250000000";
-
-							gain_factor = "16";
-							framerate_factor = "1000000";
-							exposure_factor = "1000000";
-							min_gain_val = "16"; /* 1.00x */
-							max_gain_val = "170"; /* 10.66x */
-							step_gain_val = "1";
-							default_gain = "16"; /* 1.00x */
-							min_hdr_ratio = "1";
-							max_hdr_ratio = "1";
-							min_framerate = "2000000"; /* 2.0 fps */
-							max_framerate = "60000000"; /* 60.0 fps */
-							step_framerate = "1";
-							default_framerate = "60000000"; /* 60.0 fps */
-							min_exp_time = "13"; /* us */
-							max_exp_time = "683709"; /* us */
-							step_exp_time = "1";
-							default_exp_time = "16667"; /* us  */
-						};
-						mode1 { // E2832_3840x2160
-							mclk_khz = "24000";
-							num_lanes = "8";
-							tegra_sinterface = "serial_a";
-							phy_mode = "DPHY";
-							discontinuous_clk = "yes";
-							dpcm_enable = "false";
-							cil_settletime = "0";
-
-							active_w = "3840";
-							active_h = "2160";
-							mode_type = "rgb";
-							pixel_phase = "rgb888";
-							csi_pixel_bit_depth = "24";
-							readout_orientation = "0";
-							line_length = "3840";
-							inherent_gain = "1";
-							mclk_multiplier = "24";
-							pix_clk_hz = "500000000";
-
-							gain_factor = "16";
-							framerate_factor = "1000000";
-							exposure_factor = "1000000";
-							min_gain_val = "16"; /* 1.00x */
-							max_gain_val = "170"; /* 10.66x */
-							step_gain_val = "1";
-							default_gain = "16"; /* 1.00x */
-							min_hdr_ratio = "1";
-							max_hdr_ratio = "1";
-							min_framerate = "2000000"; /* 2.0 fps */
-							max_framerate = "60000000"; /* 60.0 fps */
-							step_framerate = "1";
-							default_framerate = "60000000"; /* 60.0 fps */
-							min_exp_time = "13"; /* us */
-							max_exp_time = "683709"; /* us */
-							step_exp_time = "1";
-							default_exp_time = "16667"; /* us  */
-						};
-
-						mode2 { // E2832_1280x720_60Fps
-							mclk_khz = "24000";
-							num_lanes = "4";
-							tegra_sinterface = "serial_a";
-							phy_mode = "DPHY";
-							discontinuous_clk = "yes";
-							dpcm_enable = "false";
-							cil_settletime = "0";
-
-							active_w = "1280";
-							active_h = "720";
-							mode_type = "rgb";
-							pixel_phase = "rgb888";
-							csi_pixel_bit_depth = "24";
-							readout_orientation = "0";
-							line_length = "1280";
-							inherent_gain = "1";
-							mclk_multiplier = "24";
-							pix_clk_hz = "250000000";
-
-							gain_factor = "16";
-							framerate_factor = "1000000";
-							exposure_factor = "1000000";
-							min_gain_val = "16"; /* 1.00x */
-							max_gain_val = "170"; /* 10.66x */
-							step_gain_val = "1";
-							default_gain = "16"; /* 1.00x */
-							min_hdr_ratio = "1";
-							max_hdr_ratio = "1";
-							min_framerate = "2000000"; /* 2.0 fps */
-							max_framerate = "60000000"; /* 60.0 fps */
-							step_framerate = "1";
-							default_framerate = "60000000"; /* 60.0 fps */
-							min_exp_time = "13"; /* us */
-							max_exp_time = "683709"; /* us */
-							step_exp_time = "1";
-							default_exp_time = "16667"; /* us  */
-						};
-
-						ports {
-							#address-cells = <1>;
-							#size-cells = <0>;
-							port@0 {
-								reg = <0>;
-								p3785_out0: endpoint {
-									port-index = <0>;
-									bus-width = <8>;
-									remote-endpoint = <&p3785_csi_in0>;
-								};
-							};
-						};
-					};
-				};
-			};
-
-			tegra-camera-platform {
-				compatible = "nvidia, tegra-camera-platform";
-				/**
-				* Physical settings to calculate max ISO BW
-				*
-				* num_csi_lanes = <>;
-				* Total number of CSI lanes when all cameras are active
-				*
-				* max_lane_speed = <>;
-				* Max lane speed in Kbit/s
-				*
-				* min_bits_per_pixel = <>;
-				* Min bits per pixel
-				*
-				* vi_peak_byte_per_pixel = <>;
-				* Max byte per pixel for the VI ISO case
-				*
-				* vi_bw_margin_pct = <>;
-				* Vi bandwidth margin in percentage
-				*
-				* max_pixel_rate = <>;
-				* Max pixel rate in Kpixel/s for the ISP ISO case
-				*
-				* isp_peak_byte_per_pixel = <>;
-				* Max byte per pixel for the ISP ISO case
-				*
-				* isp_bw_margin_pct = <>;
-				* Isp bandwidth margin in percentage
-				*/
-				num_csi_lanes = <4>;
-				max_lane_speed = <1500000>;
-				min_bits_per_pixel = <10>;
-				vi_peak_byte_per_pixel = <2>;
-				vi_bw_margin_pct = <25>;
-				max_pixel_rate = <750000>;
-				isp_peak_byte_per_pixel = <5>;
-				isp_bw_margin_pct = <25>;
-
-				/**
-				* The general guideline for naming badge_info contains 3 parts, and is as follows,
-				* The first part is the camera_board_id for the module; if the module is in a FFD
-				* platform, then use the platform name for this part.
-				* The second part contains the position of the module, ex. "rear" or "front".
-				* The third part contains the last 6 characters of a part number which is found
-				* in the module's specsheet from the vender.
-				*/
-				modules {
-					module0 {
-						badge = "p3785_ltx6911";
-						position = "bottom";
-						orientation = "1";
-						drivernode0 {
-							/* Declare PCL support driver (classically known as guid)  */
-							pcl_id = "v4l2_sensor";
-							/* Driver v4l2 device name */
-							devname = "p3785 2-0056";
-							/* Declare the device-tree hierarchy to driver instance */
-							proc-device-tree = "/proc/device-tree/bus@0/i2c@3180000/p3785@56";
-						};
-					};
+		/**
+		* The general guideline for naming badge_info contains 3 parts, and is as follows,
+		* The first part is the camera_board_id for the module; if the module is in a FFD
+		* platform, then use the platform name for this part.
+		* The second part contains the position of the module, ex. "rear" or "front".
+		* The third part contains the last 6 characters of a part number which is found
+		* in the module's specsheet from the vender.
+		*/
+		modules {
+			module0 {
+				badge = "p3785_ltx6911";
+				position = "bottom";
+				orientation = "1";
+				drivernode0 {
+					/* Declare PCL support driver (classically known as guid)  */
+					pcl_id = "v4l2_sensor";
+					/* Driver v4l2 device name */
+					devname = "p3785 2-0056";
+					/* Declare the device-tree hierarchy to driver instance */
+					proc-device-tree = "/proc/device-tree/bus@0/i2c@3180000/p3785@56";
 				};
 			};
+		};
+	};
 };
diff --git a/nv-platform/tegra234-dcb-p3737-0000-p3701-0000.dtsi b/nv-platform/tegra234-dcb-p3737-0000-p3701-0000.dtsi
index 545ed01..4f51bb0 100644
--- a/nv-platform/tegra234-dcb-p3737-0000-p3701-0000.dtsi
+++ b/nv-platform/tegra234-dcb-p3737-0000-p3701-0000.dtsi
@@ -2,533 +2,533 @@
 // SPDX-FileCopyrightText: Copyright (c) 2021-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
 
 / {
-			display@13800000 {
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-			};
+	display@13800000 {
+		nvidia,dcb-image = [
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+			00 0a 02 00 00 08 02 00 20 04 02 00 80 00 00 00
+			80 00 00 00 80 00 00 00 80 00 00 00 20 00 00 00
+			20 00 03 00 00 0c 03 00 00 0a 03 00 80 0b 03 00
+			80 0b 03 00 80 0b 03 00 80 0b 03 71 71 6e 14 c0
+			61 40 ff ff 3f fa 00 00 c0 01 74 05 00 6e 14 c0
+			61 40 f7 ff ff ff 08 00 00 00 6e b8 c1 61 40 ff
+			ff 3f 81 00 03 00 08 6e 00 23 61 40 ff ff 83 fc
+			00 00 00 00 71 58 40 c0 61 40 10 00 00 0a 1d 00
+			00 0a 04 00 00 08 04 00 20 04 04 00 80 00 00 00
+			80 00 00 00 80 00 00 00 80 00 00 00 20 00 00 00
+			20 00 1d 00 00 0c 1d 00 00 0a 1d 00 80 0a 1d 00
+			80 0a 1d 00 80 0a 1d 00 80 0a 1d 71 6e 00 23 61
+			40 ff ff fc fc 00 00 02 03 71 7a 14 c0 61 40 14
+			00 c2 0d 74 05 00 6e 14 c0 61 40 ff ff bf ff 00
+			00 00 00 74 14 00 71 6e 14 c0 61 40 ff ff ff f2
+			00 00 00 00 74 0a 00 6e 00 23 61 40 ff ff fc ff
+			00 00 01 00 6e 0c c1 61 60 ff bf ff ff 00 40 00
+			00 6e 14 c0 61 40 ff ff 7f ff 00 00 00 00 6e 30
+			c1 61 60 f0 ff ff ff 0f 00 00 00 6e 34 c0 61 40
+			ff ff ee 7f 00 00 00 80 56 17 ff 6e 0c c1 61 60
+			fc ff ff ff 01 00 00 00 6e 30 c1 61 60 0f ff ff
+			ff f0 00 00 00 74 0a 00 6e 30 c1 61 60 0f ff ff
+			ff 00 00 00 00 6e 10 c1 61 40 e0 e0 e0 e0 00 00
+			00 00 6e 2c c1 61 40 e0 e0 e0 e0 00 00 00 00 3a
+			05 15 6e 40 c1 61 60 fd ff ff ff 02 00 00 00 98
+			0a 01 00 00 01 fe 01 71 98 02 01 00 00 01 d0 00
+			6e 10 c1 61 40 e0 e0 e0 e0 10 10 10 10 6e 2c c1
+			61 40 e0 e0 e0 e0 10 10 10 10 71 5f 0c c1 61 60
+			00 01 40 ff 40 00 00 00 00 40 65 61 80 fe bf 00
+			bf 3a 00 03 5b 59 1b 72 71 3a 07 01 38 6e 40 c1
+			61 60 fe ff ff ff 01 00 00 00 72 5b ad 1c 52 e8
+			df 00 71 71 6e 0c c1 61 60 fe ff 00 ff 00 00 00
+			00 6e 30 c1 61 40 f0 ff ff ff 00 00 00 00 6e b0
+			c1 61 40 f0 ff ff ff 00 00 00 00 6e 34 c0 61 40
+			ff ff ee 7f 00 00 11 80 56 17 ff 6e 14 c0 61 40
+			ff ff 7f ff 00 00 80 00 6e 00 23 61 40 ff ff fc
+			ff 00 00 02 00 74 05 00 6e 14 c0 61 40 ff ff ff
+			f2 00 00 00 0d 74 05 00 6e 14 c0 61 40 ff ff bf
+			ff 00 00 40 00 74 05 00 6e 14 c0 61 40 f7 ff ff
+			ff 08 00 00 00 6e 0c c0 61 40 ff f0 f0 f0 00 03
+			05 05 6e b8 c1 61 40 ff ff ff 81 00 03 00 08 6e
+			00 23 61 40 ff ff 83 fc 00 00 00 00 6e 40 c1 61
+			60 fe ff ff ff 00 00 00 00 71 6e 0c c1 61 60 fd
+			ff ff ff 02 00 00 00 6e 30 c1 61 60 ff ff bf ff
+			00 00 40 00 71 10 05 40 01 01 00 00 00 00 0a 10
+			00 00 00 a0 40 00 00 80 40 00 00 80 40 00 00 80
+			40 00 00 80 40 00 00 80 40 00 00 20 00 00 32 10
+			80 00 0a 90 80 00 00 80 80 00 00 80 80 00 00 80
+			80 00 00 80 80 00 00 80 80 00 71 71 6e 40 65 61
+			80 fe ff ff ff 00 00 00 00 71 71 98 07 01 00 00
+			01 ef 10 71 98 07 01 00 00 01 ef 00 71 58 40 c0
+			61 40 10 00 00 00 00 32 10 00 00 00 a0 40 00 00
+			80 40 00 00 80 40 00 00 80 40 00 00 80 40 00 00
+			80 40 00 00 20 00 00 32 10 80 00 96 90 80 00 00
+			80 80 00 00 80 80 00 00 80 80 00 00 80 80 00 00
+			80 80 00 71 42 15 02 07 13 04 03 0a 04 28 23 28
+			23 01 04 04 06 45 1c 00 00 00 00 00 00 00 00 00
+			00 00 00 00 00 00 00 14 00 02 19 0a 03 1e 14 04
+			2b 28 06 1e 00 03 25 0f 04 2f 21 06 28 00 04 32
+			14 06 3c 00 06 14 00 02 19 0a 03 1e 14 04 2b 28
+			06 1e 00 03 25 0f 04 2f 21 06 28 00 04 32 14 06
+			3c 00 06 14 00 02 19 0a 03 1e 14 04 2b 28 06 1e
+			00 03 25 0f 04 2f 21 06 28 00 04 32 14 06 3c 00
+			06 0f 00 02 16 09 03 1d 0e 04 27 12 06 17 00 03
+			21 09 04 27 0e 06 1f 00 04 27 09 06 27 00 06 a7
+			1d 00 00 2f 1e 00 00 b7 1e 00 00 3f 1f 00 00 c7
+			1f 00 00 4f 20 00 00 10 08 00 00 00 10 08 00 1e
+			00 00 00 00 01 05 05 00 40 00 00 00 00 00 30 14
+			00 00 00 00 01 05 05 00 40 00 00 00 00 00 30 10
+			00 00 00 00 01 05 05 00 40 00 00 00 00 00 30 0c
+			00 00 00 00 01 05 05 00 40 00 00 00 00 00 30 0a
+			00 00 00 00 01 05 05 00 40 00 00 00 00 00 30 09
+			00 00 00 00 01 05 05 00 40 00 00 00 00 00 30 08
+			00 00 00 00 01 05 05 00 40 00 00 00 00 00 30 06
+			00 00 00 00 01 05 05 00 40 00 00 00 00 00 30 10
+			08 00 00 00 10 08 00 1e 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 14 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 10 00 00 00 00 03 00 01 00
+			50 00 00 00 00 00 00 0c 00 00 00 00 03 00 01 00
+			50 00 00 00 00 00 00 0a 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 09 00 00 00 00 03 00 01 00
+			40 00 00 00 00 00 00 08 00 00 00 00 03 00 01 00
+			40 00 00 00 00 00 00 06 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 10 08 00 00 00 10 08 00 1e
+			00 00 00 00 00 05 05 00 00 00 00 00 00 00 00 14
+			00 00 00 00 00 05 05 00 00 00 00 00 00 00 00 10
+			00 00 00 00 03 00 01 00 50 00 00 00 00 00 00 0c
+			00 00 00 00 03 00 01 00 50 00 00 00 00 00 00 0a
+			00 00 00 00 00 05 05 00 00 00 00 00 00 00 00 09
+			00 00 00 00 03 00 01 00 40 00 00 00 00 00 00 08
+			00 00 00 00 03 00 01 00 40 00 00 00 00 00 00 06
+			00 00 00 00 00 05 05 00 00 00 00 00 00 00 00 10
+			08 00 00 00 10 08 00 1e 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 14 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 10 00 00 00 00 03 00 01 00
+			50 00 00 00 00 00 00 0c 00 00 00 00 03 00 01 00
+			50 00 00 00 00 00 00 0a 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 09 00 00 00 00 03 00 01 00
+			40 00 00 00 00 00 00 08 00 00 00 00 03 00 01 00
+			40 00 00 00 00 00 00 06 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 10 08 00 00 00 10 08 00 1e
+			00 00 00 00 00 05 05 00 00 00 00 00 00 00 00 14
+			00 00 00 00 00 05 05 00 00 00 00 00 00 00 00 10
+			00 00 00 00 03 00 01 00 50 00 00 00 00 00 00 0c
+			00 00 00 00 03 00 01 00 50 00 00 00 00 00 00 0a
+			00 00 00 00 00 05 05 00 00 00 00 00 00 00 00 09
+			00 00 00 00 03 00 01 00 40 00 00 00 00 00 00 08
+			00 00 00 00 03 00 01 00 40 00 00 00 00 00 00 06
+			00 00 00 00 00 05 05 00 00 00 00 00 00 00 00 10
+			08 00 00 00 10 08 00 1e 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 14 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 10 00 00 00 00 03 00 01 00
+			50 00 00 00 00 00 00 0c 00 00 00 00 03 00 01 00
+			50 00 00 00 00 00 00 0a 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 09 00 00 00 00 03 00 01 00
+			40 00 00 00 00 00 00 08 00 00 00 00 03 00 01 00
+			40 00 00 00 00 00 00 06 00 00 00 00 00 05 05 00
+			00 00 00 00 00 00 00 ];
+	};
 };
diff --git a/nv-platform/tegra234-p3701-0000-prod-overlay.dtsi b/nv-platform/tegra234-p3701-0000-prod-overlay.dtsi
index b3b4b5f..0939ed4 100644
--- a/nv-platform/tegra234-p3701-0000-prod-overlay.dtsi
+++ b/nv-platform/tegra234-p3701-0000-prod-overlay.dtsi
@@ -2,321 +2,321 @@
 // SPDX-FileCopyrightText: Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
 
 / {
-			bus@0 {
-				aon@c000000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							board {
-								prod = <
-									0 0x00260004 0x0000003f 0x00000020>;            //SPI_COMMAND2_0
-							};
-						};
-					};
-				};
-
-				i2c@3160000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x003c0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x00160000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-					};
-				};
-
-				i2c@3180000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x00160000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x004f0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000708              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x08080808>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-					};
-				};
-
-				i2c@3190000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x003c0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-					};
-				};
-
-				i2c@31c0000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x003c0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-					};
-				};
-
-				i2c@31e0000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x003c0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-					};
-				};
-
-				i2c@c240000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x00160000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-					};
-				};
-
-				i2c@c250000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							board {
-								prod = <
-									0 0x0000006c 0xffff0000 0x00160000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
-									0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
-									0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
-							};
-						};
-					};
-				};
-
-				mttcan@c310000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_can_2m_1m {
-							board {
-								prod = <
-									0 0x00000048 0x00007f00 0x00000000>;            //M_TTCAN_CORE_TDCR_0
-							};
-						};
-						prod_c_can_5m {
-							board {
-								prod = <
-									0 0x00000048 0x00007f00 0x00000600>;            //M_TTCAN_CORE_TDCR_0
-							};
-						};
-						prod_c_can_8m {
-							board {
-								prod = <
-									0 0x00000048 0x00007f00 0x00000400>;            //M_TTCAN_CORE_TDCR_0
-							};
-						};
-					};
-				};
-
-				mttcan@c320000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_can_2m_1m {
-							board {
-								prod = <
-									1 0x0000f048 0x00007f00 0x00000000>;            //M_TTCAN_CORE_TDCR_0
-							};
-						};
-						prod_c_can_5m {
-							board {
-								prod = <
-									1 0x0000f048 0x00007f00 0x00000600>;            //M_TTCAN_CORE_TDCR_0
-							};
-						};
-						prod_c_can_8m {
-							board {
-								prod = <
-									1 0x0000f048 0x00007f00 0x00000400>;            //M_TTCAN_CORE_TDCR_0
-							};
-						};
-					};
-				};
-
-				spi@3210000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							board {
-								prod = <
-									0 0x00000004 0x0000003f 0x00000030>;            //SPI_COMMAND2_0
-							};
-						};
-					};
-				};
-
-				spi@3230000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							board {
-								prod = <
-									0 0x00000004 0x0000003f 0x00000020>;            //SPI_COMMAND2_0
-							};
-						};
-					};
-				};
-
-				spi@3270000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							board {
-								prod = <
-									0 0x00000004 0x00007cff 0x00000010              //QSPI_COMMAND2_0
-									0 0x000001ec 0x01f1f000 0x00a0a000>;            //QSPI_QSPI_COMP_CONTROL_0
-							};
-						};
-					};
-				};
-
-				ufshci@2500000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							board {
-								prod = <
-									0x02470000 0x00002220 0xffffffff 0x001aadb5            //MPHY_RX_APB_VENDOR3B_0
-									0x02480000 0x00002220 0xffffffff 0x001aadb5>;            //MPHY_RX_APB_VENDOR3B_0
-							};
-						};
-					};
-				};
-
-				padctl@3520000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							nvidia,xusb-pad0-ls-rise-slew = <0x6>;
-							nvidia,xusb-pad0-ls-fall-slew = <0x6>;
-							nvidia,xusb-pad0-hs-txeq = <0x2>;
-							nvidia,xusb-pad1-ls-rise-slew = <0x6>;
-							nvidia,xusb-pad1-ls-fall-slew = <0x6>;
-							nvidia,xusb-pad1-hs-txeq = <0x2>;
-							nvidia,xusb-pad2-ls-rise-slew = <0x6>;
-							nvidia,xusb-pad2-ls-fall-slew = <0x6>;
-							nvidia,xusb-pad2-hs-txeq = <0x0>;
-							nvidia,xusb-pad3-ls-rise-slew = <0x6>;
-							nvidia,xusb-pad3-ls-fall-slew = <0x6>;
-							board {
-								prod = <
-									0 0x00000088 0x01fe0000 0x00cc0000              //XUSB_PADCTL_USB2_OTG_PAD0_CTL_0_0
-									0 0x00000094 0x0000000e 0x00000004              //XUSB_PADCTL_USB2_OTG_PAD0_CTL_3_0
-									0 0x000000c8 0x01fe0000 0x00cc0000              //XUSB_PADCTL_USB2_OTG_PAD1_CTL_0_0
-									0 0x000000d4 0x0000000e 0x00000004              //XUSB_PADCTL_USB2_OTG_PAD1_CTL_3_0
-									0 0x00000108 0x01fe0000 0x00cc0000              //XUSB_PADCTL_USB2_OTG_PAD2_CTL_0_0
-									0 0x00000114 0x0000000e 0x00000000              //XUSB_PADCTL_USB2_OTG_PAD2_CTL_3_0
-									0 0x00000148 0x01fe0000 0x00cc0000>;            //XUSB_PADCTL_USB2_OTG_PAD3_CTL_0_0
-							};
-						};
+	bus@0 {
+		aon@c000000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					board {
+						prod = <
+							0 0x00260004 0x0000003f 0x00000020>;            //SPI_COMMAND2_0
 					};
 				};
 			};
+		};
+
+		i2c@3160000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x003c0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x00160000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+			};
+		};
+
+		i2c@3180000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x00160000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x004f0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000708              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x08080808>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+			};
+		};
+
+		i2c@3190000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x003c0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+			};
+		};
+
+		i2c@31c0000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x003c0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+			};
+		};
+
+		i2c@31e0000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x003c0000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+			};
+		};
+
+		i2c@c240000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x00160000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+			};
+		};
+
+		i2c@c250000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					board {
+						prod = <
+							0 0x0000006c 0xffff0000 0x00160000              //I2C_I2C_CLK_DIVISOR_REGISTER_0
+							0 0x00000094 0x0000ffff 0x00000202              //I2C_I2C_INTERFACE_TIMING_0_0
+							0 0x00000098 0xffffffff 0x02020202>;            //I2C_I2C_INTERFACE_TIMING_1_0
+					};
+				};
+			};
+		};
+
+		mttcan@c310000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_can_2m_1m {
+					board {
+						prod = <
+							0 0x00000048 0x00007f00 0x00000000>;            //M_TTCAN_CORE_TDCR_0
+					};
+				};
+				prod_c_can_5m {
+					board {
+						prod = <
+							0 0x00000048 0x00007f00 0x00000600>;            //M_TTCAN_CORE_TDCR_0
+					};
+				};
+				prod_c_can_8m {
+					board {
+						prod = <
+							0 0x00000048 0x00007f00 0x00000400>;            //M_TTCAN_CORE_TDCR_0
+					};
+				};
+			};
+		};
+
+		mttcan@c320000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_can_2m_1m {
+					board {
+						prod = <
+							1 0x0000f048 0x00007f00 0x00000000>;            //M_TTCAN_CORE_TDCR_0
+					};
+				};
+				prod_c_can_5m {
+					board {
+						prod = <
+							1 0x0000f048 0x00007f00 0x00000600>;            //M_TTCAN_CORE_TDCR_0
+					};
+				};
+				prod_c_can_8m {
+					board {
+						prod = <
+							1 0x0000f048 0x00007f00 0x00000400>;            //M_TTCAN_CORE_TDCR_0
+					};
+				};
+			};
+		};
+
+		spi@3210000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					board {
+						prod = <
+							0 0x00000004 0x0000003f 0x00000030>;            //SPI_COMMAND2_0
+					};
+				};
+			};
+		};
+
+		spi@3230000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					board {
+						prod = <
+							0 0x00000004 0x0000003f 0x00000020>;            //SPI_COMMAND2_0
+					};
+				};
+			};
+		};
+
+		spi@3270000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					board {
+						prod = <
+							0 0x00000004 0x00007cff 0x00000010              //QSPI_COMMAND2_0
+							0 0x000001ec 0x01f1f000 0x00a0a000>;            //QSPI_QSPI_COMP_CONTROL_0
+					};
+				};
+			};
+		};
+
+		ufshci@2500000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					board {
+						prod = <
+							0x02470000 0x00002220 0xffffffff 0x001aadb5            //MPHY_RX_APB_VENDOR3B_0
+							0x02480000 0x00002220 0xffffffff 0x001aadb5>;            //MPHY_RX_APB_VENDOR3B_0
+					};
+				};
+			};
+		};
+
+		padctl@3520000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					nvidia,xusb-pad0-ls-rise-slew = <0x6>;
+					nvidia,xusb-pad0-ls-fall-slew = <0x6>;
+					nvidia,xusb-pad0-hs-txeq = <0x2>;
+					nvidia,xusb-pad1-ls-rise-slew = <0x6>;
+					nvidia,xusb-pad1-ls-fall-slew = <0x6>;
+					nvidia,xusb-pad1-hs-txeq = <0x2>;
+					nvidia,xusb-pad2-ls-rise-slew = <0x6>;
+					nvidia,xusb-pad2-ls-fall-slew = <0x6>;
+					nvidia,xusb-pad2-hs-txeq = <0x0>;
+					nvidia,xusb-pad3-ls-rise-slew = <0x6>;
+					nvidia,xusb-pad3-ls-fall-slew = <0x6>;
+					board {
+						prod = <
+							0 0x00000088 0x01fe0000 0x00cc0000              //XUSB_PADCTL_USB2_OTG_PAD0_CTL_0_0
+							0 0x00000094 0x0000000e 0x00000004              //XUSB_PADCTL_USB2_OTG_PAD0_CTL_3_0
+							0 0x000000c8 0x01fe0000 0x00cc0000              //XUSB_PADCTL_USB2_OTG_PAD1_CTL_0_0
+							0 0x000000d4 0x0000000e 0x00000004              //XUSB_PADCTL_USB2_OTG_PAD1_CTL_3_0
+							0 0x00000108 0x01fe0000 0x00cc0000              //XUSB_PADCTL_USB2_OTG_PAD2_CTL_0_0
+							0 0x00000114 0x0000000e 0x00000000              //XUSB_PADCTL_USB2_OTG_PAD2_CTL_3_0
+							0 0x00000148 0x01fe0000 0x00cc0000>;            //XUSB_PADCTL_USB2_OTG_PAD3_CTL_0_0
+					};
+				};
+			};
+		};
+	};
 };
diff --git a/nv-platform/tegra234-p3701-0000.dtsi b/nv-platform/tegra234-p3701-0000.dtsi
index 42fd8eb..7ca61d7 100644
--- a/nv-platform/tegra234-p3701-0000.dtsi
+++ b/nv-platform/tegra234-p3701-0000.dtsi
@@ -4,146 +4,146 @@
 #include "tegra234-p3701-0000-prod-overlay.dtsi"
 
 / {
-			bus@0 {
-				i2c@c240000 {
-					ina3221@40 {
-						compatible = "ti,ina3221";
-						reg = <0x40>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#io-channel-cells = <1>;
-						channel@0 {
-							reg = <0x0>;
-							label = "VDD_GPU_SOC";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-						channel@1 {
-							reg = <0x1>;
-							label = "VDD_CPU_CV";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-						channel@2 {
-							reg = <0x2>;
-							label = "VIN_SYS_5V0";
-							shunt-resistor-micro-ohms = <2000>;
-							summation-bypass;
-						};
-					};
-
-					ina3221@41 {
-						compatible = "ti,ina3221";
-						reg = <0x41>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#io-channel-cells = <1>;
-						channel@0 {
-							reg = <0x0>;
-							status = "disabled";
-						};
-						channel@1 {
-							reg = <0x1>;
-							label = "VDDQ_VDD2_1V8AO";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-						channel@2 {
-							reg = <0x2>;
-							status = "disabled";
-						};
-					};
+	bus@0 {
+		i2c@c240000 {
+			ina3221@40 {
+				compatible = "ti,ina3221";
+				reg = <0x40>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#io-channel-cells = <1>;
+				channel@0 {
+					reg = <0x0>;
+					label = "VDD_GPU_SOC";
+					shunt-resistor-micro-ohms = <2000>;
 				};
-
-				spi@3270000 {
-					flash@0 {
-						spi-max-frequency = <51000000>;
-						spi-tx-bus-width = <1>;
-						spi-rx-bus-width = <1>;
-					};
+				channel@1 {
+					reg = <0x1>;
+					label = "VDD_CPU_CV";
+					shunt-resistor-micro-ohms = <2000>;
 				};
-
-				nvrng@3ae0000 {
-					status = "okay";
+				channel@2 {
+					reg = <0x2>;
+					label = "VIN_SYS_5V0";
+					shunt-resistor-micro-ohms = <2000>;
+					summation-bypass;
 				};
 			};
 
-			hdr40_vdd_3v3: regulator@3 {
-				compatible = "regulator-fixed";
-				reg = <3>;
-				regulator-name = "vdd-3v3-sys";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-			};
-
-			bpmp {
-				i2c {
-					vrs@3c {
-						compatible = "nvidia,vrs-pseq";
-						reg = <0x3c>;
-						interrupt-parent = <&pmc>;
-						/* VRS Wake ID is 24 */
-						interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
-						interrupt-controller;
-						#interrupt-cells = <2>;
-						status = "okay";
-					};
-
-					tegra_tmp451: thermal-sensor@4c {
-						compatible = "ti,tmp451";
-						reg = <0x4c>;
-						vcc-supply = <&vdd_1v8_ao>;
-						#thermal-sensor-cells = <1>;
-						status = "okay";
-					};
-
-					vrs11_1@20 {
-						compatible = "nvidia,vrs11";
-						reg = <0x20>;
-						rail-name-loopA = "GPU";
-						rail-name-loopB = "CPU";
-					};
-
-					vrs11_2@22 {
-						compatible = "nvidia,vrs11";
-						reg = <0x22>;
-						rail-name-loopA = "SOC";
-						rail-name-loopB = "CV";
-					};
+			ina3221@41 {
+				compatible = "ti,ina3221";
+				reg = <0x41>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#io-channel-cells = <1>;
+				channel@0 {
+					reg = <0x0>;
+					status = "disabled";
+				};
+				channel@1 {
+					reg = <0x1>;
+					label = "VDDQ_VDD2_1V8AO";
+					shunt-resistor-micro-ohms = <2000>;
+				};
+				channel@2 {
+					reg = <0x2>;
+					status = "disabled";
 				};
 			};
+		};
 
-			thermal-zones {
-				tboard-thermal {
-					polling-delay = <1000>;
-					polling-delay-passive = <1000>;
-					thermal-sensors = <&tegra_tmp451 0>;
-					status = "okay";
-				};
+		spi@3270000 {
+			flash@0 {
+				spi-max-frequency = <51000000>;
+				spi-tx-bus-width = <1>;
+				spi-rx-bus-width = <1>;
+			};
+		};
 
-				tdiode-thermal {
-					polling-delay = <1000>;
-					polling-delay-passive = <1000>;
-					thermal-sensors = <&tegra_tmp451 1>;
-					status = "okay";
-				};
+		nvrng@3ae0000 {
+			status = "okay";
+		};
+	};
+
+	hdr40_vdd_3v3: regulator@3 {
+		compatible = "regulator-fixed";
+		reg = <3>;
+		regulator-name = "vdd-3v3-sys";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	bpmp {
+		i2c {
+			vrs@3c {
+				compatible = "nvidia,vrs-pseq";
+				reg = <0x3c>;
+				interrupt-parent = <&pmc>;
+				/* VRS Wake ID is 24 */
+				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				status = "okay";
 			};
 
-			eeprom-manager {
-				bus@0 {
-					i2c-bus = <&gen1_i2c>;
-					eeprom@0 {
-						slave-address = <0x50>;
-						label = "cvm";
-					};
-				};
+			tegra_tmp451: thermal-sensor@4c {
+				compatible = "ti,tmp451";
+				reg = <0x4c>;
+				vcc-supply = <&vdd_1v8_ao>;
+				#thermal-sensor-cells = <1>;
+				status = "okay";
 			};
 
-			reserved-memory {
-				linux,cma { /* Needed for nvgpu comptags */
-					compatible = "shared-dma-pool";
-					reusable;
-					size = <0x0 0x10000000>; /* 256MB */
-					alignment = <0x0 0x10000>;
-					linux,cma-default;
-					status = "okay";
-				};
+			vrs11_1@20 {
+				compatible = "nvidia,vrs11";
+				reg = <0x20>;
+				rail-name-loopA = "GPU";
+				rail-name-loopB = "CPU";
 			};
+
+			vrs11_2@22 {
+				compatible = "nvidia,vrs11";
+				reg = <0x22>;
+				rail-name-loopA = "SOC";
+				rail-name-loopB = "CV";
+			};
+		};
+	};
+
+	thermal-zones {
+		tboard-thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <1000>;
+			thermal-sensors = <&tegra_tmp451 0>;
+			status = "okay";
+		};
+
+		tdiode-thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <1000>;
+			thermal-sensors = <&tegra_tmp451 1>;
+			status = "okay";
+		};
+	};
+
+	eeprom-manager {
+		bus@0 {
+			i2c-bus = <&gen1_i2c>;
+			eeprom@0 {
+				slave-address = <0x50>;
+				label = "cvm";
+			};
+		};
+	};
+
+	reserved-memory {
+		linux,cma { /* Needed for nvgpu comptags */
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x10000000>; /* 256MB */
+			alignment = <0x0 0x10000>;
+			linux,cma-default;
+			status = "okay";
+		};
+	};
 };
diff --git a/nv-platform/tegra234-p3701-0008.dtsi b/nv-platform/tegra234-p3701-0008.dtsi
index 3f46fd8..ca585b5 100644
--- a/nv-platform/tegra234-p3701-0008.dtsi
+++ b/nv-platform/tegra234-p3701-0008.dtsi
@@ -2,289 +2,289 @@
 // SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
 
 / {
-			bus@0 {
-				i2c@c240000 {
-					ina3221@40 {
-						compatible = "ti,ina3221";
-						reg = <0x40>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#io-channel-cells = <1>;
-						channel@0 {
-							reg = <0x0>;
-							label = "VDD_GPU_SOC";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-						channel@1 {
-							reg = <0x1>;
-							label = "VDD_CPU_CV";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-						channel@2 {
-							reg = <0x2>;
-							label = "VIN_SYS_5V0";
-							shunt-resistor-micro-ohms = <2000>;
-							summation-bypass;
-						};
-					};
-
-					ina3221@41 {
-						compatible = "ti,ina3221";
-						reg = <0x41>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#io-channel-cells = <1>;
-						channel@0 {
-							reg = <0x0>;
-							status = "disabled";
-						};
-						channel@1 {
-							reg = <0x1>;
-							label = "VDDQ_VDD2_1V8AO";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-						channel@2 {
-							reg = <0x2>;
-							status = "disabled";
-						};
-					};
+	bus@0 {
+		i2c@c240000 {
+			ina3221@40 {
+				compatible = "ti,ina3221";
+				reg = <0x40>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#io-channel-cells = <1>;
+				channel@0 {
+					reg = <0x0>;
+					label = "VDD_GPU_SOC";
+					shunt-resistor-micro-ohms = <2000>;
 				};
-
-				i2c@c250000 {
-					ina3221@41 {
-						compatible = "ti,ina3221";
-						reg = <0x41>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#io-channel-cells = <1>;
-						channel@0 {
-							reg = <0x0>;
-							label = "CVB_ATX_12V";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-						channel@1 {
-							reg = <0x1>;
-							label = "CVB_ATX_3V3";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-						channel@2 {
-							reg = <0x2>;
-							label = "CVB_ATX_5V";
-							shunt-resistor-micro-ohms = <2000>;
-						};
-					};
-
-					 ina219@44 {
-						compatible = "ti,ina219";
-						reg = <0x44>;
-						shunt-resistor = <2000>;
-						label = "CVB_ATX_12V_8P";
-					};
+				channel@1 {
+					reg = <0x1>;
+					label = "VDD_CPU_CV";
+					shunt-resistor-micro-ohms = <2000>;
 				};
-
-				spi@3270000 {
-					flash@0 {
-						spi-max-frequency = <51000000>;
-						spi-tx-bus-width = <1>;
-						spi-rx-bus-width = <1>;
-					};
-				};
-
-				nvrng@3ae0000 {
-					status = "okay";
-				};
-
-				gpu@17000000 {
-					status = "okay";
+				channel@2 {
+					reg = <0x2>;
+					label = "VIN_SYS_5V0";
+					shunt-resistor-micro-ohms = <2000>;
+					summation-bypass;
 				};
 			};
 
-			bpmp {
-				i2c {
-					vrs@3c {
-						compatible = "nvidia,vrs-pseq";
-						reg = <0x3c>;
-						interrupt-parent = <&pmc>;
-						/* VRS Wake ID is 24 */
-						interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
-						interrupt-controller;
-						#interrupt-cells = <2>;
-						status = "okay";
-					};
-
-					vrs11_1@20 {
-						compatible = "nvidia,vrs11";
-						reg = <0x20>;
-						rail-name-loopA = "GPU";
-						rail-name-loopB = "CPU";
-					};
-
-					vrs11_2@22 {
-						compatible = "nvidia,vrs11";
-						reg = <0x22>;
-						rail-name-loopA = "SOC";
-						rail-name-loopB = "CV";
-					};
-
-					tegra_tmp451: thermal-sensor@4c {
-						compatible = "ti,tmp451";
-						reg = <0x4c>;
-						vcc-supply = <&vdd_1v8_ao>;
-						#thermal-sensor-cells = <1>;
-						status = "okay";
-					};
+			ina3221@41 {
+				compatible = "ti,ina3221";
+				reg = <0x41>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#io-channel-cells = <1>;
+				channel@0 {
+					reg = <0x0>;
+					status = "disabled";
+				};
+				channel@1 {
+					reg = <0x1>;
+					label = "VDDQ_VDD2_1V8AO";
+					shunt-resistor-micro-ohms = <2000>;
+				};
+				channel@2 {
+					reg = <0x2>;
+					status = "disabled";
+				};
+			};
+		};
 
+		i2c@c250000 {
+			ina3221@41 {
+				compatible = "ti,ina3221";
+				reg = <0x41>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#io-channel-cells = <1>;
+				channel@0 {
+					reg = <0x0>;
+					label = "CVB_ATX_12V";
+					shunt-resistor-micro-ohms = <2000>;
+				};
+				channel@1 {
+					reg = <0x1>;
+					label = "CVB_ATX_3V3";
+					shunt-resistor-micro-ohms = <2000>;
+				};
+				channel@2 {
+					reg = <0x2>;
+					label = "CVB_ATX_5V";
+					shunt-resistor-micro-ohms = <2000>;
 				};
 			};
 
-			eeprom-manager {
-				bus@0 {
-					i2c-bus = <&gen1_i2c>;
-					eeprom@0 {
-						slave-address = <0x50>;
-						label = "cvm";
-					};
-				};
+			 ina219@44 {
+				compatible = "ti,ina219";
+				reg = <0x44>;
+				shunt-resistor = <2000>;
+				label = "CVB_ATX_12V_8P";
+			};
+		};
+
+		spi@3270000 {
+			flash@0 {
+				spi-max-frequency = <51000000>;
+				spi-tx-bus-width = <1>;
+				spi-rx-bus-width = <1>;
+			};
+		};
+
+		nvrng@3ae0000 {
+			status = "okay";
+		};
+
+		gpu@17000000 {
+			status = "okay";
+		};
+	};
+
+	bpmp {
+		i2c {
+			vrs@3c {
+				compatible = "nvidia,vrs-pseq";
+				reg = <0x3c>;
+				interrupt-parent = <&pmc>;
+				/* VRS Wake ID is 24 */
+				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				status = "okay";
 			};
 
-			opp-table-cluster0 {
-				opp-1971200000 {
-					opp-hz = /bits/ 64 <1971200000>;
-					opp-peak-kBps = <3200000>;
-				};
+			vrs11_1@20 {
+				compatible = "nvidia,vrs11";
+				reg = <0x20>;
+				rail-name-loopA = "GPU";
+				rail-name-loopB = "CPU";
 			};
 
-			opp-table-cluster1 {
-				opp-1971200000 {
-					opp-hz = /bits/ 64 <1971200000>;
-					opp-peak-kBps = <3200000>;
-				};
+			vrs11_2@22 {
+				compatible = "nvidia,vrs11";
+				reg = <0x22>;
+				rail-name-loopA = "SOC";
+				rail-name-loopB = "CV";
 			};
 
-			opp-table-cluster2 {
-				opp-1971200000 {
-					opp-hz = /bits/ 64 <1971200000>;
-					opp-peak-kBps = <3200000>;
-				};
+			tegra_tmp451: thermal-sensor@4c {
+				compatible = "ti,tmp451";
+				reg = <0x4c>;
+				vcc-supply = <&vdd_1v8_ao>;
+				#thermal-sensor-cells = <1>;
+				status = "okay";
 			};
 
-			thermal-zones {
-				cpu-thermal {
-					trips {
-						cpu-sw-slowdown {
-							temperature = <112000>;
-						};
+		};
+	};
 
-						cpu-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
+	eeprom-manager {
+		bus@0 {
+			i2c-bus = <&gen1_i2c>;
+			eeprom@0 {
+				slave-address = <0x50>;
+				label = "cvm";
+			};
+		};
+	};
+
+	opp-table-cluster0 {
+		opp-1971200000 {
+			opp-hz = /bits/ 64 <1971200000>;
+			opp-peak-kBps = <3200000>;
+		};
+	};
+
+	opp-table-cluster1 {
+		opp-1971200000 {
+			opp-hz = /bits/ 64 <1971200000>;
+			opp-peak-kBps = <3200000>;
+		};
+	};
+
+	opp-table-cluster2 {
+		opp-1971200000 {
+			opp-hz = /bits/ 64 <1971200000>;
+			opp-peak-kBps = <3200000>;
+		};
+	};
+
+	thermal-zones {
+		cpu-thermal {
+			trips {
+				cpu-sw-slowdown {
+					temperature = <112000>;
 				};
 
-				cv0-thermal {
-					trips {
-						cv0-sw-slowdown {
-							temperature = <112000>;
-						};
-
-						cv0-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
-				};
-
-				cv1-thermal {
-					trips {
-						cv1-sw-slowdown {
-							temperature = <112000>;
-						};
-
-						cv1-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
-				};
-
-				cv2-thermal {
-					trips {
-						cv2-sw-slowdown {
-							temperature = <112000>;
-						};
-
-						cv2-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
-				};
-
-				gpu-thermal {
-					trips {
-						gpu-sw-slowdown {
-							temperature = <112000>;
-						};
-
-						gpu-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
-				};
-
-				soc0-thermal {
-					trips {
-						soc0-sw-slowdown {
-							temperature = <112000>;
-						};
-
-						soc0-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
-				};
-
-				soc1-thermal {
-					trips {
-						soc1-sw-slowdown {
-							temperature = <112000>;
-						};
-
-						soc1-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
-				};
-
-				soc2-thermal {
-					trips {
-						soc2-sw-slowdown {
-							temperature = <112000>;
-						};
-
-						soc2-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
-				};
-
-				tj-thermal {
-					trips {
-						tj-sw-shutdown {
-							temperature = <117500>;
-						};
-					};
-				};
-
-				tboard-thermal {
-					polling-delay = <1000>;
-					polling-delay-passive = <1000>;
-					thermal-sensors = <&tegra_tmp451 0>;
-					status = "okay";
-				};
-
-				tdiode-thermal {
-					polling-delay = <1000>;
-					polling-delay-passive = <1000>;
-					thermal-sensors = <&tegra_tmp451 1>;
-					status = "okay";
+				cpu-sw-shutdown {
+					temperature = <117500>;
 				};
 			};
+		};
+
+		cv0-thermal {
+			trips {
+				cv0-sw-slowdown {
+					temperature = <112000>;
+				};
+
+				cv0-sw-shutdown {
+					temperature = <117500>;
+				};
+			};
+		};
+
+		cv1-thermal {
+			trips {
+				cv1-sw-slowdown {
+					temperature = <112000>;
+				};
+
+				cv1-sw-shutdown {
+					temperature = <117500>;
+				};
+			};
+		};
+
+		cv2-thermal {
+			trips {
+				cv2-sw-slowdown {
+					temperature = <112000>;
+				};
+
+				cv2-sw-shutdown {
+					temperature = <117500>;
+				};
+			};
+		};
+
+		gpu-thermal {
+			trips {
+				gpu-sw-slowdown {
+					temperature = <112000>;
+				};
+
+				gpu-sw-shutdown {
+					temperature = <117500>;
+				};
+			};
+		};
+
+		soc0-thermal {
+			trips {
+				soc0-sw-slowdown {
+					temperature = <112000>;
+				};
+
+				soc0-sw-shutdown {
+					temperature = <117500>;
+				};
+			};
+		};
+
+		soc1-thermal {
+			trips {
+				soc1-sw-slowdown {
+					temperature = <112000>;
+				};
+
+				soc1-sw-shutdown {
+					temperature = <117500>;
+				};
+			};
+		};
+
+		soc2-thermal {
+			trips {
+				soc2-sw-slowdown {
+					temperature = <112000>;
+				};
+
+				soc2-sw-shutdown {
+					temperature = <117500>;
+				};
+			};
+		};
+
+		tj-thermal {
+			trips {
+				tj-sw-shutdown {
+					temperature = <117500>;
+				};
+			};
+		};
+
+		tboard-thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <1000>;
+			thermal-sensors = <&tegra_tmp451 0>;
+			status = "okay";
+		};
+
+		tdiode-thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <1000>;
+			thermal-sensors = <&tegra_tmp451 1>;
+			status = "okay";
+		};
+	};
 };
diff --git a/nv-platform/tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi b/nv-platform/tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi
index d5fe1bb..55d8ca4 100644
--- a/nv-platform/tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi
+++ b/nv-platform/tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi
@@ -12,319 +12,319 @@
 #include "tegra234-dcb-p3737-0000-p3701-0000.dtsi"
 
 / {
-			cpus {
-				idle-states {
-					c7 {
-						status = "okay";
-					};
+	cpus {
+		idle-states {
+			c7 {
+				status = "okay";
+			};
+		};
+	};
+
+	nvpmodel {
+		status = "okay";
+	};
+
+	scf-pmu {
+		status = "okay";
+	};
+
+	soctherm-oc-event {
+		status = "okay";
+	};
+
+	thermal-zones {
+		cpu-thermal {
+			status = "okay";
+		};
+
+		cv0-thermal {
+			status = "okay";
+		};
+
+		cv1-thermal {
+			status = "okay";
+		};
+
+		cv2-thermal {
+			status = "okay";
+		};
+
+		gpu-thermal {
+			status = "okay";
+		};
+
+		soc0-thermal {
+			status = "okay";
+		};
+
+		soc1-thermal {
+			status = "okay";
+		};
+
+		soc2-thermal {
+			status = "okay";
+		};
+	};
+
+	bus@0 {
+		smmu_test {
+			compatible = "nvidia,smmu_test";
+			iommus = <&smmu_niso0 TEGRA234_SID_SMMU_TEST>;
+			status = "okay";
+		};
+
+		pinmux@2430000 {
+			status = "okay";
+		};
+
+		ufshci@2500000 {
+			status = "okay";
+		};
+
+		aconnect@2900000 {
+			ahub@2900800 {
+				i2s@2901200 {
+					status = "okay";
+				};
+
+				i2s@2901400 {
+					status = "okay";
+				};
+
+				dmic@2904000 {
+					status = "okay";
+				};
+
+				dmic@2904100 {
+					status = "okay";
+				};
+
+				dmic@2904300 {
+					status = "okay";
+				};
+
+				dspk@2905000 {
+					status = "okay";
+				};
+
+				dspk@2905100 {
+					status = "okay";
+				};
+
+				afc@2907000 {
+					status = "okay";
+				};
+
+				afc@2907100 {
+					status = "okay";
+				};
+
+				afc@2907200 {
+					status = "okay";
+				};
+
+				afc@2907300 {
+					status = "okay";
+				};
+
+				afc@2907400 {
+					status = "okay";
+				};
+
+				afc@2907500 {
+					status = "okay";
+				};
+
+				arad@290e400 {
+					status = "okay";
 				};
 			};
+		};
 
-			nvpmodel {
+		serial@3110000 {
+			compatible = "nvidia,tegra194-hsuart";
+			reset-names = "serial";
+			status = "okay";
+		};
+
+		i2c@3180000 {
+			status = "okay";
+		};
+
+		i2c@3190000 {
+			status = "okay";
+		};
+
+		i2c@31b0000 {
+			nvidia,hw-instance-id = <0x5>;
+			status = "okay";
+		};
+
+		i2c@31c0000 {
+			status = "okay";
+		};
+
+		serial@31d0000 {
+			current-speed = <115200>;
+		};
+
+		i2c@31e0000 {
+			status = "okay";
+		};
+
+		tachometer@39c0000 {
+			status = "okay";
+		};
+
+		hsp@3d00000 {
+			status = "okay";
+		};
+
+		ethernet@6800000 {
+			status = "okay";
+		};
+
+		aon@c000000 {
+			status = "okay";
+		};
+
+		hardware-timestamp@c1e0000 {
+			status = "okay";
+			nvidia,num-slices = <3>;
+		};
+
+		i2c@c240000 {
+			status = "okay";
+		};
+
+		hdr40_i2c1: i2c@c250000 {
+			status = "okay";
+		};
+
+		rtc@c2a0000 {
+			status = "okay";
+		};
+
+		mttcan@c310000 {
+			status = "okay";
+		};
+
+		mttcan@c320000 {
+			status = "okay";
+		};
+
+		actmon@d230000 {
+			status = "okay";
+		};
+
+		hwpm@f100000 {
+			status = "okay";
+		};
+
+		mc-hwpm@2c10000 {
+			status = "okay";
+		};
+
+		host1x@13e00000 {
+			nvjpg@15380000 {
 				status = "okay";
 			};
 
-			scf-pmu {
+			nvdec@15480000 {
 				status = "okay";
 			};
 
-			soctherm-oc-event {
+			nvenc@154c0000 {
 				status = "okay";
 			};
 
-			thermal-zones {
-				cpu-thermal {
-					status = "okay";
-				};
-
-				cv0-thermal {
-					status = "okay";
-				};
-
-				cv1-thermal {
-					status = "okay";
-				};
-
-				cv2-thermal {
-					status = "okay";
-				};
-
-				gpu-thermal {
-					status = "okay";
-				};
-
-				soc0-thermal {
-					status = "okay";
-				};
-
-				soc1-thermal {
-					status = "okay";
-				};
-
-				soc2-thermal {
-					status = "okay";
-				};
-			};
-
-			bus@0 {
-				smmu_test {
-					compatible = "nvidia,smmu_test";
-					iommus = <&smmu_niso0 TEGRA234_SID_SMMU_TEST>;
-					status = "okay";
-				};
-
-				pinmux@2430000 {
-					status = "okay";
-				};
-
-				ufshci@2500000 {
-					status = "okay";
-				};
-
-				aconnect@2900000 {
-					ahub@2900800 {
-						i2s@2901200 {
-							status = "okay";
-						};
-
-						i2s@2901400 {
-							status = "okay";
-						};
-
-						dmic@2904000 {
-							status = "okay";
-						};
-
-						dmic@2904100 {
-							status = "okay";
-						};
-
-						dmic@2904300 {
-							status = "okay";
-						};
-
-						dspk@2905000 {
-							status = "okay";
-						};
-
-						dspk@2905100 {
-							status = "okay";
-						};
-
-						afc@2907000 {
-							status = "okay";
-						};
-
-						afc@2907100 {
-							status = "okay";
-						};
-
-						afc@2907200 {
-							status = "okay";
-						};
-
-						afc@2907300 {
-							status = "okay";
-						};
-
-						afc@2907400 {
-							status = "okay";
-						};
-
-						afc@2907500 {
-							status = "okay";
-						};
-
-						arad@290e400 {
-							status = "okay";
-						};
-					};
-				};
-
-				serial@3110000 {
-					compatible = "nvidia,tegra194-hsuart";
-					reset-names = "serial";
-					status = "okay";
-				};
-
-				i2c@3180000 {
-					status = "okay";
-				};
-
-				i2c@3190000 {
-					status = "okay";
-				};
-
-				i2c@31b0000 {
-					nvidia,hw-instance-id = <0x5>;
-					status = "okay";
-				};
-
-				i2c@31c0000 {
-					status = "okay";
-				};
-
-				serial@31d0000 {
-					current-speed = <115200>;
-				};
-
-				i2c@31e0000 {
-					status = "okay";
-				};
-
-				tachometer@39c0000 {
-					status = "okay";
-				};
-
-				hsp@3d00000 {
-					status = "okay";
-				};
-
-				ethernet@6800000 {
-					status = "okay";
-				};
-
-				aon@c000000 {
-					status = "okay";
-				};
-
-				hardware-timestamp@c1e0000 {
-					status = "okay";
-					nvidia,num-slices = <3>;
-				};
-
-				i2c@c240000 {
-					status = "okay";
-				};
-
-				hdr40_i2c1: i2c@c250000 {
-					status = "okay";
-				};
-
-				rtc@c2a0000 {
-					status = "okay";
-				};
-
-				mttcan@c310000 {
-					status = "okay";
-				};
-
-				mttcan@c320000 {
-					status = "okay";
-				};
-
-				actmon@d230000 {
-					status = "okay";
-				};
-
-				hwpm@f100000 {
-					status = "okay";
-				};
-
-				mc-hwpm@2c10000 {
-					status = "okay";
-				};
-
-				host1x@13e00000 {
-					nvjpg@15380000 {
-						status = "okay";
-					};
-
-					nvdec@15480000 {
-						status = "okay";
-					};
-
-					nvenc@154c0000 {
-						status = "okay";
-					};
-
-					tsec@15500000 {
-						status = "okay";
-					};
-
-					nvjpg@15540000 {
-						status = "okay";
-					};
-
-					se@15810000 {
-						status = "okay";
-					};
-
-					se@15820000 {
-						status = "okay";
-					};
-
-					se@15840000 {
-						status = "okay";
-					};
-
-					nvdla0@15880000 {
-						status = "okay";
-					};
-
-					nvdla1@158c0000 {
-						status = "okay";
-					};
-
-					ofa@15a50000 {
-						status = "okay";
-					};
-
-					pva0@16000000 {
-						status = "okay";
-
-						pva0_niso1_ctx0 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx1 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx2 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx3 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx4 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx5 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx6 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx7 {
-							status = "okay";
-						};
-					};
-				};
-
-				gpu@17000000 {
-					status = "okay";
-				};
-			};
-
-			tegra-hsp@b950000 {
+			tsec@15500000 {
 				status = "okay";
 			};
 
-			dce@d800000 {
+			nvjpg@15540000 {
 				status = "okay";
 			};
 
-			tegra_mce@e100000 {
+			se@15810000 {
 				status = "okay";
 			};
 
-			display@13800000 {
+			se@15820000 {
 				status = "okay";
 			};
+
+			se@15840000 {
+				status = "okay";
+			};
+
+			nvdla0@15880000 {
+				status = "okay";
+			};
+
+			nvdla1@158c0000 {
+				status = "okay";
+			};
+
+			ofa@15a50000 {
+				status = "okay";
+			};
+
+			pva0@16000000 {
+				status = "okay";
+
+				pva0_niso1_ctx0 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx1 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx2 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx3 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx4 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx5 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx6 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx7 {
+					status = "okay";
+				};
+			};
+		};
+
+		gpu@17000000 {
+			status = "okay";
+		};
+	};
+
+	tegra-hsp@b950000 {
+		status = "okay";
+	};
+
+	dce@d800000 {
+		status = "okay";
+	};
+
+	tegra_mce@e100000 {
+		status = "okay";
+	};
+
+	display@13800000 {
+		status = "okay";
+	};
 };
diff --git a/nv-platform/tegra234-p3737-0000.dtsi b/nv-platform/tegra234-p3737-0000.dtsi
index 432645d..22306e8 100644
--- a/nv-platform/tegra234-p3737-0000.dtsi
+++ b/nv-platform/tegra234-p3737-0000.dtsi
@@ -2,124 +2,124 @@
 // SPDX-FileCopyrightText: Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
 
 / {
-			bus@0 {
-				spi@3210000{ /* SPI1 in 40 pin conn */
-					spi@0 { /* chip select 0 */
-						compatible = "tegra-spidev";
-						reg = <0x0>;
-						spi-max-frequency = <50000000>;
-					};
-					spi@1 { /* chips select 1 */
-						compatible = "tegra-spidev";
-						reg = <0x1>;
-						spi-max-frequency = <50000000>;
-					};
-				};
+	bus@0 {
+		spi@3210000{ /* SPI1 in 40 pin conn */
+			spi@0 { /* chip select 0 */
+				compatible = "tegra-spidev";
+				reg = <0x0>;
+				spi-max-frequency = <50000000>;
+			};
+			spi@1 { /* chips select 1 */
+				compatible = "tegra-spidev";
+				reg = <0x1>;
+				spi-max-frequency = <50000000>;
+			};
+		};
 
-				spi@3230000{ /* SPI3 in 40 pin conn */
-					spi@0 { /* chip select 0 */
-						compatible = "tegra-spidev";
-						reg = <0x0>;
-						spi-max-frequency = <50000000>;
-					};
-					spi@1 { /* chips select 1 */
-						compatible = "tegra-spidev";
-						reg = <0x1>;
-						spi-max-frequency = <50000000>;
-					};
-				};
+		spi@3230000{ /* SPI3 in 40 pin conn */
+			spi@0 { /* chip select 0 */
+				compatible = "tegra-spidev";
+				reg = <0x0>;
+				spi-max-frequency = <50000000>;
+			};
+			spi@1 { /* chips select 1 */
+				compatible = "tegra-spidev";
+				reg = <0x1>;
+				spi-max-frequency = <50000000>;
+			};
+		};
 
-				padctl@3520000 {
+		padctl@3520000 {
+			ports {
+				usb2-0 {
+					mode = "otg";
+					usb-role-switch;
+				};
+			};
+		};
+
+		aconnect@2900000 {
+			ahub@2900800 {
+				i2s@2901100 {
 					ports {
-						usb2-0 {
-							mode = "otg";
-							usb-role-switch;
-						};
-					};
-				};
-
-				aconnect@2900000 {
-					ahub@2900800 {
-						i2s@2901100 {
-							ports {
-								port@1 {
-									hdr40_snd_i2s_dap_ep: endpoint {
-									};
-								};
+						port@1 {
+							hdr40_snd_i2s_dap_ep: endpoint {
 							};
 						};
 					};
 				};
+			};
+		};
 
-				ethernet@6800000 {
-					nvidia,mac-addr-idx = <0>;
-					nvidia,max-platform-mtu = <16383>;
-					/* 1=enable, 0=disable */
-					nvidia,pause_frames = <1>;
-					phy-handle = <&mgbe0_aqr113c_phy>;
-					phy-mode = "10gbase-r";
-					/* 0:XFI 10G, 1:XFI 5G, 2:USXGMII 10G, 3:USXGMII 5G */
-					nvidia,phy-iface-mode = <0>;
-					nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(Y, 1) 0>;
-					nvidia,mdio_addr = <0>;
+		ethernet@6800000 {
+			nvidia,mac-addr-idx = <0>;
+			nvidia,max-platform-mtu = <16383>;
+			/* 1=enable, 0=disable */
+			nvidia,pause_frames = <1>;
+			phy-handle = <&mgbe0_aqr113c_phy>;
+			phy-mode = "10gbase-r";
+			/* 0:XFI 10G, 1:XFI 5G, 2:USXGMII 10G, 3:USXGMII 5G */
+			nvidia,phy-iface-mode = <0>;
+			nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(Y, 1) 0>;
+			nvidia,mdio_addr = <0>;
 
-					mdio {
-						compatible = "nvidia,eqos-mdio";
-						#address-cells = <1>;
-						#size-cells = <0>;
+			mdio {
+				compatible = "nvidia,eqos-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
 
-						mgbe0_aqr113c_phy: phy@0 {
-							compatible = "ethernet-phy-ieee802.3-c45";
-							reg = <0x0>;
-							nvidia,phy-rst-pdelay-msec = <150>; /* msec */
-							nvidia,phy-rst-duration-usec = <221000>; /* usec */
-							interrupt-parent = <&gpio>;
-							interrupts = <TEGRA234_MAIN_GPIO(Y, 3) IRQ_TYPE_LEVEL_LOW>;
-						};
-					};
+				mgbe0_aqr113c_phy: phy@0 {
+					compatible = "ethernet-phy-ieee802.3-c45";
+					reg = <0x0>;
+					nvidia,phy-rst-pdelay-msec = <150>; /* msec */
+					nvidia,phy-rst-duration-usec = <221000>; /* usec */
+					interrupt-parent = <&gpio>;
+					interrupts = <TEGRA234_MAIN_GPIO(Y, 3) IRQ_TYPE_LEVEL_LOW>;
 				};
 			};
+		};
+	};
 
-			tegra_sound_graph: tegra_sound: sound {
-				compatible = "nvidia,tegra186-audio-graph-card",
-					     "nvidia,tegra186-ape";
-				clocks = <&bpmp TEGRA234_CLK_PLLA>,
-					 <&bpmp TEGRA234_CLK_PLLA_OUT0>,
-					 <&bpmp TEGRA234_CLK_AUD_MCLK>;
-				clock-names = "pll_a", "plla_out0", "extern1";
-				assigned-clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
-				assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+	tegra_sound_graph: tegra_sound: sound {
+		compatible = "nvidia,tegra186-audio-graph-card",
+			     "nvidia,tegra186-ape";
+		clocks = <&bpmp TEGRA234_CLK_PLLA>,
+			 <&bpmp TEGRA234_CLK_PLLA_OUT0>,
+			 <&bpmp TEGRA234_CLK_AUD_MCLK>;
+		clock-names = "pll_a", "plla_out0", "extern1";
+		assigned-clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
+		assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
 
-				nvidia-audio-card,name = "NVIDIA Jetson AGX Orin APE";
+		nvidia-audio-card,name = "NVIDIA Jetson AGX Orin APE";
 
-				nvidia-audio-card,mclk-fs = <256>;
+		nvidia-audio-card,mclk-fs = <256>;
 
-				hdr40_snd_link_i2s: nvidia-audio-card,dai-link@77 { };
+		hdr40_snd_link_i2s: nvidia-audio-card,dai-link@77 { };
+	};
+
+	eeprom-manager {
+		data-size = <0x100>;
+		bus@0 {
+			i2c-bus = <&gen1_i2c>;
+			eeprom@1 {
+				slave-address = <0x56>;
+				label = "cvb";
 			};
-
-			eeprom-manager {
-				data-size = <0x100>;
-				bus@0 {
-					i2c-bus = <&gen1_i2c>;
-					eeprom@1 {
-						slave-address = <0x56>;
-						label = "cvb";
-					};
-				};
-				bus@1 {
-					i2c-bus = <&cam_i2c>;
-					eeprom@0 {
-						slave-address = <0x54>;
-						label = "sensor0";
-					};
-					eeprom@1 {
-						slave-address = <0x57>;
-						label = "sensor1";
-					};
-					eeprom@2 {
-						slave-address = <0x52>;
-						label = "sensor2";
-					};
-				};
+		};
+		bus@1 {
+			i2c-bus = <&cam_i2c>;
+			eeprom@0 {
+				slave-address = <0x54>;
+				label = "sensor0";
 			};
+			eeprom@1 {
+				slave-address = <0x57>;
+				label = "sensor1";
+			};
+			eeprom@2 {
+				slave-address = <0x52>;
+				label = "sensor2";
+			};
+		};
+	};
 };
diff --git a/nv-platform/tegra234-p3740-0002+p3701-0008-nv-common.dtsi b/nv-platform/tegra234-p3740-0002+p3701-0008-nv-common.dtsi
index ef45ada..4945e54 100644
--- a/nv-platform/tegra234-p3740-0002+p3701-0008-nv-common.dtsi
+++ b/nv-platform/tegra234-p3740-0002+p3701-0008-nv-common.dtsi
@@ -12,276 +12,276 @@
 #include "tegra234-dcb-p3737-0000-p3701-0000.dtsi"
 
 / {
-			chosen {
-				bootargs = "console=ttyTCU0,115200n8";
-			};
+	chosen {
+		bootargs = "console=ttyTCU0,115200n8";
+	};
 
-			bpmp {
-				thermal {
+	bpmp {
+		thermal {
+			status = "okay";
+		};
+	};
+
+	cpus {
+		idle-states {
+			c7 {
+				status = "okay";
+			};
+		};
+	};
+
+	nvpmodel {
+		status = "okay";
+	};
+
+	soctherm-oc-event {
+		status = "okay";
+	};
+
+	thermal-zones {
+		cpu-thermal {
+			status = "okay";
+		};
+
+		cv0-thermal {
+			status = "okay";
+		};
+
+		cv1-thermal {
+			status = "okay";
+		};
+
+		cv2-thermal {
+			status = "okay";
+		};
+
+		gpu-thermal {
+			status = "okay";
+		};
+
+		soc0-thermal {
+			status = "okay";
+		};
+
+		soc1-thermal {
+			status = "okay";
+		};
+
+		soc2-thermal {
+			status = "okay";
+		};
+
+		tj-thermal {
+			status = "okay";
+		};
+	};
+
+	bus@0 {
+		smmu_test {
+			compatible = "nvidia,smmu_test";
+			iommus = <&smmu_niso0 TEGRA234_SID_SMMU_TEST>;
+			status = "okay";
+		};
+
+		pinmux@2430000 {
+			status = "okay";
+		};
+
+		serial@3110000 {
+			compatible = "nvidia,tegra194-hsuart";
+			reset-names = "serial";
+			status = "okay";
+		};
+
+		serial@31d0000 {
+			status = "okay";
+		};
+
+		tachometer@39c0000 {
+			status = "okay";
+		};
+
+		hsp@3c00000 {
+			status = "okay";
+		};
+
+		hsp@c150000 {
+			status = "okay";
+		};
+
+		mttcan@c310000 {
+			status = "okay";
+		};
+
+		mttcan@c320000 {
+			status = "okay";
+		};
+
+		actmon@d230000 {
+			status = "okay";
+		};
+
+		hwpm@f100000 {
+			status = "okay";
+		};
+
+		aconnect@2900000 {
+			ahub@2900800 {
+				i2s@2901200 {
+					status = "okay";
+				};
+
+				i2s@2901400 {
+					status = "okay";
+				};
+
+				dmic@2904000 {
+					status = "okay";
+				};
+
+				dmic@2904100 {
+					status = "okay";
+				};
+
+
+				dmic@2904300 {
+					status = "okay";
+				};
+
+				dspk@2905000 {
+					status = "okay";
+				};
+
+				dspk@2905100 {
+					status = "okay";
+				};
+
+				arad@290e400 {
+					status = "okay";
+				};
+
+				afc@2907000 {
+					status = "okay";
+				};
+
+				afc@2907100 {
+					status = "okay";
+				};
+
+				afc@2907200 {
+					status = "okay";
+				};
+
+				afc@2907300 {
+					status = "okay";
+				};
+
+				afc@2907400 {
+					status = "okay";
+				};
+
+				afc@2907500 {
 					status = "okay";
 				};
 			};
+		};
 
-			cpus {
-				idle-states {
-					c7 {
-						status = "okay";
-					};
-				};
-			};
-
-			nvpmodel {
+		host1x@13e00000 {
+			nvjpg@15380000 {
 				status = "okay";
 			};
 
-			soctherm-oc-event {
+			nvenc@154c0000 {
 				status = "okay";
 			};
 
-			thermal-zones {
-				cpu-thermal {
-					status = "okay";
-				};
-
-				cv0-thermal {
-					status = "okay";
-				};
-
-				cv1-thermal {
-					status = "okay";
-				};
-
-				cv2-thermal {
-					status = "okay";
-				};
-
-				gpu-thermal {
-					status = "okay";
-				};
-
-				soc0-thermal {
-					status = "okay";
-				};
-
-				soc1-thermal {
-					status = "okay";
-				};
-
-				soc2-thermal {
-					status = "okay";
-				};
-
-				tj-thermal {
-					status = "okay";
-				};
-			};
-
-			bus@0 {
-				smmu_test {
-					compatible = "nvidia,smmu_test";
-					iommus = <&smmu_niso0 TEGRA234_SID_SMMU_TEST>;
-					status = "okay";
-				};
-
-				pinmux@2430000 {
-					status = "okay";
-				};
-
-				serial@3110000 {
-					compatible = "nvidia,tegra194-hsuart";
-					reset-names = "serial";
-					status = "okay";
-				};
-
-				serial@31d0000 {
-					status = "okay";
-				};
-
-				tachometer@39c0000 {
-					status = "okay";
-				};
-
-				hsp@3c00000 {
-					status = "okay";
-				};
-
-				hsp@c150000 {
-					status = "okay";
-				};
-
-				mttcan@c310000 {
-					status = "okay";
-				};
-
-				mttcan@c320000 {
-					status = "okay";
-				};
-
-				actmon@d230000 {
-					status = "okay";
-				};
-
-				hwpm@f100000 {
-					status = "okay";
-				};
-
-				aconnect@2900000 {
-					ahub@2900800 {
-						i2s@2901200 {
-							status = "okay";
-						};
-
-						i2s@2901400 {
-							status = "okay";
-						};
-
-						dmic@2904000 {
-							status = "okay";
-						};
-
-						dmic@2904100 {
-							status = "okay";
-						};
-
-
-						dmic@2904300 {
-							status = "okay";
-						};
-
-						dspk@2905000 {
-							status = "okay";
-						};
-
-						dspk@2905100 {
-							status = "okay";
-						};
-
-						arad@290e400 {
-							status = "okay";
-						};
-
-						afc@2907000 {
-							status = "okay";
-						};
-
-						afc@2907100 {
-							status = "okay";
-						};
-
-						afc@2907200 {
-							status = "okay";
-						};
-
-						afc@2907300 {
-							status = "okay";
-						};
-
-						afc@2907400 {
-							status = "okay";
-						};
-
-						afc@2907500 {
-							status = "okay";
-						};
-					};
-				};
-
-				host1x@13e00000 {
-					nvjpg@15380000 {
-						status = "okay";
-					};
-
-					nvenc@154c0000 {
-						status = "okay";
-					};
-
-					tsec@15500000 {
-						status = "okay";
-					};
-
-					nvjpg@15540000 {
-						status = "okay";
-					};
-
-					se@15810000 {
-						status = "okay";
-					};
-
-					se@15820000 {
-						status = "okay";
-					};
-
-					se@15840000 {
-						status = "okay";
-					};
-
-					nvdla0@15880000 {
-						status = "okay";
-					};
-
-					nvdla1@158c0000 {
-						status = "okay";
-					};
-
-					ofa@15a50000 {
-						status = "okay";
-					};
-
-					pva0@16000000 {
-						status = "okay";
-
-						pva0_niso1_ctx0 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx1 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx2 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx3 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx4 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx5 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx6 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx7 {
-							status = "okay";
-						};
-					};
-				};
-
-				gpu@17000000 {
-					status = "okay";
-				};
-			};
-
-			tegra-hsp@b950000 {
+			tsec@15500000 {
 				status = "okay";
 			};
 
-			dce@d800000 {
+			nvjpg@15540000 {
 				status = "okay";
 			};
 
-			tegra_mce@e100000 {
+			se@15810000 {
 				status = "okay";
 			};
 
-			display@13800000 {
+			se@15820000 {
 				status = "okay";
 			};
+
+			se@15840000 {
+				status = "okay";
+			};
+
+			nvdla0@15880000 {
+				status = "okay";
+			};
+
+			nvdla1@158c0000 {
+				status = "okay";
+			};
+
+			ofa@15a50000 {
+				status = "okay";
+			};
+
+			pva0@16000000 {
+				status = "okay";
+
+				pva0_niso1_ctx0 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx1 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx2 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx3 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx4 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx5 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx6 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx7 {
+					status = "okay";
+				};
+			};
+		};
+
+		gpu@17000000 {
+			status = "okay";
+		};
+	};
+
+	tegra-hsp@b950000 {
+		status = "okay";
+	};
+
+	dce@d800000 {
+		status = "okay";
+	};
+
+	tegra_mce@e100000 {
+		status = "okay";
+	};
+
+	display@13800000 {
+		status = "okay";
+	};
 };
diff --git a/nv-platform/tegra234-p3740-0002+p3701-0008-safety.dtsi b/nv-platform/tegra234-p3740-0002+p3701-0008-safety.dtsi
index aa7f80f..aae95e4 100644
--- a/nv-platform/tegra234-p3740-0002+p3701-0008-safety.dtsi
+++ b/nv-platform/tegra234-p3740-0002+p3701-0008-safety.dtsi
@@ -4,217 +4,217 @@
 #include "nv-soc/tegra234-soc-safetyservice-fsicom.dtsi"
 
 / {
-			compatible = "nvidia,p3740-0002+p3701-0008", "safety", "nvidia,p3701-0008", "nvidia,tegra234";
+	compatible = "nvidia,p3740-0002+p3701-0008", "safety", "nvidia,p3701-0008", "nvidia,tegra234";
 
-			bus@0 {
-				i2c@3160000 {
-					nvidia,epl-reporter-id = <0x8050>;
-				};
+	bus@0 {
+		i2c@3160000 {
+			nvidia,epl-reporter-id = <0x8050>;
+		};
 
-				i2c@c240000 {
-					nvidia,epl-reporter-id = <0x8051>;
-				};
+		i2c@c240000 {
+			nvidia,epl-reporter-id = <0x8051>;
+		};
 
-				i2c@3180000 {
-					nvidia,epl-reporter-id = <0x8052>;
-                                };
+		i2c@3180000 {
+			nvidia,epl-reporter-id = <0x8052>;
+		};
 
-				i2c@3190000 {
-					nvidia,epl-reporter-id = <0x8053>;
-				};
+		i2c@3190000 {
+			nvidia,epl-reporter-id = <0x8053>;
+		};
 
-				i2c@31b0000 {
-					nvidia,epl-reporter-id = <0x8054>;
-				};
+		i2c@31b0000 {
+			nvidia,epl-reporter-id = <0x8054>;
+		};
 
-				i2c@31c0000 {
-					nvidia,epl-reporter-id = <0x8056>;
-				};
+		i2c@31c0000 {
+			nvidia,epl-reporter-id = <0x8056>;
+		};
 
-				i2c@c250000 {
-					nvidia,epl-reporter-id = <0x8057>;
-				};
+		i2c@c250000 {
+			nvidia,epl-reporter-id = <0x8057>;
+		};
 
-				i2c@31e0000 {
-					nvidia,epl-reporter-id = <0x8058>;
-				};
+		i2c@31e0000 {
+			nvidia,epl-reporter-id = <0x8058>;
+		};
 
-				hsp_top2: hsp@1600000 {
-					status = "okay";
-				};
-				spi@3230000  {
-					compatible = "nvidia,tegra186-spi-slave";
-					status = "okay";
-					spi@0 {
-						compatible = "nvidia,tegra-spidev";
-						reg = <0>;
-						spi-max-frequency = <50000000>;
-						controller-data {
-							nvidia,lsbyte-first;
-						};
-					};
+		hsp_top2: hsp@1600000 {
+			status = "okay";
+		};
+		spi@3230000  {
+			compatible = "nvidia,tegra186-spi-slave";
+			status = "okay";
+			spi@0 {
+				compatible = "nvidia,tegra-spidev";
+				reg = <0>;
+				spi-max-frequency = <50000000>;
+				controller-data {
+					nvidia,lsbyte-first;
 				};
 			};
+		};
+	};
 
-			chosen {
-				/*
-				 * The ideal approach for disabling rail-gating
-				 * for GPU should be deleting the power-domains
-				 * property in GPU node. But /delete-property/
-				 * is not a valid syntax in the device tree
-				 * overlay, the nvidia,tegra-joint_xpu_rail is
-				 * specified to achieve the same as an
-				 * alternative.
-				 */
-				nvidia,tegra-joint_xpu_rail;
+	chosen {
+		/*
+		 * The ideal approach for disabling rail-gating
+		 * for GPU should be deleting the power-domains
+		 * property in GPU node. But /delete-property/
+		 * is not a valid syntax in the device tree
+		 * overlay, the nvidia,tegra-joint_xpu_rail is
+		 * specified to achieve the same as an
+		 * alternative.
+		 */
+		nvidia,tegra-joint_xpu_rail;
+	};
+
+	cpus {
+		idle-states {
+			c7 {
+				status = "disabled";
 			};
+		};
+	};
 
-			cpus {
-				idle-states {
-					c7 {
-						status = "disabled";
-					};
+	fsicom_client {
+		status = "okay";
+	};
+
+	FsiComIvc {
+		status = "okay";
+	};
+
+	/* FSI<->CCPLEX Communication through DRAM Carveout demo app */
+	FsiComAppChConfApp1 {
+		compatible = "nvidia,tegra-fsicom-sampleApp1";
+		status = "okay";
+		channelid_list = <3>;
+	};
+
+	hsierrrptinj {
+		compatible = "nvidia,tegra23x-hsierrrptinj";
+		mboxes = <&hsp_top0 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(1)>;
+		mbox-names = "hsierrrptinj-tx";
+		status = "okay";
+	};
+
+	safetyservices_epl_client {
+		/* userspace app uses this driver to send error code */
+		status = "okay";
+	};
+
+	thermal-zones {
+		cpu-thermal {
+			cooling-maps {
+				map-cpufreq {
+					cooling-device = <&cpu0_0 0 0>,
+							 <&cpu1_0 0 0>,
+							 <&cpu2_0 0 0>;
+				};
+
+				map-devfreq {
+					cooling-device = <&ga10b 0 0>;
 				};
 			};
+		};
 
-			fsicom_client {
-				status = "okay";
-			};
-
-			FsiComIvc {
-				status = "okay";
-			};
-
-			/* FSI<->CCPLEX Communication through DRAM Carveout demo app */
-			FsiComAppChConfApp1 {
-				compatible = "nvidia,tegra-fsicom-sampleApp1";
-				status = "okay";
-				channelid_list = <3>;
-			};
-
-			hsierrrptinj {
-				compatible = "nvidia,tegra23x-hsierrrptinj";
-				mboxes = <&hsp_top0 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(1)>;
-				mbox-names = "hsierrrptinj-tx";
-				status = "okay";
-			};
-
-			safetyservices_epl_client {
-				/* userspace app uses this driver to send error code */
-				status = "okay";
-			};
-
-			thermal-zones {
-				cpu-thermal {
-					cooling-maps {
-						map-cpufreq {
-							cooling-device = <&cpu0_0 0 0>,
-									 <&cpu1_0 0 0>,
-									 <&cpu2_0 0 0>;
-						};
-
-						map-devfreq {
-							cooling-device = <&ga10b 0 0>;
-						};
-					};
+		gpu-thermal {
+			cooling-maps {
+				map-cpufreq {
+					cooling-device = <&cpu0_0 0 0>,
+							 <&cpu1_0 0 0>,
+							 <&cpu2_0 0 0>;
 				};
 
-				gpu-thermal {
-					cooling-maps {
-						map-cpufreq {
-							cooling-device = <&cpu0_0 0 0>,
-									 <&cpu1_0 0 0>,
-									 <&cpu2_0 0 0>;
-						};
-
-						map-devfreq {
-							cooling-device = <&ga10b 0 0>;
-						};
-					};
-				};
-
-				cv0-thermal {
-					cooling-maps {
-						map-cpufreq {
-							cooling-device = <&cpu0_0 0 0>,
-									 <&cpu1_0 0 0>,
-									 <&cpu2_0 0 0>;
-						};
-
-						map-devfreq {
-							cooling-device = <&ga10b 0 0>;
-						};
-					};
-				};
-
-				cv1-thermal {
-					cooling-maps {
-						map-cpufreq {
-							cooling-device = <&cpu0_0 0 0>,
-									 <&cpu1_0 0 0>,
-									 <&cpu2_0 0 0>;
-						};
-
-						map-devfreq {
-							cooling-device = <&ga10b 0 0>;
-						};
-					};
-				};
-
-				cv2-thermal {
-					cooling-maps {
-						map-cpufreq {
-							cooling-device = <&cpu0_0 0 0>,
-									 <&cpu1_0 0 0>,
-									 <&cpu2_0 0 0>;
-						};
-
-						map-devfreq {
-							cooling-device = <&ga10b 0 0>;
-						};
-					};
-				};
-
-				soc0-thermal {
-					cooling-maps {
-						map-cpufreq {
-							cooling-device = <&cpu0_0 0 0>,
-									 <&cpu1_0 0 0>,
-									 <&cpu2_0 0 0>;
-						};
-
-						map-devfreq {
-							cooling-device = <&ga10b 0 0>;
-						};
-					};
-				};
-
-				soc1-thermal {
-					cooling-maps {
-						map-cpufreq {
-							cooling-device = <&cpu0_0 0 0>,
-									 <&cpu1_0 0 0>,
-									 <&cpu2_0 0 0>;
-						};
-
-						map-devfreq {
-							cooling-device = <&ga10b 0 0>;
-						};
-					};
-				};
-
-				soc2-thermal {
-					cooling-maps {
-						map-cpufreq {
-							cooling-device = <&cpu0_0 0 0>,
-									 <&cpu1_0 0 0>,
-									 <&cpu2_0 0 0>;
-						};
-
-						map-devfreq {
-							cooling-device = <&ga10b 0 0>;
-						};
-					};
+				map-devfreq {
+					cooling-device = <&ga10b 0 0>;
 				};
 			};
+		};
+
+		cv0-thermal {
+			cooling-maps {
+				map-cpufreq {
+					cooling-device = <&cpu0_0 0 0>,
+							 <&cpu1_0 0 0>,
+							 <&cpu2_0 0 0>;
+				};
+
+				map-devfreq {
+					cooling-device = <&ga10b 0 0>;
+				};
+			};
+		};
+
+		cv1-thermal {
+			cooling-maps {
+				map-cpufreq {
+					cooling-device = <&cpu0_0 0 0>,
+							 <&cpu1_0 0 0>,
+							 <&cpu2_0 0 0>;
+				};
+
+				map-devfreq {
+					cooling-device = <&ga10b 0 0>;
+				};
+			};
+		};
+
+		cv2-thermal {
+			cooling-maps {
+				map-cpufreq {
+					cooling-device = <&cpu0_0 0 0>,
+							 <&cpu1_0 0 0>,
+							 <&cpu2_0 0 0>;
+				};
+
+				map-devfreq {
+					cooling-device = <&ga10b 0 0>;
+				};
+			};
+		};
+
+		soc0-thermal {
+			cooling-maps {
+				map-cpufreq {
+					cooling-device = <&cpu0_0 0 0>,
+							 <&cpu1_0 0 0>,
+							 <&cpu2_0 0 0>;
+				};
+
+				map-devfreq {
+					cooling-device = <&ga10b 0 0>;
+				};
+			};
+		};
+
+		soc1-thermal {
+			cooling-maps {
+				map-cpufreq {
+					cooling-device = <&cpu0_0 0 0>,
+							 <&cpu1_0 0 0>,
+							 <&cpu2_0 0 0>;
+				};
+
+				map-devfreq {
+					cooling-device = <&ga10b 0 0>;
+				};
+			};
+		};
+
+		soc2-thermal {
+			cooling-maps {
+				map-cpufreq {
+					cooling-device = <&cpu0_0 0 0>,
+							 <&cpu1_0 0 0>,
+							 <&cpu2_0 0 0>;
+				};
+
+				map-devfreq {
+					cooling-device = <&ga10b 0 0>;
+				};
+			};
+		};
+	};
 };
diff --git a/nv-platform/tegra234-p3740-0002.dtsi b/nv-platform/tegra234-p3740-0002.dtsi
index 1c7af18..6558d40 100644
--- a/nv-platform/tegra234-p3740-0002.dtsi
+++ b/nv-platform/tegra234-p3740-0002.dtsi
@@ -4,228 +4,228 @@
 #include "nv-soc/tegra234-soc-audio-dai-links.dtsi"
 
 / {
-			bus@0 {
-				i2c@31c0000 {
-					typec: stusb1600@28 {
-						status = "okay";
-						compatible = "st,stusb1600";
-						reg = <0x28>;
-						vdd-supply = <&p3740_vdd_5v_sys>;
-						vsys-supply = <&vdd_3v3_sys>;
-						interrupt-parent = <&gpio>;
-						interrupts = <TEGRA234_MAIN_GPIO(K, 6) IRQ_TYPE_LEVEL_LOW>;
-						typec_con: connector {
-							compatible = "usb-c-connector";
-							label = "USB-C";
-							data-role = "dual";
-							power-role = "dual";
-							typec-power-opmode = "default";
+	bus@0 {
+		i2c@31c0000 {
+			typec: stusb1600@28 {
+				status = "okay";
+				compatible = "st,stusb1600";
+				reg = <0x28>;
+				vdd-supply = <&p3740_vdd_5v_sys>;
+				vsys-supply = <&vdd_3v3_sys>;
+				interrupt-parent = <&gpio>;
+				interrupts = <TEGRA234_MAIN_GPIO(K, 6) IRQ_TYPE_LEVEL_LOW>;
+				typec_con: connector {
+					compatible = "usb-c-connector";
+					label = "USB-C";
+					data-role = "dual";
+					power-role = "dual";
+					typec-power-opmode = "default";
 
-							port {
-								typec_con_ep: endpoint {
-									remote-endpoint = <&usb_role_switch0>;
-								};
-							};
-						};
-					};
-				};
-
-				i2c@c250000 {
-					f75308@4d {
-						compatible = "fintek,f75308";
-						reg = <0x4d>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-
-						fan@0 {
-							reg = <0x0>;
-							type = "pwm";
-							duty = "manual_duty";
-							5seg = <100 80 60 40 20>;
-						};
-
-						fan@1 {
-							reg = <0x1>;
-							type = "pwm";
-							duty = "manual_duty";
-							5seg = <100 80 60 40 20>;
-						};
-
-						fan@2 {
-							reg = <0x2>;
-							type = "pwm";
-							duty = "manual_duty";
-							5seg = <100 80 60 40 20>;
-						};
-
-						fan@3 {
-							reg = <0x3>;
-							type = "pwm";
-							duty = "manual_duty";
-							5seg = <100 80 60 40 20>;
-						};
-					};
-				};
-
-				padctl@3520000 {
-					ports {
-						usb2-0 {
-							port {
-								usb_role_switch0: endpoint {
-									remote-endpoint = <&typec_con_ep>;
-								};
-							};
+					port {
+						typec_con_ep: endpoint {
+							remote-endpoint = <&usb_role_switch0>;
 						};
 					};
 				};
 			};
+		};
 
+		i2c@c250000 {
+			f75308@4d {
+				compatible = "fintek,f75308";
+				reg = <0x4d>;
+				#address-cells = <1>;
+				#size-cells = <0>;
 
-			sound {
-				compatible = "nvidia,tegra186-audio-graph-card",
-					     "nvidia,tegra186-ape";
-				clocks = <&bpmp TEGRA234_CLK_PLLA>,
-					 <&bpmp TEGRA234_CLK_PLLA_OUT0>,
-					 <&bpmp TEGRA234_CLK_AUD_MCLK>;
-				clock-names = "pll_a", "plla_out0", "extern1";
-				assigned-clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
-				assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
-
-				nvidia-audio-card,name = "NVIDIA Jetson IGX Orin APE";
-
-				nvidia-audio-card,mclk-fs = <256>;
-
-				nvidia-audio-card,widgets =
-					"Headphone",    "CVB-RT Headphone Jack",
-					"Microphone",   "CVB-RT Mic Jack",
-					"Speaker",      "CVB-RT Int Spk",
-					"Microphone",   "CVB-RT Int Mic";
-
-				nvidia-audio-card,routing =
-					"CVB-RT Headphone Jack",     "CVB-RT HPOL",
-					"CVB-RT Headphone Jack",     "CVB-RT HPOR",
-					"CVB-RT IN1P",               "CVB-RT Mic Jack",
-					"CVB-RT IN2P",               "CVB-RT Mic Jack",
-					"CVB-RT IN2N",               "CVB-RT Mic Jack",
-					"CVB-RT IN3P",               "CVB-RT Mic Jack",
-					"CVB-RT Int Spk",            "CVB-RT SPOLP",
-					"CVB-RT Int Spk",            "CVB-RT SPORP",
-					"CVB-RT Int Spk",            "CVB-RT LOUTL",
-					"CVB-RT Int Spk",            "CVB-RT LOUTR",
-					"CVB-RT DMIC1",              "CVB-RT Int Mic",
-					"CVB-RT DMIC2",              "CVB-RT Int Mic";
-
-				/* I2S4 dai node */
-				nvidia-audio-card,dai-link@79 {
-					link-name = "rt5640-playback";
-					codec {
-						sound-dai = <&rt5640 0>;
-						prefix = "CVB-RT";
-					};
+				fan@0 {
+					reg = <0x0>;
+					type = "pwm";
+					duty = "manual_duty";
+					5seg = <100 80 60 40 20>;
 				};
 
-				/* I2S6 dai node */
-				nvidia-audio-card,dai-link@81 {
-				       bitclock-master;
-				       frame-master;
+				fan@1 {
+					reg = <0x1>;
+					type = "pwm";
+					duty = "manual_duty";
+					5seg = <100 80 60 40 20>;
+				};
+
+				fan@2 {
+					reg = <0x2>;
+					type = "pwm";
+					duty = "manual_duty";
+					5seg = <100 80 60 40 20>;
+				};
+
+				fan@3 {
+					reg = <0x3>;
+					type = "pwm";
+					duty = "manual_duty";
+					5seg = <100 80 60 40 20>;
 				};
 			};
+		};
 
-			eeprom-manager {
-				bus@0 {
-					i2c-bus = <&dp_aux_ch2_i2c>;
-					eeprom@1 {
-						slave-address = <0x55>;
-						label = "cvb";
+		padctl@3520000 {
+			ports {
+				usb2-0 {
+					port {
+						usb_role_switch0: endpoint {
+							remote-endpoint = <&typec_con_ep>;
+						};
 					};
 				};
 			};
+		};
+	};
 
-			reserved-memory {
-				#address-cells = <2>;
-				#size-cells = <2>;
-				ranges;
 
-				linux,cma { /* Needed for nvgpu comptags */
-					compatible = "shared-dma-pool";
-					reusable;
-					size = <0x0 0x20000000>; /* 512MB */
-					alignment = <0x0 0x10000>;
-					linux,cma-default;
-					status = "okay";
-				};
-			};
+	sound {
+		compatible = "nvidia,tegra186-audio-graph-card",
+			     "nvidia,tegra186-ape";
+		clocks = <&bpmp TEGRA234_CLK_PLLA>,
+			 <&bpmp TEGRA234_CLK_PLLA_OUT0>,
+			 <&bpmp TEGRA234_CLK_AUD_MCLK>;
+		clock-names = "pll_a", "plla_out0", "extern1";
+		assigned-clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
+		assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
 
-			p3740_vdd_0v95_AO: regulator-vdd-0v95-AO {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-0v95-AO";
-				regulator-min-microvolt = <950000>;
-				regulator-max-microvolt = <950000>;
+		nvidia-audio-card,name = "NVIDIA Jetson IGX Orin APE";
+
+		nvidia-audio-card,mclk-fs = <256>;
+
+		nvidia-audio-card,widgets =
+			"Headphone",    "CVB-RT Headphone Jack",
+			"Microphone",   "CVB-RT Mic Jack",
+			"Speaker",      "CVB-RT Int Spk",
+			"Microphone",   "CVB-RT Int Mic";
+
+		nvidia-audio-card,routing =
+			"CVB-RT Headphone Jack",     "CVB-RT HPOL",
+			"CVB-RT Headphone Jack",     "CVB-RT HPOR",
+			"CVB-RT IN1P",               "CVB-RT Mic Jack",
+			"CVB-RT IN2P",               "CVB-RT Mic Jack",
+			"CVB-RT IN2N",               "CVB-RT Mic Jack",
+			"CVB-RT IN3P",               "CVB-RT Mic Jack",
+			"CVB-RT Int Spk",            "CVB-RT SPOLP",
+			"CVB-RT Int Spk",            "CVB-RT SPORP",
+			"CVB-RT Int Spk",            "CVB-RT LOUTL",
+			"CVB-RT Int Spk",            "CVB-RT LOUTR",
+			"CVB-RT DMIC1",              "CVB-RT Int Mic",
+			"CVB-RT DMIC2",              "CVB-RT Int Mic";
+
+		/* I2S4 dai node */
+		nvidia-audio-card,dai-link@79 {
+			link-name = "rt5640-playback";
+			codec {
+				sound-dai = <&rt5640 0>;
+				prefix = "CVB-RT";
 			};
-			p3740_vdd_12v_sys: regulator-vdd-12v-sys {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-12v-sys";
-				regulator-min-microvolt = <12000000>;
-				regulator-max-microvolt = <12000000>;
-			};
-			p3740_vdd_1v05_AO: regulator-vdd-1v05-AO {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-1v05-AO";
-				regulator-min-microvolt = <1050000>;
-				regulator-max-microvolt = <1050000>;
-			};
-			p3740_vdd_1v0_sys: regulator-vdd-1v0-sys {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-1v0-sys";
-				regulator-min-microvolt = <1000000>;
-				regulator-max-microvolt = <1000000>;
-			};
-			p3740_vdd_1v1_sys: regulator-vdd-1v1-sys {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-1v1-sys";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-			};
-			p3740_vdd_1v8_AO: regulator-vdd-1v8-AO {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-1v8-AO";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-			p3740_vdd_1v8_sys: regulator-vdd-1v8-sys {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-1v8-sys";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-			};
-			p3740_vdd_2v5_sys: regulator-vdd-2v5-sys {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-2v5-sys";
-				regulator-min-microvolt = <2500000>;
-				regulator-max-microvolt = <2500000>;
-			};
-			p3740_vdd_2v8_sys: regulator-vdd-2v8-sys {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-2v8-sys";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-			};
-			p3740_vdd_3v3_AO: regulator-vdd-3v3-AO {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-3v3-AO";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-			};
-			p3740_vdd_3v7_AO: regulator-vdd-3v7-AO {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-3v7-AO";
-				regulator-min-microvolt = <3700000>;
-				regulator-max-microvolt = <3700000>;
-			};
-			p3740_vdd_5v_sys: regulator-vdd-5v-sys {
-				compatible = "regulator-fixed";
-				regulator-name = "vdd-5v-sys";
-				regulator-min-microvolt = <5000000>;
-				regulator-max-microvolt = <5000000>;
+		};
+
+		/* I2S6 dai node */
+		nvidia-audio-card,dai-link@81 {
+		       bitclock-master;
+		       frame-master;
+		};
+	};
+
+	eeprom-manager {
+		bus@0 {
+			i2c-bus = <&dp_aux_ch2_i2c>;
+			eeprom@1 {
+				slave-address = <0x55>;
+				label = "cvb";
 			};
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		linux,cma { /* Needed for nvgpu comptags */
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x20000000>; /* 512MB */
+			alignment = <0x0 0x10000>;
+			linux,cma-default;
+			status = "okay";
+		};
+	};
+
+	p3740_vdd_0v95_AO: regulator-vdd-0v95-AO {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-0v95-AO";
+		regulator-min-microvolt = <950000>;
+		regulator-max-microvolt = <950000>;
+	};
+	p3740_vdd_12v_sys: regulator-vdd-12v-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-12v-sys";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+	p3740_vdd_1v05_AO: regulator-vdd-1v05-AO {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-1v05-AO";
+		regulator-min-microvolt = <1050000>;
+		regulator-max-microvolt = <1050000>;
+	};
+	p3740_vdd_1v0_sys: regulator-vdd-1v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-1v0-sys";
+		regulator-min-microvolt = <1000000>;
+		regulator-max-microvolt = <1000000>;
+	};
+	p3740_vdd_1v1_sys: regulator-vdd-1v1-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-1v1-sys";
+		regulator-min-microvolt = <1100000>;
+		regulator-max-microvolt = <1100000>;
+	};
+	p3740_vdd_1v8_AO: regulator-vdd-1v8-AO {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-1v8-AO";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+	p3740_vdd_1v8_sys: regulator-vdd-1v8-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-1v8-sys";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+	p3740_vdd_2v5_sys: regulator-vdd-2v5-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-2v5-sys";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+	};
+	p3740_vdd_2v8_sys: regulator-vdd-2v8-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-2v8-sys";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+	};
+	p3740_vdd_3v3_AO: regulator-vdd-3v3-AO {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-3v3-AO";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+	p3740_vdd_3v7_AO: regulator-vdd-3v7-AO {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-3v7-AO";
+		regulator-min-microvolt = <3700000>;
+		regulator-max-microvolt = <3700000>;
+	};
+	p3740_vdd_5v_sys: regulator-vdd-5v-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-5v-sys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
 };
diff --git a/nv-platform/tegra234-p3767-0000.dtsi b/nv-platform/tegra234-p3767-0000.dtsi
index 2161dca..324c5ba 100644
--- a/nv-platform/tegra234-p3767-0000.dtsi
+++ b/nv-platform/tegra234-p3767-0000.dtsi
@@ -6,72 +6,72 @@
 #include <dt-bindings/interrupt/tegra234-irq.h>
 
 / {
-			bus@0 {
-				mmc@3400000 {
-					no-sdio;
-					no-mmc;
-					nvidia,cd-wakeup-capable;
-					nvidia,boot-detect-delay = <1000>;
-					cd-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>;
-				};
+	bus@0 {
+		mmc@3400000 {
+			no-sdio;
+			no-mmc;
+			nvidia,cd-wakeup-capable;
+			nvidia,boot-detect-delay = <1000>;
+			cd-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>;
+		};
 
-				nvrng@3ae0000 {
-					status = "okay";
-				};
+		nvrng@3ae0000 {
+			status = "okay";
+		};
 
-				gpu@17000000 {
-					status = "okay";
-				};
-			};
+		gpu@17000000 {
+			status = "okay";
+		};
+	};
 
-			chosen {
-				nvidia,tegra-joint_xpu_rail;
-			};
+	chosen {
+		nvidia,tegra-joint_xpu_rail;
+	};
 
-			opp-table-cluster0 {
-				opp-1510400000 { /* Max CPU freq for Orin Nano */
-					opp-hz = /bits/ 64 <1510400000>;
-					opp-peak-kBps = <3200000>;
-				};
+	opp-table-cluster0 {
+		opp-1510400000 { /* Max CPU freq for Orin Nano */
+			opp-hz = /bits/ 64 <1510400000>;
+			opp-peak-kBps = <3200000>;
+		};
 
-				opp-1984000000 { /* Max CPU freq for ONX */
-					opp-hz = /bits/ 64 <1984000000>;
-					opp-peak-kBps = <3200000>;
-				};
-			};
+		opp-1984000000 { /* Max CPU freq for ONX */
+			opp-hz = /bits/ 64 <1984000000>;
+			opp-peak-kBps = <3200000>;
+		};
+	};
 
-			opp-table-cluster1 {
-				opp-1510400000 { /* Max CPU freq for Orin Nano */
-					opp-hz = /bits/ 64 <1510400000>;
-					opp-peak-kBps = <3200000>;
-				};
+	opp-table-cluster1 {
+		opp-1510400000 { /* Max CPU freq for Orin Nano */
+			opp-hz = /bits/ 64 <1510400000>;
+			opp-peak-kBps = <3200000>;
+		};
 
-				opp-1984000000 { /* Max CPU freq for ONX */
-					opp-hz = /bits/ 64 <1984000000>;
-					opp-peak-kBps = <3200000>;
-				};
-			};
+		opp-1984000000 { /* Max CPU freq for ONX */
+			opp-hz = /bits/ 64 <1984000000>;
+			opp-peak-kBps = <3200000>;
+		};
+	};
 
-			opp-table-cluster2 {
-				opp-1510400000 { /* Max CPU freq for Orin Nano */
-					opp-hz = /bits/ 64 <1510400000>;
-					opp-peak-kBps = <3200000>;
-				};
+	opp-table-cluster2 {
+		opp-1510400000 { /* Max CPU freq for Orin Nano */
+			opp-hz = /bits/ 64 <1510400000>;
+			opp-peak-kBps = <3200000>;
+		};
 
-				opp-1984000000 { /* Max CPU freq for ONX */
-					opp-hz = /bits/ 64 <1984000000>;
-					opp-peak-kBps = <3200000>;
-				};
-			};
+		opp-1984000000 { /* Max CPU freq for ONX */
+			opp-hz = /bits/ 64 <1984000000>;
+			opp-peak-kBps = <3200000>;
+		};
+	};
 
-			reserved-memory {
-				linux,cma { /* Needed for nvgpu comptags */
-					compatible = "shared-dma-pool";
-					reusable;
-					size = <0x0 0x10000000>; /* 256MB */
-					alignment = <0x0 0x10000>;
-					linux,cma-default;
-					status = "okay";
-				};
-			};
+	reserved-memory {
+		linux,cma { /* Needed for nvgpu comptags */
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x0 0x10000000>; /* 256MB */
+			alignment = <0x0 0x10000>;
+			linux,cma-default;
+			status = "okay";
+		};
+	};
 };
diff --git a/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi b/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi
index 6a052e9..23e0b57 100644
--- a/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi
+++ b/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi
@@ -11,440 +11,440 @@
 #include "nv-soc/tegra234-soc-camera.dtsi"
 #include "tegra234-dcb-p3737-0000-p3701-0000.dtsi"
 / {
-			bpmp {
-				i2c {
-					vrs@3c {
-						compatible = "nvidia,vrs-pseq";
-						reg = <0x3c>;
-						interrupt-parent = <&pmc>;
-						/* VRS Wake ID is 24 */
-						interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
-						interrupt-controller;
-						#interrupt-cells = <2>;
-						status = "okay";
-					};
+	bpmp {
+		i2c {
+			vrs@3c {
+				compatible = "nvidia,vrs-pseq";
+				reg = <0x3c>;
+				interrupt-parent = <&pmc>;
+				/* VRS Wake ID is 24 */
+				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				status = "okay";
+			};
+		};
+	};
+
+	bus@0 {
+		actmon@d230000 {
+			status = "okay";
+		};
+
+		pinmux@2430000 {
+			status = "okay";
+		};
+
+		i2c@3180000 {
+			status = "okay";
+		};
+
+		aconnect@2900000 {
+			ahub@2900800 {
+				i2s@2901200 {
+					status = "okay";
+				};
+
+				i2s@2901400 {
+					status = "okay";
+				};
+
+				dmic@2904000 {
+					status = "okay";
+				};
+
+				dmic@2904100 {
+					status = "okay";
+				};
+
+				dmic@2904300 {
+					status = "okay";
+				};
+
+				dspk@2905000 {
+					status = "okay";
+				};
+
+				dspk@2905100 {
+					status = "okay";
+				};
+
+				afc@2907000 {
+					status = "okay";
+				};
+
+				afc@2907100 {
+					status = "okay";
+				};
+
+				afc@2907200 {
+					status = "okay";
+				};
+
+				afc@2907300 {
+					status = "okay";
+				};
+
+				afc@2907400 {
+					status = "okay";
+				};
+
+				afc@2907500 {
+					status = "okay";
+				};
+
+				arad@290e400 {
+					status = "okay";
+				};
+			};
+		};
+
+		/* UARTA, 40 pin header, Pin 8(TX), Pin 10(RX) */
+		serial@3100000 {
+			compatible = "nvidia,tegra194-hsuart";
+			status = "okay";
+		};
+
+		/* UARTE, M2.E connector */
+		serial@3140000 {
+			compatible = "nvidia,tegra194-hsuart";
+			status = "okay";
+		};
+
+		i2c@31b0000 {
+			status = "okay";
+		};
+
+		hdr40_i2c1: i2c@c250000 {
+			status = "okay";
+		};
+
+		/* SPI1, 40pin header, Pin 19(MOSI), Pin 21(MISO), Pin 23(CLK), Pin 24(CS) */
+		spi@3210000{
+			status = "okay";
+			spi@0 {
+				compatible = "tegra-spidev";
+				reg = <0x0>;
+				spi-max-frequency = <50000000>;
+				controller-data {
+					nvidia,enable-hw-based-cs;
+					nvidia,rx-clk-tap-delay = <0x10>;
+					nvidia,tx-clk-tap-delay = <0x0>;
+				};
+			};
+			spi@1 {
+				compatible = "tegra-spidev";
+				reg = <0x1>;
+				spi-max-frequency = <50000000>;
+				controller-data {
+					nvidia,enable-hw-based-cs;
+					nvidia,rx-clk-tap-delay = <0x10>;
+					nvidia,tx-clk-tap-delay = <0x0>;
 				};
 			};
 
-			bus@0 {
-				actmon@d230000 {
-					status = "okay";
+		};
+
+		/* SPI3, 40pin header, Pin 37(MOSI), Pin 22(MISO), Pin 13(CLK), Pin 18(CS) */
+		spi@3230000{
+			status = "okay";
+			spi@0 {
+				compatible = "tegra-spidev";
+				reg = <0x0>;
+				spi-max-frequency = <50000000>;
+				controller-data {
+					nvidia,enable-hw-based-cs;
+					nvidia,rx-clk-tap-delay = <0x10>;
+					nvidia,tx-clk-tap-delay = <0x0>;
 				};
-
-				pinmux@2430000 {
-					status = "okay";
+			};
+			spi@1 {
+				compatible = "tegra-spidev";
+				reg = <0x1>;
+				spi-max-frequency = <50000000>;
+				controller-data {
+					nvidia,enable-hw-based-cs;
+					nvidia,rx-clk-tap-delay = <0x10>;
+					nvidia,tx-clk-tap-delay = <0x0>;
 				};
+			};
+		};
 
-				i2c@3180000 {
-					status = "okay";
-				};
-
-				aconnect@2900000 {
-					ahub@2900800 {
-						i2s@2901200 {
-							status = "okay";
+		padctl@3520000 {
+			ports {
+				usb2-0 {
+					port {
+						typec_p0: endpoint {
+							remote-endpoint = <&fusb_p0>;
 						};
-
-						i2s@2901400 {
-							status = "okay";
-						};
-
-						dmic@2904000 {
-							status = "okay";
-						};
-
-						dmic@2904100 {
-							status = "okay";
-						};
-
-						dmic@2904300 {
-							status = "okay";
-						};
-
-						dspk@2905000 {
-							status = "okay";
-						};
-
-						dspk@2905100 {
-							status = "okay";
-						};
-
-						afc@2907000 {
-							status = "okay";
-						};
-
-						afc@2907100 {
-							status = "okay";
-						};
-
-						afc@2907200 {
-							status = "okay";
-						};
-
-						afc@2907300 {
-							status = "okay";
-						};
-
-						afc@2907400 {
-							status = "okay";
-						};
-
-						afc@2907500 {
-							status = "okay";
-						};
-
-						arad@290e400 {
-							status = "okay";
-						};
-					};
-				};
-
-				/* UARTA, 40 pin header, Pin 8(TX), Pin 10(RX) */
-				serial@3100000 {
-					compatible = "nvidia,tegra194-hsuart";
-					status = "okay";
-				};
-
-				/* UARTE, M2.E connector */
-				serial@3140000 {
-					compatible = "nvidia,tegra194-hsuart";
-					status = "okay";
-				};
-
-				i2c@31b0000 {
-					status = "okay";
-				};
-
-				hdr40_i2c1: i2c@c250000 {
-					status = "okay";
-				};
-
-				/* SPI1, 40pin header, Pin 19(MOSI), Pin 21(MISO), Pin 23(CLK), Pin 24(CS) */
-				spi@3210000{
-					status = "okay";
-					spi@0 {
-						compatible = "tegra-spidev";
-						reg = <0x0>;
-						spi-max-frequency = <50000000>;
-						controller-data {
-							nvidia,enable-hw-based-cs;
-							nvidia,rx-clk-tap-delay = <0x10>;
-							nvidia,tx-clk-tap-delay = <0x0>;
-						};
-					};
-					spi@1 {
-						compatible = "tegra-spidev";
-						reg = <0x1>;
-						spi-max-frequency = <50000000>;
-						controller-data {
-							nvidia,enable-hw-based-cs;
-							nvidia,rx-clk-tap-delay = <0x10>;
-							nvidia,tx-clk-tap-delay = <0x0>;
-						};
-					};
-
-				};
-
-				/* SPI3, 40pin header, Pin 37(MOSI), Pin 22(MISO), Pin 13(CLK), Pin 18(CS) */
-				spi@3230000{
-					status = "okay";
-					spi@0 {
-						compatible = "tegra-spidev";
-						reg = <0x0>;
-						spi-max-frequency = <50000000>;
-						controller-data {
-							nvidia,enable-hw-based-cs;
-							nvidia,rx-clk-tap-delay = <0x10>;
-							nvidia,tx-clk-tap-delay = <0x0>;
-						};
-					};
-					spi@1 {
-						compatible = "tegra-spidev";
-						reg = <0x1>;
-						spi-max-frequency = <50000000>;
-						controller-data {
-							nvidia,enable-hw-based-cs;
-							nvidia,rx-clk-tap-delay = <0x10>;
-							nvidia,tx-clk-tap-delay = <0x0>;
-						};
-					};
-				};
-
-				padctl@3520000 {
-					ports {
-						usb2-0 {
-							port {
-								typec_p0: endpoint {
-									remote-endpoint = <&fusb_p0>;
-								};
-							};
-						};
-					};
-				};
-
-				i2c@c240000 {
-					status = "okay";
-					ina32211_1_40: ina3221@40 {
-						compatible = "ti,ina3221";
-						reg = <0x40>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						#io-channel-cells = <1>;
-						channel@0 {
-							reg = <0x0>;
-							label = "VDD_IN";
-							shunt-resistor-micro-ohms = <5000>;
-						};
-						channel@1 {
-							reg = <0x1>;
-							label = "VDD_CPU_GPU_CV";
-							shunt-resistor-micro-ohms = <5000>;
-						};
-						channel@2 {
-							reg = <0x2>;
-							label = "VDD_SOC";
-							shunt-resistor-micro-ohms = <5000>;
-						};
-					};
-					fusb301@25 {
-						compatible = "onsemi,fusb301";
-						reg = <0x25>;
-						status = "okay";
-						#address-cells = <1>;
-						#size-cells = <0>;
-						interrupt-parent = <&gpio>;
-						interrupts = <TEGRA234_MAIN_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
-						connector@0 {
-							port@0 {
-								fusb_p0: endpoint {
-									remote-endpoint = <&typec_p0>;
-								};
-							};
-						};
-					};
-				};
-
-				/* C1 - M.2 Key-E */
-				pcie@14100000 {
-					status = "okay";
-
-					vddio-pex-ctl-supply = <&vdd_1v8_ao>;
-
-					phys = <&p2u_hsio_3>;
-					phy-names = "p2u-0";
-				};
-
-				/* C4 - M.2 Key-M */
-				pcie@14160000 {
-					status = "okay";
-
-					vddio-pex-ctl-supply = <&vdd_1v8_ao>;
-
-					phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
-					       <&p2u_hsio_7>;
-					phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
-				};
-
-				/* C8 - Ethernet */
-				pcie@140a0000 {
-					status = "okay";
-
-					num-lanes = <2>;
-
-					phys = <&p2u_gbe_2>, <&p2u_gbe_3>;
-					phy-names = "p2u-0", "p2u-1";
-
-					vddio-pex-ctl-supply = <&vdd_1v8_ao>;
-					vpcie3v3-supply = <&vdd_3v3_pcie>;
-				};
-
-				/* C7 - M.2 Key-M */
-				pcie@141e0000 {
-					status = "okay";
-
-					vddio-pex-ctl-supply = <&vdd_1v8_ao>;
-
-					phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
-					phy-names = "p2u-0", "p2u-1";
-				};
-
-				/* PWM1, 40pin header, pin 15 */
-				pwm@3280000 {
-					status = "okay";
-				};
-
-				/* PWM3, FAN */
-				pwm@32a0000 {
-					status = "okay";
-				};
-
-				/* PWM5, 40pin header, pin 33 */
-				pwm@32c0000 {
-					status = "okay";
-				};
-
-				/* PWM7, 40pin header, pin 32 */
-				pwm@32e0000 {
-					status = "okay";
-				};
-
-				serial@31d0000 {
-					current-speed = <115200>;
-				};
-
-				tachometer@39c0000 {
-					status = "okay";
-					upper-threshold = <0xfffff>;
-					lower-threshold = <0x0>;
-				};
-
-				hsp@3d00000 {
-					status = "okay";
-				};
-
-				aon@c000000 {
-					status = "okay";
-				};
-
-				hardware-timestamp@c1e0000 {
-					status = "okay";
-					nvidia,num-slices = <3>;
-				};
-
-				mttcan@c310000 {
-					status = "okay";
-				};
-
-				host1x@13e00000 {
-					nvdec@15480000 {
-						status = "okay";
-					};
-
-					nvenc@154c0000 {
-						status = "okay";
-					};
-
-					tegra_soc_hwpm {
-						status = "okay";
-					};
-
-					nvdla0@15880000 {
-						status = "okay";
-					};
-
-					nvdla1@158c0000 {
-						status = "okay";
-					};
-
-					ofa@15a50000 {
-						status = "okay";
-					};
-
-					pva0@16000000 {
-						status = "okay";
-
-						pva0_niso1_ctx0 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx1 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx2 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx3 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx4 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx5 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx6 {
-							status = "okay";
-						};
-
-						pva0_niso1_ctx7 {
-							status = "okay";
-						};
-					};
-
-					nvjpg@15380000 {
-						status = "okay";
-					};
-
-					nvjpg@15540000 {
-						status = "okay";
 					};
 				};
 			};
+		};
 
-			cpus {
-				idle-states {
-					c7 {
-						status = "okay";
+		i2c@c240000 {
+			status = "okay";
+			ina32211_1_40: ina3221@40 {
+				compatible = "ti,ina3221";
+				reg = <0x40>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				#io-channel-cells = <1>;
+				channel@0 {
+					reg = <0x0>;
+					label = "VDD_IN";
+					shunt-resistor-micro-ohms = <5000>;
+				};
+				channel@1 {
+					reg = <0x1>;
+					label = "VDD_CPU_GPU_CV";
+					shunt-resistor-micro-ohms = <5000>;
+				};
+				channel@2 {
+					reg = <0x2>;
+					label = "VDD_SOC";
+					shunt-resistor-micro-ohms = <5000>;
+				};
+			};
+			fusb301@25 {
+				compatible = "onsemi,fusb301";
+				reg = <0x25>;
+				status = "okay";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				interrupt-parent = <&gpio>;
+				interrupts = <TEGRA234_MAIN_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
+				connector@0 {
+					port@0 {
+						fusb_p0: endpoint {
+							remote-endpoint = <&typec_p0>;
+						};
 					};
 				};
 			};
+		};
 
-			nvpmodel {
+		/* C1 - M.2 Key-E */
+		pcie@14100000 {
+			status = "okay";
+
+			vddio-pex-ctl-supply = <&vdd_1v8_ao>;
+
+			phys = <&p2u_hsio_3>;
+			phy-names = "p2u-0";
+		};
+
+		/* C4 - M.2 Key-M */
+		pcie@14160000 {
+			status = "okay";
+
+			vddio-pex-ctl-supply = <&vdd_1v8_ao>;
+
+			phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
+			       <&p2u_hsio_7>;
+			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
+		};
+
+		/* C8 - Ethernet */
+		pcie@140a0000 {
+			status = "okay";
+
+			num-lanes = <2>;
+
+			phys = <&p2u_gbe_2>, <&p2u_gbe_3>;
+			phy-names = "p2u-0", "p2u-1";
+
+			vddio-pex-ctl-supply = <&vdd_1v8_ao>;
+			vpcie3v3-supply = <&vdd_3v3_pcie>;
+		};
+
+		/* C7 - M.2 Key-M */
+		pcie@141e0000 {
+			status = "okay";
+
+			vddio-pex-ctl-supply = <&vdd_1v8_ao>;
+
+			phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
+			phy-names = "p2u-0", "p2u-1";
+		};
+
+		/* PWM1, 40pin header, pin 15 */
+		pwm@3280000 {
+			status = "okay";
+		};
+
+		/* PWM3, FAN */
+		pwm@32a0000 {
+			status = "okay";
+		};
+
+		/* PWM5, 40pin header, pin 33 */
+		pwm@32c0000 {
+			status = "okay";
+		};
+
+		/* PWM7, 40pin header, pin 32 */
+		pwm@32e0000 {
+			status = "okay";
+		};
+
+		serial@31d0000 {
+			current-speed = <115200>;
+		};
+
+		tachometer@39c0000 {
+			status = "okay";
+			upper-threshold = <0xfffff>;
+			lower-threshold = <0x0>;
+		};
+
+		hsp@3d00000 {
+			status = "okay";
+		};
+
+		aon@c000000 {
+			status = "okay";
+		};
+
+		hardware-timestamp@c1e0000 {
+			status = "okay";
+			nvidia,num-slices = <3>;
+		};
+
+		mttcan@c310000 {
+			status = "okay";
+		};
+
+		host1x@13e00000 {
+			nvdec@15480000 {
 				status = "okay";
 			};
 
-			soctherm-oc-event {
+			nvenc@154c0000 {
 				status = "okay";
 			};
 
-			thermal-zones {
-				cpu-thermal {
-					status = "okay";
-				};
-
-				gpu-thermal {
-					status = "okay";
-				};
-
-				cv0-thermal {
-					status = "okay";
-				};
-
-				cv1-thermal {
-					status = "okay";
-				};
-
-				cv2-thermal {
-					status = "okay";
-				};
-
-				soc0-thermal {
-					status = "okay";
-				};
-
-				soc1-thermal {
-					status = "okay";
-				};
-
-				soc2-thermal {
-					status = "okay";
-				};
-			};
-
-			tegra-hsp@b950000 {
+			tegra_soc_hwpm {
 				status = "okay";
 			};
 
-			dce@d800000 {
+			nvdla0@15880000 {
 				status = "okay";
 			};
 
-			display@13800000 {
+			nvdla1@158c0000 {
 				status = "okay";
 			};
+
+			ofa@15a50000 {
+				status = "okay";
+			};
+
+			pva0@16000000 {
+				status = "okay";
+
+				pva0_niso1_ctx0 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx1 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx2 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx3 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx4 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx5 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx6 {
+					status = "okay";
+				};
+
+				pva0_niso1_ctx7 {
+					status = "okay";
+				};
+			};
+
+			nvjpg@15380000 {
+				status = "okay";
+			};
+
+			nvjpg@15540000 {
+				status = "okay";
+			};
+		};
+	};
+
+	cpus {
+		idle-states {
+			c7 {
+				status = "okay";
+			};
+		};
+	};
+
+	nvpmodel {
+		status = "okay";
+	};
+
+	soctherm-oc-event {
+		status = "okay";
+	};
+
+	thermal-zones {
+		cpu-thermal {
+			status = "okay";
+		};
+
+		gpu-thermal {
+			status = "okay";
+		};
+
+		cv0-thermal {
+			status = "okay";
+		};
+
+		cv1-thermal {
+			status = "okay";
+		};
+
+		cv2-thermal {
+			status = "okay";
+		};
+
+		soc0-thermal {
+			status = "okay";
+		};
+
+		soc1-thermal {
+			status = "okay";
+		};
+
+		soc2-thermal {
+			status = "okay";
+		};
+	};
+
+	tegra-hsp@b950000 {
+		status = "okay";
+	};
+
+	dce@d800000 {
+		status = "okay";
+	};
+
+	display@13800000 {
+		status = "okay";
+	};
 };
diff --git a/nv-platform/tegra234-p3768-0000.dtsi b/nv-platform/tegra234-p3768-0000.dtsi
index 2d36185..d3fc3f4 100644
--- a/nv-platform/tegra234-p3768-0000.dtsi
+++ b/nv-platform/tegra234-p3768-0000.dtsi
@@ -2,35 +2,35 @@
 // SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
 
 / {
-			bus@0 {
+	bus@0 {
 
-				aconnect@2900000 {
-					ahub@2900800 {
-						i2s@2901100 {
-							ports {
-								port@1 {
-									hdr40_snd_i2s_dap_ep: endpoint {
-									};
-								};
+		aconnect@2900000 {
+			ahub@2900800 {
+				i2s@2901100 {
+					ports {
+						port@1 {
+							hdr40_snd_i2s_dap_ep: endpoint {
 							};
 						};
 					};
 				};
-
 			};
+		};
 
-			tegra_sound_graph: tegra_sound: sound {
-				compatible = "nvidia,tegra186-audio-graph-card",
-					     "nvidia,tegra186-ape";
-				clocks = <&bpmp TEGRA234_CLK_PLLA>,
-					 <&bpmp TEGRA234_CLK_PLLA_OUT0>,
-					 <&bpmp TEGRA234_CLK_AUD_MCLK>;
-				clock-names = "pll_a", "plla_out0", "extern1";
-				assigned-clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
-				assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
+	};
 
-				nvidia-audio-card,name = "NVIDIA Jetson Orin NX APE";
+	tegra_sound_graph: tegra_sound: sound {
+		compatible = "nvidia,tegra186-audio-graph-card",
+			     "nvidia,tegra186-ape";
+		clocks = <&bpmp TEGRA234_CLK_PLLA>,
+			 <&bpmp TEGRA234_CLK_PLLA_OUT0>,
+			 <&bpmp TEGRA234_CLK_AUD_MCLK>;
+		clock-names = "pll_a", "plla_out0", "extern1";
+		assigned-clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
+		assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
 
-				hdr40_snd_link_i2s: nvidia-audio-card,dai-link@77 { };
-			};
+		nvidia-audio-card,name = "NVIDIA Jetson Orin NX APE";
+
+		hdr40_snd_link_i2s: nvidia-audio-card,dai-link@77 { };
+	};
 };
diff --git a/nv-soc/tegra234-base-overlay.dtsi b/nv-soc/tegra234-base-overlay.dtsi
index c48001a..1313022 100644
--- a/nv-soc/tegra234-base-overlay.dtsi
+++ b/nv-soc/tegra234-base-overlay.dtsi
@@ -21,776 +21,776 @@
 #define TEGRA234_POWER_DOMAIN_DLAB		33U
 
 / {
-			aliases {
-				serial0 = "/bus@0/serial@3100000";
-				serial1 = "/bus@0/serial@3110000";
-				serial2 = "/bus@0/serial@3140000";
-				i2c0 = "/bus@0/i2c@3160000";
-				i2c1 = "/bus@0/i2c@c240000";
-				i2c2 = "/bus@0/i2c@3180000";
-				i2c3 = "/bus@0/i2c@3190000";
-				i2c4 = "/bpmp/i2c";
-				i2c5 = "/bus@0/i2c@31b0000";
-				i2c6 = "/bus@0/i2c@31c0000";
-				i2c7 = "/bus@0/i2c@c250000";
-				i2c8 = "/bus@0/i2c@31e0000";
-				qspi0 = "/bus@0/spi@3270000";
-			};
+	aliases {
+		serial0 = "/bus@0/serial@3100000";
+		serial1 = "/bus@0/serial@3110000";
+		serial2 = "/bus@0/serial@3140000";
+		i2c0 = "/bus@0/i2c@3160000";
+		i2c1 = "/bus@0/i2c@c240000";
+		i2c2 = "/bus@0/i2c@3180000";
+		i2c3 = "/bus@0/i2c@3190000";
+		i2c4 = "/bpmp/i2c";
+		i2c5 = "/bus@0/i2c@31b0000";
+		i2c6 = "/bus@0/i2c@31c0000";
+		i2c7 = "/bus@0/i2c@c250000";
+		i2c8 = "/bus@0/i2c@31e0000";
+		qspi0 = "/bus@0/spi@3270000";
+	};
 
-			bus@0 {
-				pcie@140a0000 {
-					iommus = <&smmu_niso1 TEGRA234_SID_PCIE8>;
+	bus@0 {
+		pcie@140a0000 {
+			iommus = <&smmu_niso1 TEGRA234_SID_PCIE8>;
+		};
+
+		pcie@140c0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_PCIE9>;
+		};
+
+		pcie@140e0000 {
+			iommus = <&smmu_niso1 TEGRA234_SID_PCIE10>;
+		};
+
+		pcie@14100000 {
+			iommus = <&smmu_niso1 TEGRA234_SID_PCIE1>;
+		};
+
+		pcie@14120000 {
+			iommus = <&smmu_niso1 TEGRA234_SID_PCIE2>;
+		};
+
+		pcie@14140000 {
+			iommus = <&smmu_niso1 TEGRA234_SID_PCIE3>;
+		};
+
+		pcie@14160000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_PCIE4>;
+		};
+
+		pcie@14180000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_PCIE0>;
+		};
+
+		pcie@141a0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_PCIE5>;
+		};
+
+		pcie@141c0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_PCIE6>;
+		};
+
+		pcie@141e0000 {
+			iommus = <&smmu_niso1 TEGRA234_SID_PCIE7>;
+		};
+
+		pcie-ep@141a0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_PCIE5>;
+		};
+
+		pcie-ep@141c0000{
+			iommus = <&smmu_niso0 TEGRA234_SID_PCIE6>;
+		};
+
+		pcie-ep@141e0000{
+			iommus = <&smmu_niso1 TEGRA234_SID_PCIE7>;
+		};
+
+		pcie-ep@140e0000{
+			iommus = <&smmu_niso1 TEGRA234_SID_PCIE10>;
+		};
+
+		hda@3510000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_HDA>;
+		};
+
+		aconnect@2900000 {
+			ahub@2900800 {
+				assigned-clocks = <&bpmp TEGRA234_CLK_PLLA>,
+						  <&bpmp TEGRA234_CLK_PLLA_OUT0>,
+						  <&bpmp TEGRA234_CLK_AHUB>;
+				assigned-clock-parents = <0>,
+						<&bpmp TEGRA234_CLK_PLLA>,
+						<&bpmp TEGRA234_CLK_PLLP_OUT0>;
+				assigned-clock-rates = <294912000>,
+						       <49152000>,
+						       <81600000>;
+
+				#sound-dai-cells = <1>;
+
+				/*
+				 * Below modules are upstreamed and present in v5.15,
+				 * but not yet feature complete. Thus use OOT driver
+				 * versions for now.
+				 */
+				i2s@2901000 {
+					#sound-dai-cells = <1>;
+					nvidia,ahub-i2s-id = <0>;
 				};
 
-				pcie@140c0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_PCIE9>;
+				i2s@2901100 {
+					#sound-dai-cells = <1>;
+					nvidia,ahub-i2s-id = <1>;
 				};
 
-				pcie@140e0000 {
-					iommus = <&smmu_niso1 TEGRA234_SID_PCIE10>;
+				i2s@2901200 {
+					#sound-dai-cells = <1>;
+					nvidia,ahub-i2s-id = <2>;
 				};
 
-				pcie@14100000 {
-					iommus = <&smmu_niso1 TEGRA234_SID_PCIE1>;
+				i2s@2901300 {
+					#sound-dai-cells = <1>;
+					nvidia,ahub-i2s-id = <3>;
 				};
 
-				pcie@14120000 {
-					iommus = <&smmu_niso1 TEGRA234_SID_PCIE2>;
+				i2s@2901400 {
+					#sound-dai-cells = <1>;
+					nvidia,ahub-i2s-id = <4>;
 				};
 
-				pcie@14140000 {
-					iommus = <&smmu_niso1 TEGRA234_SID_PCIE3>;
+				i2s@2901500 {
+					#sound-dai-cells = <1>;
+					nvidia,ahub-i2s-id = <5>;
 				};
 
-				pcie@14160000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_PCIE4>;
+				dmic@2904000 {
+					#sound-dai-cells = <1>;
 				};
 
-				pcie@14180000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_PCIE0>;
+				dmic@2904100 {
+					#sound-dai-cells = <1>;
 				};
 
-				pcie@141a0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_PCIE5>;
+				dmic@2904200 {
+					#sound-dai-cells = <1>;
 				};
 
-				pcie@141c0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_PCIE6>;
+				dmic@2904300 {
+					#sound-dai-cells = <1>;
 				};
 
-				pcie@141e0000 {
-					iommus = <&smmu_niso1 TEGRA234_SID_PCIE7>;
+				dspk@2905000 {
+					#sound-dai-cells = <1>;
 				};
 
-				pcie-ep@141a0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_PCIE5>;
+				dspk@2905100 {
+					#sound-dai-cells = <1>;
 				};
 
-				pcie-ep@141c0000{
-					iommus = <&smmu_niso0 TEGRA234_SID_PCIE6>;
+				admaif@290f000 {
+					#sound-dai-cells = <1>;
 				};
 
-				pcie-ep@141e0000{
-					iommus = <&smmu_niso1 TEGRA234_SID_PCIE7>;
+				/*
+				 * Below modules are upstreamed. DT device nodes
+				 * are backported. But drivers are not in v5.15.
+				 * Thus use existing downstream drivers and add
+				 * '#sound-dai-cells' property needed for downstream
+				 * machine driver.
+				 */
+				sfc@2902000 {
+					#sound-dai-cells = <1>;
 				};
 
-				pcie-ep@140e0000{
-					iommus = <&smmu_niso1 TEGRA234_SID_PCIE10>;
+				sfc@2902200 {
+					#sound-dai-cells = <1>;
 				};
 
-				hda@3510000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_HDA>;
+				sfc@2902400 {
+					#sound-dai-cells = <1>;
 				};
 
-				aconnect@2900000 {
-					ahub@2900800 {
-						assigned-clocks = <&bpmp TEGRA234_CLK_PLLA>,
-								  <&bpmp TEGRA234_CLK_PLLA_OUT0>,
-								  <&bpmp TEGRA234_CLK_AHUB>;
-						assigned-clock-parents = <0>,
-								<&bpmp TEGRA234_CLK_PLLA>,
-								<&bpmp TEGRA234_CLK_PLLP_OUT0>;
-						assigned-clock-rates = <294912000>,
-								       <49152000>,
-								       <81600000>;
-
-						#sound-dai-cells = <1>;
-
-						/*
-						 * Below modules are upstreamed and present in v5.15,
-						 * but not yet feature complete. Thus use OOT driver
-						 * versions for now.
-						 */
-						i2s@2901000 {
-							#sound-dai-cells = <1>;
-							nvidia,ahub-i2s-id = <0>;
-						};
-
-						i2s@2901100 {
-							#sound-dai-cells = <1>;
-							nvidia,ahub-i2s-id = <1>;
-						};
-
-						i2s@2901200 {
-							#sound-dai-cells = <1>;
-							nvidia,ahub-i2s-id = <2>;
-						};
-
-						i2s@2901300 {
-							#sound-dai-cells = <1>;
-							nvidia,ahub-i2s-id = <3>;
-						};
-
-						i2s@2901400 {
-							#sound-dai-cells = <1>;
-							nvidia,ahub-i2s-id = <4>;
-						};
-
-						i2s@2901500 {
-							#sound-dai-cells = <1>;
-							nvidia,ahub-i2s-id = <5>;
-						};
-
-						dmic@2904000 {
-							#sound-dai-cells = <1>;
-						};
-
-						dmic@2904100 {
-							#sound-dai-cells = <1>;
-						};
-
-						dmic@2904200 {
-							#sound-dai-cells = <1>;
-						};
-
-						dmic@2904300 {
-							#sound-dai-cells = <1>;
-						};
-
-						dspk@2905000 {
-							#sound-dai-cells = <1>;
-						};
-
-						dspk@2905100 {
-							#sound-dai-cells = <1>;
-						};
-
-						admaif@290f000 {
-							#sound-dai-cells = <1>;
-						};
-
-						/*
-						 * Below modules are upstreamed. DT device nodes
-						 * are backported. But drivers are not in v5.15.
-						 * Thus use existing downstream drivers and add
-						 * '#sound-dai-cells' property needed for downstream
-						 * machine driver.
-						 */
-						sfc@2902000 {
-							#sound-dai-cells = <1>;
-						};
-
-						sfc@2902200 {
-							#sound-dai-cells = <1>;
-						};
-
-						sfc@2902400 {
-							#sound-dai-cells = <1>;
-						};
-
-						sfc@2902600 {
-							#sound-dai-cells = <1>;
-						};
-
-						amx@2903000 {
-							#sound-dai-cells = <1>;
-						};
-
-						amx@2903100 {
-							#sound-dai-cells = <1>;
-						};
-
-						amx@2903200 {
-							#sound-dai-cells = <1>;
-						};
-
-						amx@2903300 {
-							#sound-dai-cells = <1>;
-						};
-
-						adx@2903800 {
-							#sound-dai-cells = <1>;
-						};
-
-						adx@2903900 {
-							#sound-dai-cells = <1>;
-						};
-
-						adx@2903a00 {
-							#sound-dai-cells = <1>;
-						};
-
-						adx@2903b00 {
-							#sound-dai-cells = <1>;
-						};
-
-						mvc@290a000 {
-							#sound-dai-cells = <1>;
-						};
-
-						mvc@290a200 {
-							#sound-dai-cells = <1>;
-						};
-
-						amixer@290bb00 {
-							#sound-dai-cells = <1>;
-						};
-
-						processing-engine@2908000 {
-							#sound-dai-cells = <1>;
-						};
-
-						asrc@2910000 {
-							#sound-dai-cells = <1>;
-						};
-					};
-
-					/*
-					 * Placeholder for ADSP audio device.
-					 * Not required for L4T releases, will be
-					 * enabled as and when needed.
-					 */
-					tegra_adsp_audio: adsp_audio {
-						#sound-dai-cells = <1>;
-						status = "disabled";
-					};
+				sfc@2902600 {
+					#sound-dai-cells = <1>;
 				};
 
-				ethernet@2310000 {
-					compatible = "nvidia,nveqos";
-					reg = <0x0 0x02310000 0x0 0x10000>,    /* EQOS Base Register */
-					      <0x0 0x023D0000 0x0 0x10000>,    /* MACSEC Base Register */
-					      <0x0 0x02300000 0x0 0x10000>;    /* HV Base Register */
-					reg-names = "mac", "macsec-base", "hypervisor";
-					interrupts = <0 194 0x4>,       /* common */
-						     <0 186 0x4>, /* vm0 */
-						     <0 187 0x4>, /* vm1 */
-						     <0 188 0x4>, /* vm2 */
-						     <0 189 0x4>, /* vm3 */
-						     <0 190 0x4>, /* MACsec non-secure intr */
-						     <0 191 0x4>; /* MACsec secure intr */
-					interrupt-names = "common", "vm0", "vm1", "vm2", "vm3",
-							  "macsec-ns-irq", "macsec-s-irq";
-					resets = <&bpmp TEGRA234_RESET_EQOS>,
-						 <&bpmp TEGRA234_RESET_EQOS_MACSEC>; /* MACsec non-secure reset */
-					reset-names = "mac", "macsec_ns_rst";
-					clocks = <&bpmp TEGRA234_CLK_PLLREFE_VCOOUT>,
-						 <&bpmp TEGRA234_CLK_EQOS_AXI>,
-						 <&bpmp TEGRA234_CLK_EQOS_RX>,
-						 <&bpmp TEGRA234_CLK_EQOS_PTP_REF>,
-						 <&bpmp TEGRA234_CLK_EQOS_TX>,
-						 <&bpmp TEGRA234_CLK_AXI_CBB>,
-						 <&bpmp TEGRA234_CLK_EQOS_RX_M>,
-						 <&bpmp TEGRA234_CLK_EQOS_RX_INPUT>,
-						 <&bpmp TEGRA234_CLK_EQOS_MACSEC_TX>,
-						 <&bpmp TEGRA234_CLK_EQOS_TX_DIVIDER>,
-						 <&bpmp TEGRA234_CLK_EQOS_MACSEC_RX>;
-					clock-names = "pllrefe_vcoout", "eqos_axi", "eqos_rx",
-						      "eqos_ptp_ref", "eqos_tx", "axi_cbb",
-						      "eqos_rx_m", "eqos_rx_input",
-						      "eqos_macsec_tx", "eqos_tx_divider",
-						      "eqos_macsec_rx";
-	#if TEGRA_IOMMU_DT_VERSION >= DT_VERSION_2
-					interconnects = <&mc TEGRA234_MEMORY_CLIENT_EQOSR>,
-							<&mc TEGRA234_MEMORY_CLIENT_EQOSW>;
-					interconnect-names = "dma-mem", "write";
-	#endif
-					iommus = <&smmu_niso1 TEGRA234_SID_EQOS>;
-					nvidia,num-dma-chans = <8>;
-					nvidia,num-mtl-queues = <8>;
-					nvidia,mtl-queues = <0 1 2 3 4 5 6 7>;
-					nvidia,dma-chans = <0 1 2 3 4 5 6 7>;
-					nvidia,tc-mapping = <0 1 2 3 4 5 6 7>;
-					/* Residual Queue can be any valid queue except RxQ0 */
-					nvidia,residual-queue = <1>;
-					nvidia,rx-queue-prio = <0x2 0x1 0x30 0x48 0x0 0x0 0x0 0x0>;
-					nvidia,tx-queue-prio = <0x0 0x7 0x2 0x3 0x0 0x0 0x0 0x0>;
-					nvidia,rxq_enable_ctrl = <2 2 2 2 2 2 2 2>;
-					nvidia,vm-irq-config = <&eqos_vm_irq_config>;
-					status = "disabled";
-					nvidia,dcs-enable = <0x1>;
-					nvidia,macsec-enable = <0x1>;
-					nvidia,pad_calibration = <0x1>;
-					/* pad calibration 2's complement offset for pull-down value */
-					nvidia,pad_auto_cal_pd_offset = <0x0>;
-					/* pad calibration 2's complement offset for pull-up value */
-					nvidia,pad_auto_cal_pu_offset = <0x0>;
-					nvidia,rx_riwt = <512>;
-					nvidia,rx_frames = <64>;
-					nvidia,tx_usecs = <256>;
-					nvidia,tx_frames = <5>;
-					nvidia,promisc_mode = <1>;
-					nvidia,slot_num_check = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
-					nvidia,slot_intvl_vals = <0x0 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D>;
-					nvidia,ptp_ref_clock_speed = <208333334>;
-					nvidia,instance_id = <4>; /* EQOS instance */
-					nvidia,ptp-rx-queue = <3>;
-					pinctrl-names = "mii_rx_disable", "mii_rx_enable";
-					pinctrl-0 = <&eqos_mii_rx_input_state_disable>;
-					pinctrl-1 = <&eqos_mii_rx_input_state_enable>;
-					nvidia,dma_rx_ring_sz = <1024>;
-					nvidia,dma_tx_ring_sz = <1024>;
-					dma-coherent;
+				amx@2903000 {
+					#sound-dai-cells = <1>;
 				};
 
-				ethernet@6800000 {
-					compatible = "nvidia,tegra234-mgbe";
-					reg = <0x0 0x06810000 0x0 0x10000>, /* MGBE base */
-					      <0x0 0x068A0000 0x0 0x10000>, /* XPCS base */
-					      <0x0 0x068D0000 0x0 0x10000>, /* MACsec RM base */
-					      <0x0 0x06800000 0x0 0x10000>; /* HV base */
-					reg-names = "mac", "xpcs", "macsec-base", "hypervisor";
-					interrupts =    <0 384 0x4>,    /* common */
-							<0 385 0x4>,    /* vm0 */
-							<0 386 0x4>,    /* vm1 */
-							<0 387 0x4>,    /* vm2 */
-							<0 388 0x4>,    /* vm3 */
-							<0 389 0x4>,    /* vm4 */
-							<0 390 0x4>,    /* MACsec non-secure intr */
-							<0 391 0x4>;    /* MACsec secure intr */
-					interrupt-names = "common", "vm0", "vm1", "vm2", "vm3", "vm4",
-							  "macsec-ns-irq", "macsec-s-irq";
-					resets = <&bpmp TEGRA234_RESET_MGBE0_MAC>,
-						 <&bpmp TEGRA234_RESET_MGBE0_PCS>,
-						 <&bpmp TEGRA234_RESET_MGBE0_MACSEC>; /* MACsec non-secure reset */
-					reset-names = "mac", "pcs", "macsec_ns_rst";
-					clocks = <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT_M>,
-						 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>,
-						 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_INPUT>,
-						 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS>,
-						 <&bpmp TEGRA234_CLK_MGBE0_TX>,
-						 <&bpmp TEGRA234_CLK_MGBE0_TX_PCS>,
-						 <&bpmp TEGRA234_CLK_MGBE0_MAC_DIVIDER>,
-						 <&bpmp TEGRA234_CLK_MGBE0_MAC>,
-						 <&bpmp TEGRA234_CLK_MGBE0_EEE_PCS>,
-						 <&bpmp TEGRA234_CLK_MGBE0_APP>,
-						 <&bpmp TEGRA234_CLK_MGBE0_PTP_REF>,
-						 <&bpmp TEGRA234_CLK_MGBE0_MACSEC>,
-						 <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT>;
-					clock-names = "rx-input-m", "rx-pcs-m", "rx-pcs-input",
-						      "rx-pcs", "tx", "tx-pcs", "mac-divider",
-						      "mac", "eee-pcs", "mgbe", "ptp-ref",
-						      "mgbe_macsec", "rx-input";
-					interconnects = <&mc TEGRA234_MEMORY_CLIENT_MGBEARD>,
-							<&mc TEGRA234_MEMORY_CLIENT_MGBEAWR>;
-					interconnect-names = "dma-mem", "write";
-					iommus = <&smmu_niso0 TEGRA234_SID_MGBE>;
-					power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEB>;
-					nvidia,vm-irq-config = <&mgbe_vm_irq_config>;
-					nvidia,num-dma-chans = <10>;
-					nvidia,dma-chans = <0 1 2 3 4 5 6 7 8 9>;
-					nvidia,num-mtl-queues = <10>;
-					nvidia,mtl-queues = <0 1 2 3 4 5 6 7 8 9>;
-					nvidia,tc-mapping = <0 1 2 3 4 5 6 7 0 1>;
-					/* Residual Queue can be any valid queue except RxQ0 */
-					nvidia,residual-queue = <1>;
-					nvidia,rxq_enable_ctrl = <2 2 2 2 2 2 2 2 2 2>;
-					nvidia,tx-queue-prio = <0 1 2 3 4 5 6 7 0 0>;
-					nvidia,rx-queue-prio = <0x1 0x2 0x4 0x8 0x10 0x20 0x40 0x80 0x0 0x0>;
-					nvidia,dcs-enable = <0x1>;
-					nvidia,macsec-enable = <0x1>;
-					nvidia,rx_riwt = <512>;
-					nvidia,rx_frames = <64>;
-					nvidia,tx_usecs = <256>;
-					nvidia,tx_frames = <16>;
-					nvidia,promisc_mode = <1>;
-					nvidia,slot_num_check = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
-					nvidia,slot_intvl_vals = <0x0 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D>;
-					nvidia,ptp_ref_clock_speed = <312500000>;
-					nvidia,instance_id = <0>; /* MGBE0 instance */
-					nvidia,ptp-rx-queue = <3>;
-					nvidia,dma_rx_ring_sz = <4096>;
-					nvidia,dma_tx_ring_sz = <4096>;
-					dma-coherent;
+				amx@2903100 {
+					#sound-dai-cells = <1>;
 				};
 
-				host1x@13e00000 {
-					interrupt-parent = <&gic>;
-
-					ranges = <0x0 0x14800000 0x0 0x14800000 0x0 0x02000000>,
-						 <0x0 0x24700000 0x0 0x24700000 0x0 0x00080000>;
+				amx@2903200 {
+					#sound-dai-cells = <1>;
 				};
 
-				spi@3270000 {
-					reset-names = "qspi";
-					dma-names = "rx", "tx";
-					dma-coherent;
-					iommus = <&smmu_niso1 TEGRA234_SID_QSPI0>;
+				amx@2903300 {
+					#sound-dai-cells = <1>;
 				};
 
-				spi@3300000 {
-					reset-names = "qspi";
+				adx@2903800 {
+					#sound-dai-cells = <1>;
 				};
 
-				hardware-timestamp@3aa0000 {
-					status = "disabled";
+				adx@2903900 {
+					#sound-dai-cells = <1>;
 				};
 
-				hardware-timestamp@c1e0000 {
-					status = "disabled";
+				adx@2903a00 {
+					#sound-dai-cells = <1>;
 				};
 
-				i2c@3160000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					dma-coherent;
+				adx@2903b00 {
+					#sound-dai-cells = <1>;
 				};
 
-				i2c@3180000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					dma-coherent;
+				mvc@290a000 {
+					#sound-dai-cells = <1>;
 				};
 
-				i2c@3190000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					dma-coherent;
+				mvc@290a200 {
+					#sound-dai-cells = <1>;
 				};
 
-				i2c@31b0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					dma-coherent;
+				amixer@290bb00 {
+					#sound-dai-cells = <1>;
 				};
 
-				i2c@31c0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					dma-coherent;
+				processing-engine@2908000 {
+					#sound-dai-cells = <1>;
 				};
 
-				i2c@31e0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					dma-coherent;
-				};
-
-				i2c@c240000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					dma-coherent;
-				};
-
-				i2c@c250000 {
-					nvidia,hw-instance-id = <0x7>;
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					dma-coherent;
-				};
-
-				pwm@3280000 {
-					compatible = "nvidia,tegra234-pwm",
-						     "nvidia,tegra194-pwm";
-				};
-
-				phy@3e00000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L0_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID0>;
-				};
-
-				phy@3e10000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L1_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID1>;
-				};
-
-				phy@3e20000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L2_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID2>;
-				};
-
-				phy@3e30000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L3_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID3>;
-				};
-
-				phy@3e40000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L4_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID4>;
-				};
-
-				phy@3e50000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L5_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID5>;
-				};
-
-				phy@3e60000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L6_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID6>;
-				};
-
-				phy@3e70000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L7_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID7>;
-				};
-
-				phy@3e90000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L0_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID8>;
-				};
-
-				phy@3ea0000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L1_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID9>;
-				};
-
-				phy@3eb0000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L2_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID10>;
-				};
-
-				phy@3ec0000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L3_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID11>;
-				};
-
-				phy@3ed0000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L4_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID12>;
-				};
-
-				phy@3ee0000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L5_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID13>;
-				};
-
-				phy@3ef0000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L6_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID14>;
-				};
-
-				phy@3f00000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L7_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID15>;
-				};
-
-				phy@3f20000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L0_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID16>;
-				};
-
-				phy@3f30000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L1_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID17>;
-				};
-
-				phy@3f40000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L2_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID18>;
-				};
-
-				phy@3f50000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L3_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID19>;
-				};
-
-				phy@3f60000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L4_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID20>;
-				};
-
-				phy@3f70000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L5_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID21>;
-				};
-
-				phy@3f80000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L6_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID22>;
-				};
-
-				phy@3f90000 {
-					interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L7_P2U IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "intr";
-
-					nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID23>;
-				};
-
-				mmc@3460000 {
-					mmc-ddr-1_8v;
-					mmc-hs200-1_8v;
-					mmc-hs400-1_8v;
-					mmc-hs400-enhanced-strobe;
-					cap-sd-highspeed;
-					cap-mmc-highspeed;
-				};
-
-				serial@3100000 {
-					clock-names = "serial";
-					reset-names = "serial";
+				asrc@2910000 {
+					#sound-dai-cells = <1>;
 				};
 			};
 
-			cpus {
-				idle-states {
-					entry-method = "psci";
-
-					C7: c7 {
-						compatible = "arm,idle-state";
-						arm,psci-suspend-param = <0x40000007>;
-						min-residency-us = <30000>;
-						wakeup-latency-us = <5000>;
-						idle-state-name = "Core powergate";
-						status = "disabled";
-					};
-				};
-
-				cpu@0 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@100 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@200 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@300 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@10000 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@10100 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@10200 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@10300 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@20000 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@20100 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@20200 {
-					cpu-idle-states = <&C7>;
-				};
-
-				cpu@20300 {
-					cpu-idle-states = <&C7>;
-				};
+			/*
+			 * Placeholder for ADSP audio device.
+			 * Not required for L4T releases, will be
+			 * enabled as and when needed.
+			 */
+			tegra_adsp_audio: adsp_audio {
+				#sound-dai-cells = <1>;
+				status = "disabled";
 			};
+		};
 
-			mgbe_vm_irq_config: mgbe-vm-irq-config {
-				nvidia,num-vm-irqs = <5>;
-				vm_irq1 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <0 1>;
-					nvidia,vm-num = <0>;
-					nvidia,vm-irq-id = <0>;
-				};
-				vm_irq2 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <2 3>;
-					nvidia,vm-num = <1>;
-					nvidia,vm-irq-id = <1>;
-				};
-				vm_irq3 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <4 5>;
-					nvidia,vm-num = <2>;
-					nvidia,vm-irq-id = <2>;
-				};
-				vm_irq4 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <6 7>;
-					nvidia,vm-num = <3>;
-					nvidia,vm-irq-id = <3>;
-				};
-				vm_irq5 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <8 9>;
-					nvidia,vm-num = <4>;
-					nvidia,vm-irq-id = <4>;
-				};
-			};
+		ethernet@2310000 {
+			compatible = "nvidia,nveqos";
+			reg = <0x0 0x02310000 0x0 0x10000>,    /* EQOS Base Register */
+			      <0x0 0x023D0000 0x0 0x10000>,    /* MACSEC Base Register */
+			      <0x0 0x02300000 0x0 0x10000>;    /* HV Base Register */
+			reg-names = "mac", "macsec-base", "hypervisor";
+			interrupts = <0 194 0x4>,       /* common */
+				     <0 186 0x4>, /* vm0 */
+				     <0 187 0x4>, /* vm1 */
+				     <0 188 0x4>, /* vm2 */
+				     <0 189 0x4>, /* vm3 */
+				     <0 190 0x4>, /* MACsec non-secure intr */
+				     <0 191 0x4>; /* MACsec secure intr */
+			interrupt-names = "common", "vm0", "vm1", "vm2", "vm3",
+					  "macsec-ns-irq", "macsec-s-irq";
+			resets = <&bpmp TEGRA234_RESET_EQOS>,
+				 <&bpmp TEGRA234_RESET_EQOS_MACSEC>; /* MACsec non-secure reset */
+			reset-names = "mac", "macsec_ns_rst";
+			clocks = <&bpmp TEGRA234_CLK_PLLREFE_VCOOUT>,
+				 <&bpmp TEGRA234_CLK_EQOS_AXI>,
+				 <&bpmp TEGRA234_CLK_EQOS_RX>,
+				 <&bpmp TEGRA234_CLK_EQOS_PTP_REF>,
+				 <&bpmp TEGRA234_CLK_EQOS_TX>,
+				 <&bpmp TEGRA234_CLK_AXI_CBB>,
+				 <&bpmp TEGRA234_CLK_EQOS_RX_M>,
+				 <&bpmp TEGRA234_CLK_EQOS_RX_INPUT>,
+				 <&bpmp TEGRA234_CLK_EQOS_MACSEC_TX>,
+				 <&bpmp TEGRA234_CLK_EQOS_TX_DIVIDER>,
+				 <&bpmp TEGRA234_CLK_EQOS_MACSEC_RX>;
+			clock-names = "pllrefe_vcoout", "eqos_axi", "eqos_rx",
+				      "eqos_ptp_ref", "eqos_tx", "axi_cbb",
+				      "eqos_rx_m", "eqos_rx_input",
+				      "eqos_macsec_tx", "eqos_tx_divider",
+				      "eqos_macsec_rx";
+#if TEGRA_IOMMU_DT_VERSION >= DT_VERSION_2
+			interconnects = <&mc TEGRA234_MEMORY_CLIENT_EQOSR>,
+					<&mc TEGRA234_MEMORY_CLIENT_EQOSW>;
+			interconnect-names = "dma-mem", "write";
+#endif
+			iommus = <&smmu_niso1 TEGRA234_SID_EQOS>;
+			nvidia,num-dma-chans = <8>;
+			nvidia,num-mtl-queues = <8>;
+			nvidia,mtl-queues = <0 1 2 3 4 5 6 7>;
+			nvidia,dma-chans = <0 1 2 3 4 5 6 7>;
+			nvidia,tc-mapping = <0 1 2 3 4 5 6 7>;
+			/* Residual Queue can be any valid queue except RxQ0 */
+			nvidia,residual-queue = <1>;
+			nvidia,rx-queue-prio = <0x2 0x1 0x30 0x48 0x0 0x0 0x0 0x0>;
+			nvidia,tx-queue-prio = <0x0 0x7 0x2 0x3 0x0 0x0 0x0 0x0>;
+			nvidia,rxq_enable_ctrl = <2 2 2 2 2 2 2 2>;
+			nvidia,vm-irq-config = <&eqos_vm_irq_config>;
+			status = "disabled";
+			nvidia,dcs-enable = <0x1>;
+			nvidia,macsec-enable = <0x1>;
+			nvidia,pad_calibration = <0x1>;
+			/* pad calibration 2's complement offset for pull-down value */
+			nvidia,pad_auto_cal_pd_offset = <0x0>;
+			/* pad calibration 2's complement offset for pull-up value */
+			nvidia,pad_auto_cal_pu_offset = <0x0>;
+			nvidia,rx_riwt = <512>;
+			nvidia,rx_frames = <64>;
+			nvidia,tx_usecs = <256>;
+			nvidia,tx_frames = <5>;
+			nvidia,promisc_mode = <1>;
+			nvidia,slot_num_check = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+			nvidia,slot_intvl_vals = <0x0 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D>;
+			nvidia,ptp_ref_clock_speed = <208333334>;
+			nvidia,instance_id = <4>; /* EQOS instance */
+			nvidia,ptp-rx-queue = <3>;
+			pinctrl-names = "mii_rx_disable", "mii_rx_enable";
+			pinctrl-0 = <&eqos_mii_rx_input_state_disable>;
+			pinctrl-1 = <&eqos_mii_rx_input_state_enable>;
+			nvidia,dma_rx_ring_sz = <1024>;
+			nvidia,dma_tx_ring_sz = <1024>;
+			dma-coherent;
+		};
 
-			eqos_vm_irq_config: vm-irq-config {
-				nvidia,num-vm-irqs = <4>;
-				vm_irq1 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <0 1>;
-					nvidia,vm-num = <0>;
-					nvidia,vm-irq-id = <0>;
-				};
-				vm_irq2 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <2 3>;
-					nvidia,vm-num = <1>;
-					nvidia,vm-irq-id = <1>;
-				};
-				vm_irq3 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <4 5>;
-					nvidia,vm-num = <2>;
-					nvidia,vm-irq-id = <2>;
-				};
-				vm_irq4 {
-					nvidia,num-vm-channels = <2>;
-					nvidia,vm-channels = <6 7>;
-					nvidia,vm-num = <3>;
-					nvidia,vm-irq-id = <3>;
-				};
+		ethernet@6800000 {
+			compatible = "nvidia,tegra234-mgbe";
+			reg = <0x0 0x06810000 0x0 0x10000>, /* MGBE base */
+			      <0x0 0x068A0000 0x0 0x10000>, /* XPCS base */
+			      <0x0 0x068D0000 0x0 0x10000>, /* MACsec RM base */
+			      <0x0 0x06800000 0x0 0x10000>; /* HV base */
+			reg-names = "mac", "xpcs", "macsec-base", "hypervisor";
+			interrupts =    <0 384 0x4>,    /* common */
+					<0 385 0x4>,    /* vm0 */
+					<0 386 0x4>,    /* vm1 */
+					<0 387 0x4>,    /* vm2 */
+					<0 388 0x4>,    /* vm3 */
+					<0 389 0x4>,    /* vm4 */
+					<0 390 0x4>,    /* MACsec non-secure intr */
+					<0 391 0x4>;    /* MACsec secure intr */
+			interrupt-names = "common", "vm0", "vm1", "vm2", "vm3", "vm4",
+					  "macsec-ns-irq", "macsec-s-irq";
+			resets = <&bpmp TEGRA234_RESET_MGBE0_MAC>,
+				 <&bpmp TEGRA234_RESET_MGBE0_PCS>,
+				 <&bpmp TEGRA234_RESET_MGBE0_MACSEC>; /* MACsec non-secure reset */
+			reset-names = "mac", "pcs", "macsec_ns_rst";
+			clocks = <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT_M>,
+				 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>,
+				 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_INPUT>,
+				 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS>,
+				 <&bpmp TEGRA234_CLK_MGBE0_TX>,
+				 <&bpmp TEGRA234_CLK_MGBE0_TX_PCS>,
+				 <&bpmp TEGRA234_CLK_MGBE0_MAC_DIVIDER>,
+				 <&bpmp TEGRA234_CLK_MGBE0_MAC>,
+				 <&bpmp TEGRA234_CLK_MGBE0_EEE_PCS>,
+				 <&bpmp TEGRA234_CLK_MGBE0_APP>,
+				 <&bpmp TEGRA234_CLK_MGBE0_PTP_REF>,
+				 <&bpmp TEGRA234_CLK_MGBE0_MACSEC>,
+				 <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT>;
+			clock-names = "rx-input-m", "rx-pcs-m", "rx-pcs-input",
+				      "rx-pcs", "tx", "tx-pcs", "mac-divider",
+				      "mac", "eee-pcs", "mgbe", "ptp-ref",
+				      "mgbe_macsec", "rx-input";
+			interconnects = <&mc TEGRA234_MEMORY_CLIENT_MGBEARD>,
+					<&mc TEGRA234_MEMORY_CLIENT_MGBEAWR>;
+			interconnect-names = "dma-mem", "write";
+			iommus = <&smmu_niso0 TEGRA234_SID_MGBE>;
+			power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEB>;
+			nvidia,vm-irq-config = <&mgbe_vm_irq_config>;
+			nvidia,num-dma-chans = <10>;
+			nvidia,dma-chans = <0 1 2 3 4 5 6 7 8 9>;
+			nvidia,num-mtl-queues = <10>;
+			nvidia,mtl-queues = <0 1 2 3 4 5 6 7 8 9>;
+			nvidia,tc-mapping = <0 1 2 3 4 5 6 7 0 1>;
+			/* Residual Queue can be any valid queue except RxQ0 */
+			nvidia,residual-queue = <1>;
+			nvidia,rxq_enable_ctrl = <2 2 2 2 2 2 2 2 2 2>;
+			nvidia,tx-queue-prio = <0 1 2 3 4 5 6 7 0 0>;
+			nvidia,rx-queue-prio = <0x1 0x2 0x4 0x8 0x10 0x20 0x40 0x80 0x0 0x0>;
+			nvidia,dcs-enable = <0x1>;
+			nvidia,macsec-enable = <0x1>;
+			nvidia,rx_riwt = <512>;
+			nvidia,rx_frames = <64>;
+			nvidia,tx_usecs = <256>;
+			nvidia,tx_frames = <16>;
+			nvidia,promisc_mode = <1>;
+			nvidia,slot_num_check = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+			nvidia,slot_intvl_vals = <0x0 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D 0x7D>;
+			nvidia,ptp_ref_clock_speed = <312500000>;
+			nvidia,instance_id = <0>; /* MGBE0 instance */
+			nvidia,ptp-rx-queue = <3>;
+			nvidia,dma_rx_ring_sz = <4096>;
+			nvidia,dma_tx_ring_sz = <4096>;
+			dma-coherent;
+		};
+
+		host1x@13e00000 {
+			interrupt-parent = <&gic>;
+
+			ranges = <0x0 0x14800000 0x0 0x14800000 0x0 0x02000000>,
+				 <0x0 0x24700000 0x0 0x24700000 0x0 0x00080000>;
+		};
+
+		spi@3270000 {
+			reset-names = "qspi";
+			dma-names = "rx", "tx";
+			dma-coherent;
+			iommus = <&smmu_niso1 TEGRA234_SID_QSPI0>;
+		};
+
+		spi@3300000 {
+			reset-names = "qspi";
+		};
+
+		hardware-timestamp@3aa0000 {
+			status = "disabled";
+		};
+
+		hardware-timestamp@c1e0000 {
+			status = "disabled";
+		};
+
+		i2c@3160000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
+		};
+
+		i2c@3180000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
+		};
+
+		i2c@3190000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
+		};
+
+		i2c@31b0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
+		};
+
+		i2c@31c0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
+		};
+
+		i2c@31e0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
+		};
+
+		i2c@c240000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
+		};
+
+		i2c@c250000 {
+			nvidia,hw-instance-id = <0x7>;
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			dma-coherent;
+		};
+
+		pwm@3280000 {
+			compatible = "nvidia,tegra234-pwm",
+				     "nvidia,tegra194-pwm";
+		};
+
+		phy@3e00000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L0_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID0>;
+		};
+
+		phy@3e10000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L1_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID1>;
+		};
+
+		phy@3e20000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L2_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID2>;
+		};
+
+		phy@3e30000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L3_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID3>;
+		};
+
+		phy@3e40000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L4_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID4>;
+		};
+
+		phy@3e50000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L5_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID5>;
+		};
+
+		phy@3e60000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L6_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID6>;
+		};
+
+		phy@3e70000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_HSIO_L7_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID7>;
+		};
+
+		phy@3e90000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L0_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID8>;
+		};
+
+		phy@3ea0000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L1_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID9>;
+		};
+
+		phy@3eb0000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L2_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID10>;
+		};
+
+		phy@3ec0000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L3_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID11>;
+		};
+
+		phy@3ed0000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L4_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID12>;
+		};
+
+		phy@3ee0000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L5_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID13>;
+		};
+
+		phy@3ef0000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L6_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID14>;
+		};
+
+		phy@3f00000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_NVHS_L7_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID15>;
+		};
+
+		phy@3f20000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L0_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID16>;
+		};
+
+		phy@3f30000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L1_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID17>;
+		};
+
+		phy@3f40000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L2_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID18>;
+		};
+
+		phy@3f50000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L3_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID19>;
+		};
+
+		phy@3f60000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L4_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID20>;
+		};
+
+		phy@3f70000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L5_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID21>;
+		};
+
+		phy@3f80000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L6_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID22>;
+		};
+
+		phy@3f90000 {
+			interrupts = <GIC_SPI TEGRA234_IRQ_GBE_L7_P2U IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "intr";
+
+			nvidia,bpmp = <&bpmp TEGRA234_P2U_LANE_ID23>;
+		};
+
+		mmc@3460000 {
+			mmc-ddr-1_8v;
+			mmc-hs200-1_8v;
+			mmc-hs400-1_8v;
+			mmc-hs400-enhanced-strobe;
+			cap-sd-highspeed;
+			cap-mmc-highspeed;
+		};
+
+		serial@3100000 {
+			clock-names = "serial";
+			reset-names = "serial";
+		};
+	};
+
+	cpus {
+		idle-states {
+			entry-method = "psci";
+
+			C7: c7 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x40000007>;
+				min-residency-us = <30000>;
+				wakeup-latency-us = <5000>;
+				idle-state-name = "Core powergate";
+				status = "disabled";
 			};
+		};
+
+		cpu@0 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@100 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@200 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@300 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@10000 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@10100 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@10200 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@10300 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@20000 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@20100 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@20200 {
+			cpu-idle-states = <&C7>;
+		};
+
+		cpu@20300 {
+			cpu-idle-states = <&C7>;
+		};
+	};
+
+	mgbe_vm_irq_config: mgbe-vm-irq-config {
+		nvidia,num-vm-irqs = <5>;
+		vm_irq1 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <0 1>;
+			nvidia,vm-num = <0>;
+			nvidia,vm-irq-id = <0>;
+		};
+		vm_irq2 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <2 3>;
+			nvidia,vm-num = <1>;
+			nvidia,vm-irq-id = <1>;
+		};
+		vm_irq3 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <4 5>;
+			nvidia,vm-num = <2>;
+			nvidia,vm-irq-id = <2>;
+		};
+		vm_irq4 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <6 7>;
+			nvidia,vm-num = <3>;
+			nvidia,vm-irq-id = <3>;
+		};
+		vm_irq5 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <8 9>;
+			nvidia,vm-num = <4>;
+			nvidia,vm-irq-id = <4>;
+		};
+	};
+
+	eqos_vm_irq_config: vm-irq-config {
+		nvidia,num-vm-irqs = <4>;
+		vm_irq1 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <0 1>;
+			nvidia,vm-num = <0>;
+			nvidia,vm-irq-id = <0>;
+		};
+		vm_irq2 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <2 3>;
+			nvidia,vm-num = <1>;
+			nvidia,vm-irq-id = <1>;
+		};
+		vm_irq3 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <4 5>;
+			nvidia,vm-num = <2>;
+			nvidia,vm-irq-id = <2>;
+		};
+		vm_irq4 {
+			nvidia,num-vm-channels = <2>;
+			nvidia,vm-channels = <6 7>;
+			nvidia,vm-num = <3>;
+			nvidia,vm-irq-id = <3>;
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-audio-dai-links.dtsi b/nv-soc/tegra234-soc-audio-dai-links.dtsi
index 0dbe696..3b98925 100644
--- a/nv-soc/tegra234-soc-audio-dai-links.dtsi
+++ b/nv-soc/tegra234-soc-audio-dai-links.dtsi
@@ -7,2270 +7,2270 @@
 #define ADMAIF_CIF(i)	(TEGRA186_ADMAIF_CIF_OFFSET  + i - 1)
 
 / {
-			sound {
-				/* ADMAIF <--> XBAR PCM links */
-				admaif1_pcm_link: nvidia-audio-card,dai-link@0 {
-					status = "okay";
+	sound {
+		/* ADMAIF <--> XBAR PCM links */
+		admaif1_pcm_link: nvidia-audio-card,dai-link@0 {
+			status = "okay";
 
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF1>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF1>;
-					};
-				};
-
-				admaif2_pcm_link: nvidia-audio-card,dai-link@1 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF2>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF2>;
-					};
-				};
-
-				admaif3_pcm_link: nvidia-audio-card,dai-link@2 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF3>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF3>;
-					};
-				};
-
-				admaif4_pcm_link: nvidia-audio-card,dai-link@3 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF4>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF4>;
-					};
-				};
-
-				admaif5_pcm_link: nvidia-audio-card,dai-link@4 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF5>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF5>;
-					};
-				};
-
-				admaif6_pcm_link: nvidia-audio-card,dai-link@5 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF6>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF6>;
-					};
-				};
-
-				admaif7_pcm_link: nvidia-audio-card,dai-link@6 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF7>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF7>;
-					};
-				};
-
-				admaif8_pcm_link: nvidia-audio-card,dai-link@7 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF8>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF8>;
-					};
-				};
-
-				admaif9_pcm_link: nvidia-audio-card,dai-link@8 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF9>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF9>;
-					};
-				};
-
-				admaif10_pcm_link: nvidia-audio-card,dai-link@9 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF10>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF10>;
-					};
-				};
-
-				admaif11_pcm_link: nvidia-audio-card,dai-link@10 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF11>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF11>;
-					};
-				};
-
-				admaif12_pcm_link: nvidia-audio-card,dai-link@11 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF12>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF12>;
-					};
-				};
-
-				admaif13_pcm_link: nvidia-audio-card,dai-link@12 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF13>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF13>;
-					};
-				};
-
-				admaif14_pcm_link: nvidia-audio-card,dai-link@13 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF14>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF14>;
-					};
-				};
-
-				admaif15_pcm_link: nvidia-audio-card,dai-link@14 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF15>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF15>;
-					};
-				};
-
-				admaif16_pcm_link: nvidia-audio-card,dai-link@15 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF16>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF16>;
-					};
-				};
-
-				admaif17_pcm_link: nvidia-audio-card,dai-link@16 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF17>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF17>;
-					};
-				};
-
-				admaif18_pcm_link: nvidia-audio-card,dai-link@17 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF18>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF18>;
-					};
-				};
-
-				admaif19_pcm_link: nvidia-audio-card,dai-link@18 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF19>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF19>;
-					};
-				};
-
-				admaif20_pcm_link: nvidia-audio-card,dai-link@19 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF20>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF20>;
-					};
-				};
-
-				/*
-				 * List ADSP PCM/COMPR links just after ADMAIF PCM links.
-				 * This keeps the ADSP PCM/COMPR device IDs continuous from
-				 * ADMAIF PCM devices and remain the same even if links
-				 * which follow these are removed or any new links are added.
-				 */
-				adsp_pcm_fe1: nvidia-audio-card,dai-link@20 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_PCM1>;
-					};
-					codec {
-						sound-dai = <&tegra_adsp_audio ADSP_FE1>;
-					};
-				};
-
-				adsp_pcm_fe2: nvidia-audio-card,dai-link@21 {
-					status = "okay";
-
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_PCM2>;
-					};
-					codec {
-						sound-dai = <&tegra_adsp_audio ADSP_FE2>;
-					};
-				};
-
-				adsp_compr_fe3: nvidia-audio-card,dai-link@22 {
-					status = "okay";
-
-					link-type = <COMPR_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_COMPR1>;
-					};
-					codec {
-						sound-dai = <&tegra_adsp_audio ADSP_FE3>;
-					};
-				};
-
-				adsp_compr_fe4: nvidia-audio-card,dai-link@23 {
-					status = "okay";
-
-					link-type = <COMPR_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_COMPR2>;
-					};
-					codec {
-						sound-dai = <&tegra_adsp_audio ADSP_FE4>;
-					};
-				};
-
-				/* ADSP to ADMAIF links */
-				adsp_to_admaif1: nvidia-audio-card,dai-link@24 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF1>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(1)>;
-					};
-				};
-
-				adsp_to_admaif2: nvidia-audio-card,dai-link@25 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF2>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(2)>;
-					};
-				};
-
-				adsp_to_admaif3: nvidia-audio-card,dai-link@26 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF3>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(3)>;
-					};
-				};
-
-				adsp_to_admaif4: nvidia-audio-card,dai-link@27 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF4>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(4)>;
-					};
-				};
-
-				adsp_to_admaif5: nvidia-audio-card,dai-link@28 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF5>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(5)>;
-					};
-				};
-
-				adsp_to_admaif6: nvidia-audio-card,dai-link@29 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF6>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(6)>;
-					};
-				};
-
-				adsp_to_admaif7: nvidia-audio-card,dai-link@30 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF7>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(7)>;
-					};
-				};
-
-				adsp_to_admaif8: nvidia-audio-card,dai-link@31 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF8>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(8)>;
-					};
-				};
-
-				adsp_to_admaif9: nvidia-audio-card,dai-link@32 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF9>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(9)>;
-					};
-				};
-
-				adsp_to_admaif10: nvidia-audio-card,dai-link@33 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF10>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(10)>;
-					};
-				};
-
-				adsp_to_admaif11: nvidia-audio-card,dai-link@34 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF11>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(11)>;
-					};
-				};
-
-				adsp_to_admaif12: nvidia-audio-card,dai-link@35 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF12>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(12)>;
-					};
-				};
-
-				adsp_to_admaif13: nvidia-audio-card,dai-link@36 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF13>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(13)>;
-					};
-				};
-
-				adsp_to_admaif14: nvidia-audio-card,dai-link@37 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF14>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(14)>;
-					};
-				};
-
-				adsp_to_admaif15: nvidia-audio-card,dai-link@38 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF15>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(15)>;
-					};
-				};
-
-				adsp_to_admaif16: nvidia-audio-card,dai-link@39 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF16>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(16)>;
-					};
-				};
-
-				adsp_to_admaif17: nvidia-audio-card,dai-link@40 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF17>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(17)>;
-					};
-				};
-
-				adsp_to_admaif18: nvidia-audio-card,dai-link@41 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF18>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(18)>;
-					};
-				};
-
-				adsp_to_admaif19: nvidia-audio-card,dai-link@42 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF19>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(19)>;
-					};
-				};
-
-				adsp_to_admaif20: nvidia-audio-card,dai-link@43 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adsp_audio ADSP_ADMAIF20>;
-					};
-					codec {
-						sound-dai = <&tegra_admaif ADMAIF_FIFO(20)>;
-					};
-				};
-
-				/* ADMAIF <--> XBAR CODEC links */
-				admaif1_codec_link: nvidia-audio-card,dai-link@44 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(1)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF1>;
-					};
-				};
-
-				admaif2_codec_link: nvidia-audio-card,dai-link@45 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(2)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF2>;
-					};
-				};
-
-				admaif3_codec_link: nvidia-audio-card,dai-link@46 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(3)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF3>;
-					};
-				};
-
-				admaif4_codec_link: nvidia-audio-card,dai-link@47 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(4)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF4>;
-					};
-				};
-
-				admaif5_codec_link: nvidia-audio-card,dai-link@48 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(5)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF5>;
-					};
-				};
-
-				admaif6_codec_link: nvidia-audio-card,dai-link@49 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(6)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF6>;
-					};
-				};
-
-				admaif7_codec_link: nvidia-audio-card,dai-link@50 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(7)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF7>;
-					};
-				};
-
-				admaif8_codec_link: nvidia-audio-card,dai-link@51 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(8)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF8>;
-					};
-				};
-
-				admaif9_codec_link: nvidia-audio-card,dai-link@52 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(9)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF9>;
-					};
-				};
-
-				admaif10_codec_link: nvidia-audio-card,dai-link@53 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(10)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF10>;
-					};
-				};
-
-				admaif11_codec_link: nvidia-audio-card,dai-link@54 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(11)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF11>;
-					};
-				};
-
-				admaif12_codec_link: nvidia-audio-card,dai-link@55 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(12)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF12>;
-					};
-				};
-
-				admaif13_codec_link: nvidia-audio-card,dai-link@56 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(13)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF13>;
-					};
-				};
-
-				admaif14_codec_link: nvidia-audio-card,dai-link@57 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(14)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF14>;
-					};
-				};
-
-				admaif15_codec_link: nvidia-audio-card,dai-link@58 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(15)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF15>;
-					};
-				};
-
-				admaif16_codec_link: nvidia-audio-card,dai-link@59 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(16)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF16>;
-					};
-				};
-
-				admaif17_codec_link: nvidia-audio-card,dai-link@60 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(17)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF17>;
-					};
-				};
-
-				admaif18_codec_link: nvidia-audio-card,dai-link@61 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(18)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF18>;
-					};
-				};
-
-				admaif19_codec_link: nvidia-audio-card,dai-link@62 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(19)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF19>;
-					};
-				};
-
-				admaif20_codec_link: nvidia-audio-card,dai-link@63 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_admaif ADMAIF_CIF(20)>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADMAIF20>;
-					};
-				};
-
-				/* XBAR <---> I2S links */
-				xbar_to_i2s1: nvidia-audio-card,dai-link@64 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_I2S1>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s1 I2S_CIF>;
-						prefix = "I2S1";
-					};
-				};
-
-				xbar_to_i2s2: nvidia-audio-card,dai-link@65 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_I2S2>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s2 I2S_CIF>;
-						prefix = "I2S2";
-					};
-				};
-
-				xbar_to_i2s3: nvidia-audio-card,dai-link@66 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_I2S3>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s3 I2S_CIF>;
-						prefix = "I2S3";
-					};
-				};
-
-				xbar_to_i2s4: nvidia-audio-card,dai-link@67 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_I2S4>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s4 I2S_CIF>;
-						prefix = "I2S4";
-					};
-				};
-
-				xbar_to_i2s5: nvidia-audio-card,dai-link@68 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_I2S5>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s5 I2S_CIF>;
-						prefix = "I2S5";
-					};
-				};
-
-				xbar_to_i2s6: nvidia-audio-card,dai-link@69 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_I2S6>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s6 I2S_CIF>;
-						prefix = "I2S6";
-					};
-				};
-
-				/* XBAR <----> DMIC links */
-				xbar_to_dmic1: nvidia-audio-card,dai-link@70 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_DMIC1>;
-					};
-					codec {
-						sound-dai = <&tegra_dmic1 DMIC_CIF>;
-						prefix = "DMIC1";
-					};
-				};
-
-				xbar_to_dmic2: nvidia-audio-card,dai-link@71 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_DMIC2>;
-					};
-					codec {
-						sound-dai = <&tegra_dmic2 DMIC_CIF>;
-						prefix = "DMIC2";
-					};
-				};
-
-				xbar_to_dmic3: nvidia-audio-card,dai-link@72 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_DMIC3>;
-					};
-					codec {
-						sound-dai = <&tegra_dmic3 DMIC_CIF>;
-						prefix = "DMIC3";
-					};
-				};
-
-				xbar_to_dmic4: nvidia-audio-card,dai-link@73 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_DMIC4>;
-					};
-					codec {
-						sound-dai = <&tegra_dmic4 DMIC_CIF>;
-						prefix = "DMIC4";
-					};
-				};
-
-				/* XBAR <----> DSPK links */
-				xbar_to_dspk1: nvidia-audio-card,dai-link@74 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_DSPK1>;
-					};
-					codec {
-						sound-dai = <&tegra_dspk1 DSPK_CIF>;
-						prefix = "DSPK1";
-					};
-				};
-
-				xbar_to_dspk2: nvidia-audio-card,dai-link@75 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_DSPK2>;
-					};
-					codec {
-						sound-dai = <&tegra_dspk2 DSPK_CIF>;
-						prefix = "DSPK2";
-					};
-				};
-
-				/* I2S(DAP) <----> I2S(Dummy) links */
-				i2s1_to_codec: nvidia-audio-card,dai-link@76 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					i2s1_cpu: cpu {
-						sound-dai = <&tegra_i2s1 I2S_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s1 I2S_DUMMY>;
-					};
-				};
-
-				i2s2_to_codec: nvidia-audio-card,dai-link@77 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					i2s2_cpu: cpu {
-						sound-dai = <&tegra_i2s2 I2S_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s2 I2S_DUMMY>;
-					};
-				};
-
-				i2s3_to_codec: nvidia-audio-card,dai-link@78 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					i2s3_cpu: cpu {
-						sound-dai = <&tegra_i2s3 I2S_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s3 I2S_DUMMY>;
-					};
-				};
-
-				i2s4_to_codec: nvidia-audio-card,dai-link@79 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					i2s4_cpu: cpu {
-						sound-dai = <&tegra_i2s4 I2S_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s4 I2S_DUMMY>;
-					};
-				};
-
-				i2s5_to_codec: nvidia-audio-card,dai-link@80 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					i2s5_cpu: cpu {
-						sound-dai = <&tegra_i2s5 I2S_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s5 I2S_DUMMY>;
-					};
-				};
-
-				i2s6_to_codec: nvidia-audio-card,dai-link@81 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					i2s6_cpu: cpu {
-						sound-dai = <&tegra_i2s6 I2S_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_i2s6 I2S_DUMMY>;
-					};
-				};
-
-				/* DMIC(DAP) <----> DMIC(Dummy) links */
-				dmic1_to_codec: nvidia-audio-card,dai-link@82 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_dmic1 DMIC_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_dmic1 DMIC_DUMMY>;
-					};
-				};
-
-				dmic2_to_codec: nvidia-audio-card,dai-link@83 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_dmic2 DMIC_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_dmic2 DMIC_DUMMY>;
-					};
-				};
-
-				dmic3_to_codec: nvidia-audio-card,dai-link@84 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_dmic3 DMIC_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_dmic3 DMIC_DUMMY>;
-					};
-				};
-
-				dmic4_to_codec: nvidia-audio-card,dai-link@85 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_dmic4 DMIC_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_dmic4 DMIC_DUMMY>;
-					};
-				};
-
-				/* DSPK(DAP) <----> DSPK(Dummy) links */
-				dspk1_to_codec: nvidia-audio-card,dai-link@86 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_dspk1 DSPK_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_dspk1 DSPK_DUMMY>;
-					};
-				};
-
-				dspk2_to_codec: nvidia-audio-card,dai-link@87 {
-					status = "okay";
-
-					format = "i2s";
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_dspk2 DSPK_DAP>;
-					};
-					codec {
-						sound-dai = <&tegra_dspk2 DSPK_DUMMY>;
-					};
-				};
-
-				xbar_to_amx1_in1: nvidia-audio-card,dai-link@88 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX1_IN1>;
-					};
-					codec {
-						sound-dai = <&tegra_amx1 AMX_IN1>;
-						prefix = "AMX1";
-					};
-				};
-
-				xbar_to_amx1_in2: nvidia-audio-card,dai-link@89 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX1_IN2>;
-					};
-					codec {
-						sound-dai = <&tegra_amx1 AMX_IN2>;
-						prefix = "AMX1";
-					};
-				};
-
-				xbar_to_amx1_in3: nvidia-audio-card,dai-link@90 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX1_IN3>;
-					};
-					codec {
-						sound-dai = <&tegra_amx1 AMX_IN3>;
-						prefix = "AMX1";
-					};
-				};
-
-				xbar_to_amx1_in4: nvidia-audio-card,dai-link@91 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX1_IN4>;
-					};
-					codec {
-						sound-dai = <&tegra_amx1 AMX_IN4>;
-						prefix = "AMX1";
-					};
-				};
-
-				amx1_out_to_xbar: nvidia-audio-card,dai-link@92 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amx1 AMX_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AMX1_OUT>;
-					};
-				};
-
-				xbar_to_amx2_in1: nvidia-audio-card,dai-link@93 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX2_IN1>;
-					};
-					codec {
-						sound-dai = <&tegra_amx2 AMX_IN1>;
-						prefix = "AMX2";
-					};
-				};
-
-				xbar_to_amx2_in2: nvidia-audio-card,dai-link@94 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX2_IN2>;
-					};
-					codec {
-						sound-dai = <&tegra_amx2 AMX_IN2>;
-						prefix = "AMX2";
-					};
-				};
-
-				xbar_to_amx2_in3: nvidia-audio-card,dai-link@95 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX2_IN3>;
-					};
-					codec {
-						sound-dai = <&tegra_amx2 AMX_IN3>;
-						prefix = "AMX2";
-					};
-				};
-
-				xbar_to_amx2_in4: nvidia-audio-card,dai-link@96 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX2_IN4>;
-					};
-					codec {
-						sound-dai = <&tegra_amx2 AMX_IN4>;
-						prefix = "AMX2";
-					};
-				};
-
-				amx2_out_to_xbar: nvidia-audio-card,dai-link@97 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amx2 AMX_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AMX2_OUT>;
-					};
-				};
-
-				xbar_to_amx3_in1: nvidia-audio-card,dai-link@98 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX3_IN1>;
-					};
-					codec {
-						sound-dai = <&tegra_amx3 AMX_IN1>;
-						prefix = "AMX3";
-					};
-				};
-
-				xbar_to_amx3_in2: nvidia-audio-card,dai-link@99 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX3_IN2>;
-					};
-					codec {
-						sound-dai = <&tegra_amx3 AMX_IN2>;
-						prefix = "AMX3";
-					};
-				};
-
-				xbar_to_amx3_in3: nvidia-audio-card,dai-link@100 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX3_IN3>;
-					};
-					codec {
-						sound-dai = <&tegra_amx3 AMX_IN3>;
-						prefix = "AMX3";
-					};
-				};
-
-				xbar_to_amx3_in4: nvidia-audio-card,dai-link@101 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX3_IN4>;
-					};
-					codec {
-						sound-dai = <&tegra_amx3 AMX_IN4>;
-						prefix = "AMX3";
-					};
-				};
-
-				amx3_out_to_xbar: nvidia-audio-card,dai-link@102 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amx3 AMX_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AMX3_OUT>;
-					};
-				};
-
-				xbar_to_amx4_in1: nvidia-audio-card,dai-link@103 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX4_IN1>;
-					};
-					codec {
-						sound-dai = <&tegra_amx4 AMX_IN1>;
-						prefix = "AMX4";
-					};
-				};
-
-				xbar_to_amx4_in2: nvidia-audio-card,dai-link@104 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX4_IN2>;
-					};
-					codec {
-						sound-dai = <&tegra_amx4 AMX_IN2>;
-						prefix = "AMX4";
-					};
-				};
-
-				xbar_to_amx4_in3: nvidia-audio-card,dai-link@105 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX4_IN3>;
-					};
-					codec {
-						sound-dai = <&tegra_amx4 AMX_IN3>;
-						prefix = "AMX4";
-					};
-				};
-
-				xbar_to_amx4_in4: nvidia-audio-card,dai-link@106 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AMX4_IN4>;
-					};
-					codec {
-						sound-dai = <&tegra_amx4 AMX_IN4>;
-						prefix = "AMX4";
-					};
-				};
-
-				amx4_out_to_xbar: nvidia-audio-card,dai-link@107 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amx4 AMX_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AMX4_OUT>;
-					};
-				};
-
-				xbar_to_adx1_in: nvidia-audio-card,dai-link@108 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ADX1_IN>;
-					};
-					codec {
-						sound-dai = <&tegra_adx1 ADX_IN>;
-						prefix = "ADX1";
-					};
-				};
-
-				adx1_out1_to_xbar: nvidia-audio-card,dai-link@109 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx1 ADX_OUT1>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX1_OUT1>;
-					};
-				};
-
-				adx1_out2_to_xbar: nvidia-audio-card,dai-link@110 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx1 ADX_OUT2>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX1_OUT2>;
-					};
-				};
-
-				adx1_out3_to_xbar: nvidia-audio-card,dai-link@111 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx1 ADX_OUT3>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX1_OUT3>;
-					};
-				};
-
-				adx1_out4_to_xbar: nvidia-audio-card,dai-link@112 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx1 ADX_OUT4>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX1_OUT4>;
-					};
-				};
-
-				xbar_to_adx2_in: nvidia-audio-card,dai-link@113 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ADX2_IN>;
-					};
-					codec {
-						sound-dai = <&tegra_adx2 ADX_IN>;
-						prefix = "ADX2";
-					};
-				};
-
-				adx2_out1_to_xbar: nvidia-audio-card,dai-link@114 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx2 ADX_OUT1>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX2_OUT1>;
-					};
-				};
-
-				adx2_out2_to_xbar: nvidia-audio-card,dai-link@115 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx2 ADX_OUT2>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX2_OUT2>;
-					};
-				};
-
-				adx2_out3_to_xbar: nvidia-audio-card,dai-link@116 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx2 ADX_OUT3>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX2_OUT3>;
-					};
-				};
-
-				adx2_out4_to_xbar: nvidia-audio-card,dai-link@117 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx2 ADX_OUT4>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX2_OUT4>;
-					};
-				};
-
-				xbar_to_adx3_in: nvidia-audio-card,dai-link@118 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ADX3_IN>;
-					};
-					codec {
-						sound-dai = <&tegra_adx3 ADX_IN>;
-						prefix = "ADX3";
-					};
-				};
-
-				adx3_out1_to_xbar: nvidia-audio-card,dai-link@119 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx3 ADX_OUT1>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX3_OUT1>;
-					};
-				};
-
-				adx3_out2_to_xbar: nvidia-audio-card,dai-link@120 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx3 ADX_OUT2>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX3_OUT2>;
-					};
-				};
-
-				adx3_out3_to_xbar: nvidia-audio-card,dai-link@121 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx3 ADX_OUT3>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX3_OUT3>;
-					};
-				};
-
-				adx3_out4_to_xbar: nvidia-audio-card,dai-link@122 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx3 ADX_OUT4>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX3_OUT4>;
-					};
-				};
-
-				xbar_to_adx4_in: nvidia-audio-card,dai-link@123 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ADX4_IN>;
-					};
-					codec {
-						sound-dai = <&tegra_adx4 ADX_IN>;
-						prefix = "ADX4";
-					};
-				};
-
-				adx4_out1_to_xbar: nvidia-audio-card,dai-link@124 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx4 ADX_OUT1>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX4_OUT1>;
-					};
-				};
-
-				adx4_out2_to_xbar: nvidia-audio-card,dai-link@125 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx4 ADX_OUT2>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX4_OUT2>;
-					};
-				};
-
-				adx4_out3_to_xbar: nvidia-audio-card,dai-link@126 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx4 ADX_OUT3>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX4_OUT3>;
-					};
-				};
-
-				adx4_out4_to_xbar: nvidia-audio-card,dai-link@127 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_adx4 ADX_OUT4>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ADX4_OUT4>;
-					};
-				};
-
-				xbar_to_mixer_in1: nvidia-audio-card,dai-link@128 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN1>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN1>;
-					};
-				};
-
-				xbar_to_mixer_in2: nvidia-audio-card,dai-link@129 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN2>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN2>;
-					};
-				};
-
-				xbar_to_mixer_in3: nvidia-audio-card,dai-link@130 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN3>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN3>;
-					};
-				};
-
-				xbar_to_mixer_in4: nvidia-audio-card,dai-link@131 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN4>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN4>;
-					};
-				};
-
-				xbar_to_mixer_in5: nvidia-audio-card,dai-link@132 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN5>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN5>;
-					};
-				};
-
-				xbar_to_mixer_in6: nvidia-audio-card,dai-link@133 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN6>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN6>;
-					};
-				};
-
-				xbar_to_mixer_in7: nvidia-audio-card,dai-link@134 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN7>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN7>;
-					};
-				};
-
-				xbar_to_mixer_in8: nvidia-audio-card,dai-link@135 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN8>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN8>;
-					};
-				};
-
-				xbar_to_mixer_in9: nvidia-audio-card,dai-link@136 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN9>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN9>;
-					};
-				};
-
-				xbar_to_mixer_in10: nvidia-audio-card,dai-link@137 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MIXER_IN10>;
-					};
-					codec {
-						sound-dai = <&tegra_amixer MIXER_IN10>;
-					};
-				};
-
-				mixer_out1_to_xbar: nvidia-audio-card,dai-link@138 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amixer MIXER_OUT1>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_MIXER_OUT1>;
-					};
-				};
-
-				mixer_out2_to_xbar: nvidia-audio-card,dai-link@139 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amixer MIXER_OUT2>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_MIXER_OUT2>;
-					};
-				};
-
-				mixer_out3_to_xbar: nvidia-audio-card,dai-link@140 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amixer MIXER_OUT3>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_MIXER_OUT3>;
-					};
-				};
-
-				mixer_out4_to_xbar: nvidia-audio-card,dai-link@141 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amixer MIXER_OUT4>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_MIXER_OUT4>;
-					};
-				};
-
-				mixer_out5_to_xbar: nvidia-audio-card,dai-link@142 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_amixer MIXER_OUT5>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_MIXER_OUT5>;
-					};
-				};
-
-				xbar_to_sfc1: nvidia-audio-card,dai-link@143 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_SFC1_RX>;
-					};
-					codec {
-						sound-dai = <&tegra_sfc1 SFC_IN>;
-						prefix = "SFC1";
-					};
-				};
-
-				xbar_to_sfc2: nvidia-audio-card,dai-link@144 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_SFC2_RX>;
-					};
-					codec {
-						sound-dai = <&tegra_sfc2 SFC_IN>;
-						prefix = "SFC2";
-					};
-				};
-
-				xbar_to_sfc3: nvidia-audio-card,dai-link@145 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_SFC3_RX>;
-					};
-					codec {
-						sound-dai = <&tegra_sfc3 SFC_IN>;
-						prefix = "SFC3";
-					};
-				};
-
-				xbar_to_sfc4: nvidia-audio-card,dai-link@146 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_SFC4_RX>;
-					};
-					codec {
-						sound-dai = <&tegra_sfc4 SFC_IN>;
-						prefix = "SFC4";
-					};
-				};
-
-				sfc1_to_xbar: nvidia-audio-card,dai-link@147 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_sfc1 SFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_SFC1_TX>;
-					};
-				};
-
-				sfc2_to_xbar: nvidia-audio-card,dai-link@148 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_sfc2 SFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_SFC2_TX>;
-					};
-				};
-
-				sfc3_to_xbar: nvidia-audio-card,dai-link@149 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_sfc3 SFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_SFC3_TX>;
-					};
-				};
-
-				sfc4_to_xbar: nvidia-audio-card,dai-link@150 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_sfc4 SFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_SFC4_TX>;
-					};
-				};
-
-				xbar_to_afc1: nvidia-audio-card,dai-link@151 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AFC1>;
-					};
-					codec {
-						sound-dai = <&tegra_afc1 AFC_IN>;
-						prefix = "AFC1";
-					};
-				};
-
-				xbar_to_afc2: nvidia-audio-card,dai-link@152 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AFC2>;
-					};
-					codec {
-						sound-dai = <&tegra_afc2 AFC_IN>;
-						prefix = "AFC2";
-					};
-				};
-
-				xbar_to_afc3: nvidia-audio-card,dai-link@153 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AFC3>;
-					};
-					codec {
-						sound-dai = <&tegra_afc3 AFC_IN>;
-						prefix = "AFC3";
-					};
-				};
-
-				xbar_to_afc4: nvidia-audio-card,dai-link@154 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AFC4>;
-					};
-					codec {
-						sound-dai = <&tegra_afc4 AFC_IN>;
-						prefix = "AFC4";
-					};
-				};
-
-				xbar_to_afc5: nvidia-audio-card,dai-link@155 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AFC5>;
-					};
-					codec {
-						sound-dai = <&tegra_afc5 AFC_IN>;
-						prefix = "AFC5";
-					};
-				};
-
-				xbar_to_afc6: nvidia-audio-card,dai-link@156 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_AFC6>;
-					};
-					codec {
-						sound-dai = <&tegra_afc6 AFC_IN>;
-						prefix = "AFC6";
-					};
-				};
-
-				afc1_to_xbar: nvidia-audio-card,dai-link@157 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_afc1 AFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AFC1>;
-					};
-				};
-
-				afc2_to_xbar: nvidia-audio-card,dai-link@158 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_afc2 AFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AFC2>;
-					};
-				};
-
-				afc3_to_xbar: nvidia-audio-card,dai-link@159 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_afc3 AFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AFC3>;
-					};
-				};
-
-				afc4_to_xbar: nvidia-audio-card,dai-link@160 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_afc4 AFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AFC4>;
-					};
-				};
-
-				afc5_to_xbar: nvidia-audio-card,dai-link@161 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_afc5 AFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AFC5>;
-					};
-				};
-
-				afc6_to_xbar: nvidia-audio-card,dai-link@162 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_afc6 AFC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_AFC6>;
-					};
-				};
-
-				xbar_to_mvc1: nvidia-audio-card,dai-link@163 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MVC1_RX>;
-					};
-					codec {
-						sound-dai = <&tegra_mvc1 MVC_IN>;
-						prefix = "MVC1";
-					};
-				};
-
-				xbar_to_mvc2: nvidia-audio-card,dai-link@164 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_MVC2_RX>;
-					};
-					codec {
-						sound-dai = <&tegra_mvc2 MVC_IN>;
-						prefix = "MVC2";
-					};
-				};
-
-				mvc1_to_xbar: nvidia-audio-card,dai-link@165 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_mvc1 MVC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_MVC1_TX>;
-					};
-				};
-
-				mvc2_to_xbar: nvidia-audio-card,dai-link@166 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_mvc2 MVC_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_MVC2_TX>;
-					};
-				};
-
-				xbar_to_ope1: nvidia-audio-card,dai-link@167 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_OPE1_RX>;
-					};
-					codec {
-						sound-dai = <&tegra_ope1 OPE_IN>;
-						prefix = "OPE1";
-					};
-				};
-
-				ope1_to_xbar: nvidia-audio-card,dai-link@168 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ope1 OPE_OUT>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_OPE1_TX>;
-					};
-				};
-
-				xbar_to_asrc_in1: nvidia-audio-card,dai-link@169 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ASRC_IN1>;
-					};
-					codec {
-						sound-dai = <&tegra_asrc ASRC_IN1>;
-						prefix = "ASRC1";
-					};
-				};
-
-				xbar_to_asrc_in2: nvidia-audio-card,dai-link@170 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ASRC_IN2>;
-					};
-					codec {
-						sound-dai = <&tegra_asrc ASRC_IN2>;
-						prefix = "ASRC1";
-					};
-				};
-
-				xbar_to_asrc_in3: nvidia-audio-card,dai-link@171 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ASRC_IN3>;
-					};
-					codec {
-						sound-dai = <&tegra_asrc ASRC_IN3>;
-						prefix = "ASRC1";
-					};
-				};
-
-				xbar_to_asrc_in4: nvidia-audio-card,dai-link@172 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ASRC_IN4>;
-					};
-					codec {
-						sound-dai = <&tegra_asrc ASRC_IN4>;
-						prefix = "ASRC1";
-					};
-				};
-
-				xbar_to_asrc_in5: nvidia-audio-card,dai-link@173 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ASRC_IN5>;
-					};
-					codec {
-						sound-dai = <&tegra_asrc ASRC_IN5>;
-						prefix = "ASRC1";
-					};
-				};
-
-				xbar_to_asrc_in6: nvidia-audio-card,dai-link@174 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ASRC_IN6>;
-					};
-					codec {
-						sound-dai = <&tegra_asrc ASRC_IN6>;
-						prefix = "ASRC1";
-					};
-				};
-
-				xbar_to_asrc_in7: nvidia-audio-card,dai-link@175 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_ahub XBAR_ASRC_IN7>;
-					};
-					codec {
-						sound-dai = <&tegra_asrc ASRC_IN7>;
-						prefix = "ASRC1";
-					};
-				};
-
-				asrc_out1_to_xbar: nvidia-audio-card,dai-link@176 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_asrc ASRC_OUT1>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ASRC_OUT1>;
-					};
-				};
-
-				asrc_out2_to_xbar: nvidia-audio-card,dai-link@177 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_asrc ASRC_OUT2>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ASRC_OUT2>;
-					};
-				};
-
-				asrc_out3_to_xbar: nvidia-audio-card,dai-link@178 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_asrc ASRC_OUT3>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ASRC_OUT3>;
-					};
-				};
-
-				asrc_out4_to_xbar: nvidia-audio-card,dai-link@179 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_asrc ASRC_OUT4>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ASRC_OUT4>;
-					};
-				};
-
-				asrc_out5_to_xbar: nvidia-audio-card,dai-link@180 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_asrc ASRC_OUT5>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ASRC_OUT5>;
-					};
-				};
-
-				asrc_out6_to_xbar: nvidia-audio-card,dai-link@181 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_asrc ASRC_OUT6>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ASRC_OUT6>;
-					};
-				};
-
-				arad_to_xbar: nvidia-audio-card,dai-link@182 {
-					status = "okay";
-
-					link-type = <C2C_LINK>;
-					cpu {
-						sound-dai = <&tegra_arad ARAD>;
-					};
-					codec {
-						sound-dai = <&tegra_ahub XBAR_ARAD>;
-					};
-				};
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF1>;
 			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF1>;
+			};
+		};
+
+		admaif2_pcm_link: nvidia-audio-card,dai-link@1 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF2>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF2>;
+			};
+		};
+
+		admaif3_pcm_link: nvidia-audio-card,dai-link@2 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF3>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF3>;
+			};
+		};
+
+		admaif4_pcm_link: nvidia-audio-card,dai-link@3 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF4>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF4>;
+			};
+		};
+
+		admaif5_pcm_link: nvidia-audio-card,dai-link@4 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF5>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF5>;
+			};
+		};
+
+		admaif6_pcm_link: nvidia-audio-card,dai-link@5 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF6>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF6>;
+			};
+		};
+
+		admaif7_pcm_link: nvidia-audio-card,dai-link@6 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF7>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF7>;
+			};
+		};
+
+		admaif8_pcm_link: nvidia-audio-card,dai-link@7 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF8>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF8>;
+			};
+		};
+
+		admaif9_pcm_link: nvidia-audio-card,dai-link@8 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF9>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF9>;
+			};
+		};
+
+		admaif10_pcm_link: nvidia-audio-card,dai-link@9 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF10>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF10>;
+			};
+		};
+
+		admaif11_pcm_link: nvidia-audio-card,dai-link@10 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF11>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF11>;
+			};
+		};
+
+		admaif12_pcm_link: nvidia-audio-card,dai-link@11 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF12>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF12>;
+			};
+		};
+
+		admaif13_pcm_link: nvidia-audio-card,dai-link@12 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF13>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF13>;
+			};
+		};
+
+		admaif14_pcm_link: nvidia-audio-card,dai-link@13 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF14>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF14>;
+			};
+		};
+
+		admaif15_pcm_link: nvidia-audio-card,dai-link@14 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF15>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF15>;
+			};
+		};
+
+		admaif16_pcm_link: nvidia-audio-card,dai-link@15 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF16>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF16>;
+			};
+		};
+
+		admaif17_pcm_link: nvidia-audio-card,dai-link@16 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF17>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF17>;
+			};
+		};
+
+		admaif18_pcm_link: nvidia-audio-card,dai-link@17 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF18>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF18>;
+			};
+		};
+
+		admaif19_pcm_link: nvidia-audio-card,dai-link@18 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF19>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF19>;
+			};
+		};
+
+		admaif20_pcm_link: nvidia-audio-card,dai-link@19 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF20>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF20>;
+			};
+		};
+
+		/*
+		 * List ADSP PCM/COMPR links just after ADMAIF PCM links.
+		 * This keeps the ADSP PCM/COMPR device IDs continuous from
+		 * ADMAIF PCM devices and remain the same even if links
+		 * which follow these are removed or any new links are added.
+		 */
+		adsp_pcm_fe1: nvidia-audio-card,dai-link@20 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_PCM1>;
+			};
+			codec {
+				sound-dai = <&tegra_adsp_audio ADSP_FE1>;
+			};
+		};
+
+		adsp_pcm_fe2: nvidia-audio-card,dai-link@21 {
+			status = "okay";
+
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_PCM2>;
+			};
+			codec {
+				sound-dai = <&tegra_adsp_audio ADSP_FE2>;
+			};
+		};
+
+		adsp_compr_fe3: nvidia-audio-card,dai-link@22 {
+			status = "okay";
+
+			link-type = <COMPR_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_COMPR1>;
+			};
+			codec {
+				sound-dai = <&tegra_adsp_audio ADSP_FE3>;
+			};
+		};
+
+		adsp_compr_fe4: nvidia-audio-card,dai-link@23 {
+			status = "okay";
+
+			link-type = <COMPR_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_COMPR2>;
+			};
+			codec {
+				sound-dai = <&tegra_adsp_audio ADSP_FE4>;
+			};
+		};
+
+		/* ADSP to ADMAIF links */
+		adsp_to_admaif1: nvidia-audio-card,dai-link@24 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF1>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(1)>;
+			};
+		};
+
+		adsp_to_admaif2: nvidia-audio-card,dai-link@25 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF2>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(2)>;
+			};
+		};
+
+		adsp_to_admaif3: nvidia-audio-card,dai-link@26 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF3>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(3)>;
+			};
+		};
+
+		adsp_to_admaif4: nvidia-audio-card,dai-link@27 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF4>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(4)>;
+			};
+		};
+
+		adsp_to_admaif5: nvidia-audio-card,dai-link@28 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF5>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(5)>;
+			};
+		};
+
+		adsp_to_admaif6: nvidia-audio-card,dai-link@29 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF6>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(6)>;
+			};
+		};
+
+		adsp_to_admaif7: nvidia-audio-card,dai-link@30 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF7>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(7)>;
+			};
+		};
+
+		adsp_to_admaif8: nvidia-audio-card,dai-link@31 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF8>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(8)>;
+			};
+		};
+
+		adsp_to_admaif9: nvidia-audio-card,dai-link@32 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF9>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(9)>;
+			};
+		};
+
+		adsp_to_admaif10: nvidia-audio-card,dai-link@33 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF10>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(10)>;
+			};
+		};
+
+		adsp_to_admaif11: nvidia-audio-card,dai-link@34 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF11>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(11)>;
+			};
+		};
+
+		adsp_to_admaif12: nvidia-audio-card,dai-link@35 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF12>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(12)>;
+			};
+		};
+
+		adsp_to_admaif13: nvidia-audio-card,dai-link@36 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF13>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(13)>;
+			};
+		};
+
+		adsp_to_admaif14: nvidia-audio-card,dai-link@37 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF14>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(14)>;
+			};
+		};
+
+		adsp_to_admaif15: nvidia-audio-card,dai-link@38 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF15>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(15)>;
+			};
+		};
+
+		adsp_to_admaif16: nvidia-audio-card,dai-link@39 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF16>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(16)>;
+			};
+		};
+
+		adsp_to_admaif17: nvidia-audio-card,dai-link@40 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF17>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(17)>;
+			};
+		};
+
+		adsp_to_admaif18: nvidia-audio-card,dai-link@41 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF18>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(18)>;
+			};
+		};
+
+		adsp_to_admaif19: nvidia-audio-card,dai-link@42 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF19>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(19)>;
+			};
+		};
+
+		adsp_to_admaif20: nvidia-audio-card,dai-link@43 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adsp_audio ADSP_ADMAIF20>;
+			};
+			codec {
+				sound-dai = <&tegra_admaif ADMAIF_FIFO(20)>;
+			};
+		};
+
+		/* ADMAIF <--> XBAR CODEC links */
+		admaif1_codec_link: nvidia-audio-card,dai-link@44 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(1)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF1>;
+			};
+		};
+
+		admaif2_codec_link: nvidia-audio-card,dai-link@45 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(2)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF2>;
+			};
+		};
+
+		admaif3_codec_link: nvidia-audio-card,dai-link@46 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(3)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF3>;
+			};
+		};
+
+		admaif4_codec_link: nvidia-audio-card,dai-link@47 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(4)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF4>;
+			};
+		};
+
+		admaif5_codec_link: nvidia-audio-card,dai-link@48 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(5)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF5>;
+			};
+		};
+
+		admaif6_codec_link: nvidia-audio-card,dai-link@49 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(6)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF6>;
+			};
+		};
+
+		admaif7_codec_link: nvidia-audio-card,dai-link@50 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(7)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF7>;
+			};
+		};
+
+		admaif8_codec_link: nvidia-audio-card,dai-link@51 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(8)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF8>;
+			};
+		};
+
+		admaif9_codec_link: nvidia-audio-card,dai-link@52 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(9)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF9>;
+			};
+		};
+
+		admaif10_codec_link: nvidia-audio-card,dai-link@53 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(10)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF10>;
+			};
+		};
+
+		admaif11_codec_link: nvidia-audio-card,dai-link@54 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(11)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF11>;
+			};
+		};
+
+		admaif12_codec_link: nvidia-audio-card,dai-link@55 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(12)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF12>;
+			};
+		};
+
+		admaif13_codec_link: nvidia-audio-card,dai-link@56 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(13)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF13>;
+			};
+		};
+
+		admaif14_codec_link: nvidia-audio-card,dai-link@57 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(14)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF14>;
+			};
+		};
+
+		admaif15_codec_link: nvidia-audio-card,dai-link@58 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(15)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF15>;
+			};
+		};
+
+		admaif16_codec_link: nvidia-audio-card,dai-link@59 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(16)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF16>;
+			};
+		};
+
+		admaif17_codec_link: nvidia-audio-card,dai-link@60 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(17)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF17>;
+			};
+		};
+
+		admaif18_codec_link: nvidia-audio-card,dai-link@61 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(18)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF18>;
+			};
+		};
+
+		admaif19_codec_link: nvidia-audio-card,dai-link@62 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(19)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF19>;
+			};
+		};
+
+		admaif20_codec_link: nvidia-audio-card,dai-link@63 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_admaif ADMAIF_CIF(20)>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADMAIF20>;
+			};
+		};
+
+		/* XBAR <---> I2S links */
+		xbar_to_i2s1: nvidia-audio-card,dai-link@64 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_I2S1>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s1 I2S_CIF>;
+				prefix = "I2S1";
+			};
+		};
+
+		xbar_to_i2s2: nvidia-audio-card,dai-link@65 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_I2S2>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s2 I2S_CIF>;
+				prefix = "I2S2";
+			};
+		};
+
+		xbar_to_i2s3: nvidia-audio-card,dai-link@66 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_I2S3>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s3 I2S_CIF>;
+				prefix = "I2S3";
+			};
+		};
+
+		xbar_to_i2s4: nvidia-audio-card,dai-link@67 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_I2S4>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s4 I2S_CIF>;
+				prefix = "I2S4";
+			};
+		};
+
+		xbar_to_i2s5: nvidia-audio-card,dai-link@68 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_I2S5>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s5 I2S_CIF>;
+				prefix = "I2S5";
+			};
+		};
+
+		xbar_to_i2s6: nvidia-audio-card,dai-link@69 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_I2S6>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s6 I2S_CIF>;
+				prefix = "I2S6";
+			};
+		};
+
+		/* XBAR <----> DMIC links */
+		xbar_to_dmic1: nvidia-audio-card,dai-link@70 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_DMIC1>;
+			};
+			codec {
+				sound-dai = <&tegra_dmic1 DMIC_CIF>;
+				prefix = "DMIC1";
+			};
+		};
+
+		xbar_to_dmic2: nvidia-audio-card,dai-link@71 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_DMIC2>;
+			};
+			codec {
+				sound-dai = <&tegra_dmic2 DMIC_CIF>;
+				prefix = "DMIC2";
+			};
+		};
+
+		xbar_to_dmic3: nvidia-audio-card,dai-link@72 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_DMIC3>;
+			};
+			codec {
+				sound-dai = <&tegra_dmic3 DMIC_CIF>;
+				prefix = "DMIC3";
+			};
+		};
+
+		xbar_to_dmic4: nvidia-audio-card,dai-link@73 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_DMIC4>;
+			};
+			codec {
+				sound-dai = <&tegra_dmic4 DMIC_CIF>;
+				prefix = "DMIC4";
+			};
+		};
+
+		/* XBAR <----> DSPK links */
+		xbar_to_dspk1: nvidia-audio-card,dai-link@74 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_DSPK1>;
+			};
+			codec {
+				sound-dai = <&tegra_dspk1 DSPK_CIF>;
+				prefix = "DSPK1";
+			};
+		};
+
+		xbar_to_dspk2: nvidia-audio-card,dai-link@75 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_DSPK2>;
+			};
+			codec {
+				sound-dai = <&tegra_dspk2 DSPK_CIF>;
+				prefix = "DSPK2";
+			};
+		};
+
+		/* I2S(DAP) <----> I2S(Dummy) links */
+		i2s1_to_codec: nvidia-audio-card,dai-link@76 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			i2s1_cpu: cpu {
+				sound-dai = <&tegra_i2s1 I2S_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s1 I2S_DUMMY>;
+			};
+		};
+
+		i2s2_to_codec: nvidia-audio-card,dai-link@77 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			i2s2_cpu: cpu {
+				sound-dai = <&tegra_i2s2 I2S_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s2 I2S_DUMMY>;
+			};
+		};
+
+		i2s3_to_codec: nvidia-audio-card,dai-link@78 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			i2s3_cpu: cpu {
+				sound-dai = <&tegra_i2s3 I2S_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s3 I2S_DUMMY>;
+			};
+		};
+
+		i2s4_to_codec: nvidia-audio-card,dai-link@79 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			i2s4_cpu: cpu {
+				sound-dai = <&tegra_i2s4 I2S_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s4 I2S_DUMMY>;
+			};
+		};
+
+		i2s5_to_codec: nvidia-audio-card,dai-link@80 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			i2s5_cpu: cpu {
+				sound-dai = <&tegra_i2s5 I2S_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s5 I2S_DUMMY>;
+			};
+		};
+
+		i2s6_to_codec: nvidia-audio-card,dai-link@81 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			i2s6_cpu: cpu {
+				sound-dai = <&tegra_i2s6 I2S_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_i2s6 I2S_DUMMY>;
+			};
+		};
+
+		/* DMIC(DAP) <----> DMIC(Dummy) links */
+		dmic1_to_codec: nvidia-audio-card,dai-link@82 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_dmic1 DMIC_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_dmic1 DMIC_DUMMY>;
+			};
+		};
+
+		dmic2_to_codec: nvidia-audio-card,dai-link@83 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_dmic2 DMIC_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_dmic2 DMIC_DUMMY>;
+			};
+		};
+
+		dmic3_to_codec: nvidia-audio-card,dai-link@84 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_dmic3 DMIC_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_dmic3 DMIC_DUMMY>;
+			};
+		};
+
+		dmic4_to_codec: nvidia-audio-card,dai-link@85 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_dmic4 DMIC_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_dmic4 DMIC_DUMMY>;
+			};
+		};
+
+		/* DSPK(DAP) <----> DSPK(Dummy) links */
+		dspk1_to_codec: nvidia-audio-card,dai-link@86 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_dspk1 DSPK_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_dspk1 DSPK_DUMMY>;
+			};
+		};
+
+		dspk2_to_codec: nvidia-audio-card,dai-link@87 {
+			status = "okay";
+
+			format = "i2s";
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_dspk2 DSPK_DAP>;
+			};
+			codec {
+				sound-dai = <&tegra_dspk2 DSPK_DUMMY>;
+			};
+		};
+
+		xbar_to_amx1_in1: nvidia-audio-card,dai-link@88 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX1_IN1>;
+			};
+			codec {
+				sound-dai = <&tegra_amx1 AMX_IN1>;
+				prefix = "AMX1";
+			};
+		};
+
+		xbar_to_amx1_in2: nvidia-audio-card,dai-link@89 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX1_IN2>;
+			};
+			codec {
+				sound-dai = <&tegra_amx1 AMX_IN2>;
+				prefix = "AMX1";
+			};
+		};
+
+		xbar_to_amx1_in3: nvidia-audio-card,dai-link@90 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX1_IN3>;
+			};
+			codec {
+				sound-dai = <&tegra_amx1 AMX_IN3>;
+				prefix = "AMX1";
+			};
+		};
+
+		xbar_to_amx1_in4: nvidia-audio-card,dai-link@91 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX1_IN4>;
+			};
+			codec {
+				sound-dai = <&tegra_amx1 AMX_IN4>;
+				prefix = "AMX1";
+			};
+		};
+
+		amx1_out_to_xbar: nvidia-audio-card,dai-link@92 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amx1 AMX_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AMX1_OUT>;
+			};
+		};
+
+		xbar_to_amx2_in1: nvidia-audio-card,dai-link@93 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX2_IN1>;
+			};
+			codec {
+				sound-dai = <&tegra_amx2 AMX_IN1>;
+				prefix = "AMX2";
+			};
+		};
+
+		xbar_to_amx2_in2: nvidia-audio-card,dai-link@94 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX2_IN2>;
+			};
+			codec {
+				sound-dai = <&tegra_amx2 AMX_IN2>;
+				prefix = "AMX2";
+			};
+		};
+
+		xbar_to_amx2_in3: nvidia-audio-card,dai-link@95 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX2_IN3>;
+			};
+			codec {
+				sound-dai = <&tegra_amx2 AMX_IN3>;
+				prefix = "AMX2";
+			};
+		};
+
+		xbar_to_amx2_in4: nvidia-audio-card,dai-link@96 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX2_IN4>;
+			};
+			codec {
+				sound-dai = <&tegra_amx2 AMX_IN4>;
+				prefix = "AMX2";
+			};
+		};
+
+		amx2_out_to_xbar: nvidia-audio-card,dai-link@97 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amx2 AMX_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AMX2_OUT>;
+			};
+		};
+
+		xbar_to_amx3_in1: nvidia-audio-card,dai-link@98 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX3_IN1>;
+			};
+			codec {
+				sound-dai = <&tegra_amx3 AMX_IN1>;
+				prefix = "AMX3";
+			};
+		};
+
+		xbar_to_amx3_in2: nvidia-audio-card,dai-link@99 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX3_IN2>;
+			};
+			codec {
+				sound-dai = <&tegra_amx3 AMX_IN2>;
+				prefix = "AMX3";
+			};
+		};
+
+		xbar_to_amx3_in3: nvidia-audio-card,dai-link@100 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX3_IN3>;
+			};
+			codec {
+				sound-dai = <&tegra_amx3 AMX_IN3>;
+				prefix = "AMX3";
+			};
+		};
+
+		xbar_to_amx3_in4: nvidia-audio-card,dai-link@101 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX3_IN4>;
+			};
+			codec {
+				sound-dai = <&tegra_amx3 AMX_IN4>;
+				prefix = "AMX3";
+			};
+		};
+
+		amx3_out_to_xbar: nvidia-audio-card,dai-link@102 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amx3 AMX_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AMX3_OUT>;
+			};
+		};
+
+		xbar_to_amx4_in1: nvidia-audio-card,dai-link@103 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX4_IN1>;
+			};
+			codec {
+				sound-dai = <&tegra_amx4 AMX_IN1>;
+				prefix = "AMX4";
+			};
+		};
+
+		xbar_to_amx4_in2: nvidia-audio-card,dai-link@104 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX4_IN2>;
+			};
+			codec {
+				sound-dai = <&tegra_amx4 AMX_IN2>;
+				prefix = "AMX4";
+			};
+		};
+
+		xbar_to_amx4_in3: nvidia-audio-card,dai-link@105 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX4_IN3>;
+			};
+			codec {
+				sound-dai = <&tegra_amx4 AMX_IN3>;
+				prefix = "AMX4";
+			};
+		};
+
+		xbar_to_amx4_in4: nvidia-audio-card,dai-link@106 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AMX4_IN4>;
+			};
+			codec {
+				sound-dai = <&tegra_amx4 AMX_IN4>;
+				prefix = "AMX4";
+			};
+		};
+
+		amx4_out_to_xbar: nvidia-audio-card,dai-link@107 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amx4 AMX_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AMX4_OUT>;
+			};
+		};
+
+		xbar_to_adx1_in: nvidia-audio-card,dai-link@108 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ADX1_IN>;
+			};
+			codec {
+				sound-dai = <&tegra_adx1 ADX_IN>;
+				prefix = "ADX1";
+			};
+		};
+
+		adx1_out1_to_xbar: nvidia-audio-card,dai-link@109 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx1 ADX_OUT1>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX1_OUT1>;
+			};
+		};
+
+		adx1_out2_to_xbar: nvidia-audio-card,dai-link@110 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx1 ADX_OUT2>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX1_OUT2>;
+			};
+		};
+
+		adx1_out3_to_xbar: nvidia-audio-card,dai-link@111 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx1 ADX_OUT3>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX1_OUT3>;
+			};
+		};
+
+		adx1_out4_to_xbar: nvidia-audio-card,dai-link@112 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx1 ADX_OUT4>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX1_OUT4>;
+			};
+		};
+
+		xbar_to_adx2_in: nvidia-audio-card,dai-link@113 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ADX2_IN>;
+			};
+			codec {
+				sound-dai = <&tegra_adx2 ADX_IN>;
+				prefix = "ADX2";
+			};
+		};
+
+		adx2_out1_to_xbar: nvidia-audio-card,dai-link@114 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx2 ADX_OUT1>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX2_OUT1>;
+			};
+		};
+
+		adx2_out2_to_xbar: nvidia-audio-card,dai-link@115 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx2 ADX_OUT2>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX2_OUT2>;
+			};
+		};
+
+		adx2_out3_to_xbar: nvidia-audio-card,dai-link@116 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx2 ADX_OUT3>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX2_OUT3>;
+			};
+		};
+
+		adx2_out4_to_xbar: nvidia-audio-card,dai-link@117 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx2 ADX_OUT4>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX2_OUT4>;
+			};
+		};
+
+		xbar_to_adx3_in: nvidia-audio-card,dai-link@118 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ADX3_IN>;
+			};
+			codec {
+				sound-dai = <&tegra_adx3 ADX_IN>;
+				prefix = "ADX3";
+			};
+		};
+
+		adx3_out1_to_xbar: nvidia-audio-card,dai-link@119 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx3 ADX_OUT1>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX3_OUT1>;
+			};
+		};
+
+		adx3_out2_to_xbar: nvidia-audio-card,dai-link@120 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx3 ADX_OUT2>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX3_OUT2>;
+			};
+		};
+
+		adx3_out3_to_xbar: nvidia-audio-card,dai-link@121 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx3 ADX_OUT3>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX3_OUT3>;
+			};
+		};
+
+		adx3_out4_to_xbar: nvidia-audio-card,dai-link@122 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx3 ADX_OUT4>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX3_OUT4>;
+			};
+		};
+
+		xbar_to_adx4_in: nvidia-audio-card,dai-link@123 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ADX4_IN>;
+			};
+			codec {
+				sound-dai = <&tegra_adx4 ADX_IN>;
+				prefix = "ADX4";
+			};
+		};
+
+		adx4_out1_to_xbar: nvidia-audio-card,dai-link@124 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx4 ADX_OUT1>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX4_OUT1>;
+			};
+		};
+
+		adx4_out2_to_xbar: nvidia-audio-card,dai-link@125 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx4 ADX_OUT2>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX4_OUT2>;
+			};
+		};
+
+		adx4_out3_to_xbar: nvidia-audio-card,dai-link@126 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx4 ADX_OUT3>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX4_OUT3>;
+			};
+		};
+
+		adx4_out4_to_xbar: nvidia-audio-card,dai-link@127 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_adx4 ADX_OUT4>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ADX4_OUT4>;
+			};
+		};
+
+		xbar_to_mixer_in1: nvidia-audio-card,dai-link@128 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN1>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN1>;
+			};
+		};
+
+		xbar_to_mixer_in2: nvidia-audio-card,dai-link@129 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN2>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN2>;
+			};
+		};
+
+		xbar_to_mixer_in3: nvidia-audio-card,dai-link@130 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN3>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN3>;
+			};
+		};
+
+		xbar_to_mixer_in4: nvidia-audio-card,dai-link@131 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN4>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN4>;
+			};
+		};
+
+		xbar_to_mixer_in5: nvidia-audio-card,dai-link@132 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN5>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN5>;
+			};
+		};
+
+		xbar_to_mixer_in6: nvidia-audio-card,dai-link@133 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN6>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN6>;
+			};
+		};
+
+		xbar_to_mixer_in7: nvidia-audio-card,dai-link@134 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN7>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN7>;
+			};
+		};
+
+		xbar_to_mixer_in8: nvidia-audio-card,dai-link@135 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN8>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN8>;
+			};
+		};
+
+		xbar_to_mixer_in9: nvidia-audio-card,dai-link@136 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN9>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN9>;
+			};
+		};
+
+		xbar_to_mixer_in10: nvidia-audio-card,dai-link@137 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MIXER_IN10>;
+			};
+			codec {
+				sound-dai = <&tegra_amixer MIXER_IN10>;
+			};
+		};
+
+		mixer_out1_to_xbar: nvidia-audio-card,dai-link@138 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amixer MIXER_OUT1>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_MIXER_OUT1>;
+			};
+		};
+
+		mixer_out2_to_xbar: nvidia-audio-card,dai-link@139 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amixer MIXER_OUT2>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_MIXER_OUT2>;
+			};
+		};
+
+		mixer_out3_to_xbar: nvidia-audio-card,dai-link@140 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amixer MIXER_OUT3>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_MIXER_OUT3>;
+			};
+		};
+
+		mixer_out4_to_xbar: nvidia-audio-card,dai-link@141 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amixer MIXER_OUT4>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_MIXER_OUT4>;
+			};
+		};
+
+		mixer_out5_to_xbar: nvidia-audio-card,dai-link@142 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_amixer MIXER_OUT5>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_MIXER_OUT5>;
+			};
+		};
+
+		xbar_to_sfc1: nvidia-audio-card,dai-link@143 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_SFC1_RX>;
+			};
+			codec {
+				sound-dai = <&tegra_sfc1 SFC_IN>;
+				prefix = "SFC1";
+			};
+		};
+
+		xbar_to_sfc2: nvidia-audio-card,dai-link@144 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_SFC2_RX>;
+			};
+			codec {
+				sound-dai = <&tegra_sfc2 SFC_IN>;
+				prefix = "SFC2";
+			};
+		};
+
+		xbar_to_sfc3: nvidia-audio-card,dai-link@145 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_SFC3_RX>;
+			};
+			codec {
+				sound-dai = <&tegra_sfc3 SFC_IN>;
+				prefix = "SFC3";
+			};
+		};
+
+		xbar_to_sfc4: nvidia-audio-card,dai-link@146 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_SFC4_RX>;
+			};
+			codec {
+				sound-dai = <&tegra_sfc4 SFC_IN>;
+				prefix = "SFC4";
+			};
+		};
+
+		sfc1_to_xbar: nvidia-audio-card,dai-link@147 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_sfc1 SFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_SFC1_TX>;
+			};
+		};
+
+		sfc2_to_xbar: nvidia-audio-card,dai-link@148 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_sfc2 SFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_SFC2_TX>;
+			};
+		};
+
+		sfc3_to_xbar: nvidia-audio-card,dai-link@149 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_sfc3 SFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_SFC3_TX>;
+			};
+		};
+
+		sfc4_to_xbar: nvidia-audio-card,dai-link@150 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_sfc4 SFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_SFC4_TX>;
+			};
+		};
+
+		xbar_to_afc1: nvidia-audio-card,dai-link@151 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AFC1>;
+			};
+			codec {
+				sound-dai = <&tegra_afc1 AFC_IN>;
+				prefix = "AFC1";
+			};
+		};
+
+		xbar_to_afc2: nvidia-audio-card,dai-link@152 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AFC2>;
+			};
+			codec {
+				sound-dai = <&tegra_afc2 AFC_IN>;
+				prefix = "AFC2";
+			};
+		};
+
+		xbar_to_afc3: nvidia-audio-card,dai-link@153 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AFC3>;
+			};
+			codec {
+				sound-dai = <&tegra_afc3 AFC_IN>;
+				prefix = "AFC3";
+			};
+		};
+
+		xbar_to_afc4: nvidia-audio-card,dai-link@154 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AFC4>;
+			};
+			codec {
+				sound-dai = <&tegra_afc4 AFC_IN>;
+				prefix = "AFC4";
+			};
+		};
+
+		xbar_to_afc5: nvidia-audio-card,dai-link@155 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AFC5>;
+			};
+			codec {
+				sound-dai = <&tegra_afc5 AFC_IN>;
+				prefix = "AFC5";
+			};
+		};
+
+		xbar_to_afc6: nvidia-audio-card,dai-link@156 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_AFC6>;
+			};
+			codec {
+				sound-dai = <&tegra_afc6 AFC_IN>;
+				prefix = "AFC6";
+			};
+		};
+
+		afc1_to_xbar: nvidia-audio-card,dai-link@157 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_afc1 AFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AFC1>;
+			};
+		};
+
+		afc2_to_xbar: nvidia-audio-card,dai-link@158 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_afc2 AFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AFC2>;
+			};
+		};
+
+		afc3_to_xbar: nvidia-audio-card,dai-link@159 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_afc3 AFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AFC3>;
+			};
+		};
+
+		afc4_to_xbar: nvidia-audio-card,dai-link@160 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_afc4 AFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AFC4>;
+			};
+		};
+
+		afc5_to_xbar: nvidia-audio-card,dai-link@161 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_afc5 AFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AFC5>;
+			};
+		};
+
+		afc6_to_xbar: nvidia-audio-card,dai-link@162 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_afc6 AFC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_AFC6>;
+			};
+		};
+
+		xbar_to_mvc1: nvidia-audio-card,dai-link@163 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MVC1_RX>;
+			};
+			codec {
+				sound-dai = <&tegra_mvc1 MVC_IN>;
+				prefix = "MVC1";
+			};
+		};
+
+		xbar_to_mvc2: nvidia-audio-card,dai-link@164 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_MVC2_RX>;
+			};
+			codec {
+				sound-dai = <&tegra_mvc2 MVC_IN>;
+				prefix = "MVC2";
+			};
+		};
+
+		mvc1_to_xbar: nvidia-audio-card,dai-link@165 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_mvc1 MVC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_MVC1_TX>;
+			};
+		};
+
+		mvc2_to_xbar: nvidia-audio-card,dai-link@166 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_mvc2 MVC_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_MVC2_TX>;
+			};
+		};
+
+		xbar_to_ope1: nvidia-audio-card,dai-link@167 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_OPE1_RX>;
+			};
+			codec {
+				sound-dai = <&tegra_ope1 OPE_IN>;
+				prefix = "OPE1";
+			};
+		};
+
+		ope1_to_xbar: nvidia-audio-card,dai-link@168 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ope1 OPE_OUT>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_OPE1_TX>;
+			};
+		};
+
+		xbar_to_asrc_in1: nvidia-audio-card,dai-link@169 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ASRC_IN1>;
+			};
+			codec {
+				sound-dai = <&tegra_asrc ASRC_IN1>;
+				prefix = "ASRC1";
+			};
+		};
+
+		xbar_to_asrc_in2: nvidia-audio-card,dai-link@170 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ASRC_IN2>;
+			};
+			codec {
+				sound-dai = <&tegra_asrc ASRC_IN2>;
+				prefix = "ASRC1";
+			};
+		};
+
+		xbar_to_asrc_in3: nvidia-audio-card,dai-link@171 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ASRC_IN3>;
+			};
+			codec {
+				sound-dai = <&tegra_asrc ASRC_IN3>;
+				prefix = "ASRC1";
+			};
+		};
+
+		xbar_to_asrc_in4: nvidia-audio-card,dai-link@172 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ASRC_IN4>;
+			};
+			codec {
+				sound-dai = <&tegra_asrc ASRC_IN4>;
+				prefix = "ASRC1";
+			};
+		};
+
+		xbar_to_asrc_in5: nvidia-audio-card,dai-link@173 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ASRC_IN5>;
+			};
+			codec {
+				sound-dai = <&tegra_asrc ASRC_IN5>;
+				prefix = "ASRC1";
+			};
+		};
+
+		xbar_to_asrc_in6: nvidia-audio-card,dai-link@174 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ASRC_IN6>;
+			};
+			codec {
+				sound-dai = <&tegra_asrc ASRC_IN6>;
+				prefix = "ASRC1";
+			};
+		};
+
+		xbar_to_asrc_in7: nvidia-audio-card,dai-link@175 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_ahub XBAR_ASRC_IN7>;
+			};
+			codec {
+				sound-dai = <&tegra_asrc ASRC_IN7>;
+				prefix = "ASRC1";
+			};
+		};
+
+		asrc_out1_to_xbar: nvidia-audio-card,dai-link@176 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_asrc ASRC_OUT1>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ASRC_OUT1>;
+			};
+		};
+
+		asrc_out2_to_xbar: nvidia-audio-card,dai-link@177 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_asrc ASRC_OUT2>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ASRC_OUT2>;
+			};
+		};
+
+		asrc_out3_to_xbar: nvidia-audio-card,dai-link@178 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_asrc ASRC_OUT3>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ASRC_OUT3>;
+			};
+		};
+
+		asrc_out4_to_xbar: nvidia-audio-card,dai-link@179 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_asrc ASRC_OUT4>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ASRC_OUT4>;
+			};
+		};
+
+		asrc_out5_to_xbar: nvidia-audio-card,dai-link@180 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_asrc ASRC_OUT5>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ASRC_OUT5>;
+			};
+		};
+
+		asrc_out6_to_xbar: nvidia-audio-card,dai-link@181 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_asrc ASRC_OUT6>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ASRC_OUT6>;
+			};
+		};
+
+		arad_to_xbar: nvidia-audio-card,dai-link@182 {
+			status = "okay";
+
+			link-type = <C2C_LINK>;
+			cpu {
+				sound-dai = <&tegra_arad ARAD>;
+			};
+			codec {
+				sound-dai = <&tegra_ahub XBAR_ARAD>;
+			};
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-camera.dtsi b/nv-soc/tegra234-soc-camera.dtsi
index 0f8fe8d..52cbe51 100644
--- a/nv-soc/tegra234-soc-camera.dtsi
+++ b/nv-soc/tegra234-soc-camera.dtsi
@@ -12,253 +12,253 @@
 #include <dt-bindings/memory/tegra234-mc.h>
 
 / {
-			aliases { /* RCE is the Camera RTCPU */
-				tegra-camera-rtcpu = "/rtcpu@bc00000";
-			};
+	aliases { /* RCE is the Camera RTCPU */
+		tegra-camera-rtcpu = "/rtcpu@bc00000";
+	};
 
-			bus@0 {
-				host1x@13e00000 {
-					vi0: vi0@15c00000 {
-						compatible = "nvidia,tegra234-vi";
-						clocks = <&bpmp TEGRA234_CLK_VI>;
-						clock-names = "vi";
-						nvidia,vi-falcon-device = <&vi0_thi>;
-						resets = <&bpmp TEGRA234_RESET_VI>;
-						reset-names = "vi0";
-						iommus = <&smmu_iso TEGRA234_SID_ISO_VI>;
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIW &emc>;
-						interconnect-names = "write";
-						non-coherent;
-						status = "okay";
-					};
-
-					vi0_thi: vi0-thi@15f00000 {
-						compatible = "nvidia,tegra234-vi-thi";
-						resets = <&bpmp TEGRA234_RESET_VI>;
-						reset-names = "vi0_thi";
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2FALR &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_VI2FALW &emc>;
-						interconnect-names = "dma-mem", "write";
-						status = "okay";
-					};
-
-					vi1: vi1@14c00000 {
-						compatible = "nvidia,tegra234-vi";
-						clocks = <&bpmp TEGRA234_CLK_VI>;
-						clock-names = "vi";
-						nvidia,vi-falcon-device = <&vi1_thi>;
-						resets = <&bpmp TEGRA234_RESET_VI2>;
-						reset-names = "vi1";
-						iommus = <&smmu_iso TEGRA234_SID_ISO_VI2>;
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2W &emc>;
-						interconnect-names = "write";
-						non-coherent;
-						status = "okay";
-					};
-
-					vi1_thi: vi1-thi@14f00000 {
-						compatible = "nvidia,tegra234-vi-thi";
-						resets = <&bpmp TEGRA234_RESET_VI2>;
-						reset-names = "vi1_thi";
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIFALR &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_VIFALW &emc>;
-						interconnect-names = "dma-mem", "write";
-						status = "okay";
-					};
-
-					isp: isp@14800000 {
-						compatible = "nvidia,tegra194-isp";
-						reg = <0x0 0x14800000 0x0 0x00010000>;
-
-						resets = <&bpmp TEGRA234_RESET_ISP>;
-						reset-names = "isp";
-						clocks = <&bpmp TEGRA234_CLK_ISP>;
-						clock-names = "isp";
-						power-domains = <&bpmp TEGRA234_POWER_DOMAIN_ISPA>;
-						nvidia,isp-falcon-device = <&isp_thi>;
-
-						iommus = <&smmu_niso1 TEGRA234_SID_ISP>;
-						dma-coherent;
-						status = "okay";
-					};
-
-					isp_thi: isp-thi@14b00000 {
-						compatible = "nvidia,tegra194-isp-thi";
-						resets = <&bpmp TEGRA234_RESET_ISP>;
-						status = "okay";
-					};
-
-					nvcsi: nvcsi@15a00000 {
-						compatible = "nvidia,tegra194-nvcsi";
-						resets = <&bpmp TEGRA234_RESET_NVCSI>;
-						reset-names = "nvcsi";
-						clocks = <&bpmp TEGRA234_CLK_NVCSI>;
-						clock-names = "nvcsi";
-						status = "okay";
-					};
-				};
-			};
-
-			tegra_rce: rtcpu@bc00000 {
-				compatible = "nvidia,tegra194-rce";
-
-				nvidia,cpu-name = "rce";
-
-				reg =	<0 0xbc00000 0 0x1000>,   /* RCE EVP (RCE_ATCM_EVP) */
-					<0 0xb9f0000 0 0x40000>,  /* RCE PM */
-					<0 0xb840000 0 0x10000>,
-					<0 0xb850000 0 0x10000>;
-
-				reg-names = "rce-evp", "rce-pm",
-						"ast-cpu", "ast-dma";
-
-				clocks =
-					<&bpmp TEGRA234_CLK_RCE_CPU_NIC>,
-					<&bpmp TEGRA234_CLK_RCE_NIC>,
-					<&bpmp TEGRA234_CLK_RCE_CPU>;
-				clock-names = "rce-cpu-nic", "rce-nic", "rce-cpu";
-
-				nvidia,clock-rates =
-					<115200000 601600000>,
-					<115200000 601600000>,
-					<115200000 601600000>;
-
-				resets = <&bpmp TEGRA234_RESET_RCE_ALL>;
-				reset-names = "rce-all";
-
-				interrupts = <GIC_SPI TEGRA234_IRQ_RCE_WDT_REMOTE IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names = "wdt-remote";
-
-				iommus = <&smmu_niso0 TEGRA234_SID_RCE>;
-				memory-region = <&rce_resv>;
-				dma-coherent;
-
-				/* Memory bandwidth in kB/s during boot */
-				nvidia,test-bw = <2400000>;
-
-				nvidia,trace = <&rtcpu_trace 4 0x70100000 0x100000>;
-				nvidia,ivc-channels = <&camera_ivc_channels 2 0x90000000 0x10000>;
-
-				interconnects = <&mc TEGRA234_MEMORY_CLIENT_RCER &emc>,
-						<&mc TEGRA234_MEMORY_CLIENT_RCEW &emc>;
-				interconnect-names = "dma-mem", "write";
-
-				nvidia,autosuspend-delay-ms = <5000>;
+	bus@0 {
+		host1x@13e00000 {
+			vi0: vi0@15c00000 {
+				compatible = "nvidia,tegra234-vi";
+				clocks = <&bpmp TEGRA234_CLK_VI>;
+				clock-names = "vi";
+				nvidia,vi-falcon-device = <&vi0_thi>;
+				resets = <&bpmp TEGRA234_RESET_VI>;
+				reset-names = "vi0";
+				iommus = <&smmu_iso TEGRA234_SID_ISO_VI>;
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIW &emc>;
+				interconnect-names = "write";
+				non-coherent;
 				status = "okay";
-
-				hsp-vm1 {
-					compatible = "nvidia,tegra-camrtc-hsp-vm";
-					mboxes =
-						<&hsp_rce TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(0)>,
-						<&hsp_rce TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(1)>,
-						<&hsp_rce TEGRA_HSP_MBOX_TYPE_SS 0>;
-					mbox-names = "vm-tx", "vm-rx", "vm-ss";
-					status = "okay";
-				};
-
-				hsp-vm2 {
-					compatible = "nvidia,tegra-camrtc-hsp-vm";
-					mboxes =
-						<&hsp_rce TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(2)>,
-						<&hsp_rce TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(3)>,
-						<&hsp_rce TEGRA_HSP_MBOX_TYPE_SS 1>;
-					mbox-names = "vm-tx", "vm-rx", "vm-ss";
-					status = "disabled";
-				};
 			};
 
-			camera_ivc_channels: camera-ivc-channels {
-				echo@0 {
-					compatible = "nvidia,tegra186-camera-ivc-protocol-echo";
-					nvidia,service = "echo";
-					nvidia,version = <0>;
-					nvidia,group = <1>;
-					nvidia,frame-count = <16>;
-					nvidia,frame-size = <64>;
-				};
-				dbg@1 {
-					/* This is raw channel exposed as device */
-					compatible = "nvidia,tegra186-camera-ivc-protocol-dbg";
-					nvidia,service = "debug";
-					nvidia,version = <0>;
-					nvidia,group = <1>;
-					nvidia,frame-count = <1>;
-					nvidia,frame-size = <512>;
-				};
-				dbg@2 {
-					/* This is exposed in debugfs */
-					compatible = "nvidia,tegra186-camera-ivc-protocol-debug";
-					nvidia,service = "debug";
-					nvidia,version = <0>;
-					nvidia,group = <1>;
-					nvidia,frame-count = <1>;
-					nvidia,frame-size = <8192>;
-					nvidia,ivc-timeout = <50>;
-					nvidia,test-timeout = <5000>;
-					nvidia,mem-map = <&tegra_rce &vi0 &isp &vi1>;
-					/* Memory bandwidth in kB/s during tests */
-					nvidia,test-bw = <2400000>;
-				};
-				ivccontrol@3 {
-					compatible = "nvidia,tegra186-camera-ivc-protocol-capture-control";
-					nvidia,service = "capture-control";
-					nvidia,version = <0>;
-					nvidia,group = <1>;
-					nvidia,frame-count = <64>;
-					nvidia,frame-size = <320>;
-				};
-				ivccapture@4 {
-					compatible = "nvidia,tegra186-camera-ivc-protocol-capture";
-					nvidia,service = "capture";
-					nvidia,version = <0>;
-					nvidia,group = <1>;
-					nvidia,frame-count = <512>;
-					nvidia,frame-size = <64>;
-				};
-				diag@5 {
-					compatible = "nvidia,tegra186-camera-diagnostics";
-					nvidia,service = "diag";
-					nvidia,version = <0>;
-					nvidia,group = <1>;
-					nvidia,frame-count = <1>;
-					nvidia,frame-size = <64>;
-				};
+			vi0_thi: vi0-thi@15f00000 {
+				compatible = "nvidia,tegra234-vi-thi";
+				resets = <&bpmp TEGRA234_RESET_VI>;
+				reset-names = "vi0_thi";
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2FALR &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_VI2FALW &emc>;
+				interconnect-names = "dma-mem", "write";
+				status = "okay";
 			};
 
-			rtcpu_trace: tegra-rtcpu-trace {
-				nvidia,enable-printk;
-				nvidia,interval-ms = <50>;
-				nvidia,log-prefix = "[RCE]";
+			vi1: vi1@14c00000 {
+				compatible = "nvidia,tegra234-vi";
+				clocks = <&bpmp TEGRA234_CLK_VI>;
+				clock-names = "vi";
+				nvidia,vi-falcon-device = <&vi1_thi>;
+				resets = <&bpmp TEGRA234_RESET_VI2>;
+				reset-names = "vi1";
+				iommus = <&smmu_iso TEGRA234_SID_ISO_VI2>;
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2W &emc>;
+				interconnect-names = "write";
+				non-coherent;
+				status = "okay";
 			};
 
-			capture_vi: tegra-capture-vi {
-				compatible = "nvidia,tegra-camrtc-capture-vi";
-
-				nvidia,vi-devices = <&vi0 &vi1>;
-				nvidia,vi-mapping-size = <6>;
-				nvidia,vi-mapping =
-					<0 0>,
-					<1 0>,
-					<2 1>,
-					<3 1>,
-					<4 0>,
-					<5 1>;
-				nvidia,vi-mapping-names = "csi-stream-id", "vi-unit-id";
-				nvidia,vi-max-channels = <72>;
+			vi1_thi: vi1-thi@14f00000 {
+				compatible = "nvidia,tegra234-vi-thi";
+				resets = <&bpmp TEGRA234_RESET_VI2>;
+				reset-names = "vi1_thi";
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIFALR &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_VIFALW &emc>;
+				interconnect-names = "dma-mem", "write";
+				status = "okay";
 			};
 
-			reserved-memory {
-				rce_resv: rce-reservation {
-					iommu-addresses = <&tegra_rce 0x0 0x00000000 0x00000000 0xA0000000>,
-							  <&tegra_rce 0x0 0xC0000000 0xffffffff 0x3fffffff>;
-				};
+			isp: isp@14800000 {
+				compatible = "nvidia,tegra194-isp";
+				reg = <0x0 0x14800000 0x0 0x00010000>;
 
-				camdbg_reserved: camdbg_carveout {
-					compatible = "nvidia,camdbg_carveout";
-					size = <0 0x3200000>;
-					alignment = <0 0x100000>;
-					alloc-ranges = <0x1 0 0x1 0>;
-					status = "disabled";
-				};
+				resets = <&bpmp TEGRA234_RESET_ISP>;
+				reset-names = "isp";
+				clocks = <&bpmp TEGRA234_CLK_ISP>;
+				clock-names = "isp";
+				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_ISPA>;
+				nvidia,isp-falcon-device = <&isp_thi>;
+
+				iommus = <&smmu_niso1 TEGRA234_SID_ISP>;
+				dma-coherent;
+				status = "okay";
 			};
+
+			isp_thi: isp-thi@14b00000 {
+				compatible = "nvidia,tegra194-isp-thi";
+				resets = <&bpmp TEGRA234_RESET_ISP>;
+				status = "okay";
+			};
+
+			nvcsi: nvcsi@15a00000 {
+				compatible = "nvidia,tegra194-nvcsi";
+				resets = <&bpmp TEGRA234_RESET_NVCSI>;
+				reset-names = "nvcsi";
+				clocks = <&bpmp TEGRA234_CLK_NVCSI>;
+				clock-names = "nvcsi";
+				status = "okay";
+			};
+		};
+	};
+
+	tegra_rce: rtcpu@bc00000 {
+		compatible = "nvidia,tegra194-rce";
+
+		nvidia,cpu-name = "rce";
+
+		reg =	<0 0xbc00000 0 0x1000>,   /* RCE EVP (RCE_ATCM_EVP) */
+			<0 0xb9f0000 0 0x40000>,  /* RCE PM */
+			<0 0xb840000 0 0x10000>,
+			<0 0xb850000 0 0x10000>;
+
+		reg-names = "rce-evp", "rce-pm",
+				"ast-cpu", "ast-dma";
+
+		clocks =
+			<&bpmp TEGRA234_CLK_RCE_CPU_NIC>,
+			<&bpmp TEGRA234_CLK_RCE_NIC>,
+			<&bpmp TEGRA234_CLK_RCE_CPU>;
+		clock-names = "rce-cpu-nic", "rce-nic", "rce-cpu";
+
+		nvidia,clock-rates =
+			<115200000 601600000>,
+			<115200000 601600000>,
+			<115200000 601600000>;
+
+		resets = <&bpmp TEGRA234_RESET_RCE_ALL>;
+		reset-names = "rce-all";
+
+		interrupts = <GIC_SPI TEGRA234_IRQ_RCE_WDT_REMOTE IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "wdt-remote";
+
+		iommus = <&smmu_niso0 TEGRA234_SID_RCE>;
+		memory-region = <&rce_resv>;
+		dma-coherent;
+
+		/* Memory bandwidth in kB/s during boot */
+		nvidia,test-bw = <2400000>;
+
+		nvidia,trace = <&rtcpu_trace 4 0x70100000 0x100000>;
+		nvidia,ivc-channels = <&camera_ivc_channels 2 0x90000000 0x10000>;
+
+		interconnects = <&mc TEGRA234_MEMORY_CLIENT_RCER &emc>,
+				<&mc TEGRA234_MEMORY_CLIENT_RCEW &emc>;
+		interconnect-names = "dma-mem", "write";
+
+		nvidia,autosuspend-delay-ms = <5000>;
+		status = "okay";
+
+		hsp-vm1 {
+			compatible = "nvidia,tegra-camrtc-hsp-vm";
+			mboxes =
+				<&hsp_rce TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(0)>,
+				<&hsp_rce TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(1)>,
+				<&hsp_rce TEGRA_HSP_MBOX_TYPE_SS 0>;
+			mbox-names = "vm-tx", "vm-rx", "vm-ss";
+			status = "okay";
+		};
+
+		hsp-vm2 {
+			compatible = "nvidia,tegra-camrtc-hsp-vm";
+			mboxes =
+				<&hsp_rce TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(2)>,
+				<&hsp_rce TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(3)>,
+				<&hsp_rce TEGRA_HSP_MBOX_TYPE_SS 1>;
+			mbox-names = "vm-tx", "vm-rx", "vm-ss";
+			status = "disabled";
+		};
+	};
+
+	camera_ivc_channels: camera-ivc-channels {
+		echo@0 {
+			compatible = "nvidia,tegra186-camera-ivc-protocol-echo";
+			nvidia,service = "echo";
+			nvidia,version = <0>;
+			nvidia,group = <1>;
+			nvidia,frame-count = <16>;
+			nvidia,frame-size = <64>;
+		};
+		dbg@1 {
+			/* This is raw channel exposed as device */
+			compatible = "nvidia,tegra186-camera-ivc-protocol-dbg";
+			nvidia,service = "debug";
+			nvidia,version = <0>;
+			nvidia,group = <1>;
+			nvidia,frame-count = <1>;
+			nvidia,frame-size = <512>;
+		};
+		dbg@2 {
+			/* This is exposed in debugfs */
+			compatible = "nvidia,tegra186-camera-ivc-protocol-debug";
+			nvidia,service = "debug";
+			nvidia,version = <0>;
+			nvidia,group = <1>;
+			nvidia,frame-count = <1>;
+			nvidia,frame-size = <8192>;
+			nvidia,ivc-timeout = <50>;
+			nvidia,test-timeout = <5000>;
+			nvidia,mem-map = <&tegra_rce &vi0 &isp &vi1>;
+			/* Memory bandwidth in kB/s during tests */
+			nvidia,test-bw = <2400000>;
+		};
+		ivccontrol@3 {
+			compatible = "nvidia,tegra186-camera-ivc-protocol-capture-control";
+			nvidia,service = "capture-control";
+			nvidia,version = <0>;
+			nvidia,group = <1>;
+			nvidia,frame-count = <64>;
+			nvidia,frame-size = <320>;
+		};
+		ivccapture@4 {
+			compatible = "nvidia,tegra186-camera-ivc-protocol-capture";
+			nvidia,service = "capture";
+			nvidia,version = <0>;
+			nvidia,group = <1>;
+			nvidia,frame-count = <512>;
+			nvidia,frame-size = <64>;
+		};
+		diag@5 {
+			compatible = "nvidia,tegra186-camera-diagnostics";
+			nvidia,service = "diag";
+			nvidia,version = <0>;
+			nvidia,group = <1>;
+			nvidia,frame-count = <1>;
+			nvidia,frame-size = <64>;
+		};
+	};
+
+	rtcpu_trace: tegra-rtcpu-trace {
+		nvidia,enable-printk;
+		nvidia,interval-ms = <50>;
+		nvidia,log-prefix = "[RCE]";
+	};
+
+	capture_vi: tegra-capture-vi {
+		compatible = "nvidia,tegra-camrtc-capture-vi";
+
+		nvidia,vi-devices = <&vi0 &vi1>;
+		nvidia,vi-mapping-size = <6>;
+		nvidia,vi-mapping =
+			<0 0>,
+			<1 0>,
+			<2 1>,
+			<3 1>,
+			<4 0>,
+			<5 1>;
+		nvidia,vi-mapping-names = "csi-stream-id", "vi-unit-id";
+		nvidia,vi-max-channels = <72>;
+	};
+
+	reserved-memory {
+		rce_resv: rce-reservation {
+			iommu-addresses = <&tegra_rce 0x0 0x00000000 0x00000000 0xA0000000>,
+					  <&tegra_rce 0x0 0xC0000000 0xffffffff 0x3fffffff>;
+		};
+
+		camdbg_reserved: camdbg_carveout {
+			compatible = "nvidia,camdbg_carveout";
+			size = <0 0x3200000>;
+			alignment = <0 0x100000>;
+			alloc-ranges = <0x1 0 0x1 0>;
+			status = "disabled";
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-display-overlay.dtsi b/nv-soc/tegra234-soc-display-overlay.dtsi
index 3c676cf..c767456 100644
--- a/nv-soc/tegra234-soc-display-overlay.dtsi
+++ b/nv-soc/tegra234-soc-display-overlay.dtsi
@@ -4,175 +4,175 @@
 #include <dt-bindings/power/tegra234-powergate.h>
 
 / {
-			dce@d800000 {
-				compatible = "nvidia,tegra234-dce";
-				reg = <0x0 0x0d800000 0x0 0x00800000>;
-				interrupts =
-					<0 376 0x4>,
-					<0 377 0x4>;
-				interrupt-names = "wdt-remote",
-					"dce-sm0";
-				iommus = <&smmu_niso0 TEGRA234_SID_DCE>;
-				status = "disabled";
-			};
+	dce@d800000 {
+		compatible = "nvidia,tegra234-dce";
+		reg = <0x0 0x0d800000 0x0 0x00800000>;
+		interrupts =
+			<0 376 0x4>,
+			<0 377 0x4>;
+		interrupt-names = "wdt-remote",
+			"dce-sm0";
+		iommus = <&smmu_niso0 TEGRA234_SID_DCE>;
+		status = "disabled";
+	};
 
-			display@13800000 {
-				compatible = "nvidia,tegra234-display";
-				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DISP>;
-				nvidia,num-dpaux-instance = <1>;
-				reg-names = "nvdisplay", "dpaux0", "hdacodec", "mipical";
-				reg = <0x0 0x13800000 0x0 0xEFFFF    /* nvdisplay */
-					0x0 0x155C0000 0x0 0xFFFF     /* dpaux0 */
-					0x0 0x0242c000 0x0 0x1000     /* hdacodec */
-					0x0 0x03990000 0x0 0x10000>;  /* mipical */
-				interrupt-names = "nvdisplay", "dpaux0", "hdacodec";
-				interrupts = <0 416 4
-					0 419 4
-					0  61 4>;
-				nvidia,bpmp = <&bpmp>;
-				clocks = <&bpmp TEGRA234_CLK_HUB>,
-				       <&bpmp TEGRA234_CLK_DISP>,
-				       <&bpmp TEGRA234_CLK_NVDISPLAY_P0>,
-				       <&bpmp TEGRA234_CLK_NVDISPLAY_P1>,
-				       <&bpmp TEGRA234_CLK_DPAUX>,
-				       <&bpmp TEGRA234_CLK_FUSE>,
-				       <&bpmp TEGRA234_CLK_DSIPLL_VCO>,
-				       <&bpmp TEGRA234_CLK_DSIPLL_CLKOUTPN>,
-				       <&bpmp TEGRA234_CLK_DSIPLL_CLKOUTA>,
-				       <&bpmp TEGRA234_CLK_SPPLL0_VCO>,
-				       <&bpmp TEGRA234_CLK_SPPLL0_CLKOUTPN>,
-				       <&bpmp TEGRA234_CLK_SPPLL0_CLKOUTA>,
-				       <&bpmp TEGRA234_CLK_SPPLL0_CLKOUTB>,
-				       <&bpmp TEGRA234_CLK_SPPLL0_DIV10>,
-				       <&bpmp TEGRA234_CLK_SPPLL0_DIV25>,
-				       <&bpmp TEGRA234_CLK_SPPLL0_DIV27PN>,
-				       <&bpmp TEGRA234_CLK_SPPLL1_VCO>,
-				       <&bpmp TEGRA234_CLK_SPPLL1_CLKOUTPN>,
-				       <&bpmp TEGRA234_CLK_SPPLL1_DIV27PN>,
-				       <&bpmp TEGRA234_CLK_VPLL0_REF>,
-				       <&bpmp TEGRA234_CLK_VPLL0>,
-				       <&bpmp TEGRA234_CLK_VPLL1>,
-				       <&bpmp TEGRA234_CLK_NVDISPLAY_P0_REF>,
-				       <&bpmp TEGRA234_CLK_RG0>,
-				       <&bpmp TEGRA234_CLK_RG1>,
-				       <&bpmp TEGRA234_CLK_DISPPLL>,
-				       <&bpmp TEGRA234_CLK_DISPHUBPLL>,
-				       <&bpmp TEGRA234_CLK_DSI_LP>,
-				       <&bpmp TEGRA234_CLK_DSI_CORE>,
-				       <&bpmp TEGRA234_CLK_DSI_PIXEL>,
-				       <&bpmp TEGRA234_CLK_PRE_SOR0>,
-				       <&bpmp TEGRA234_CLK_PRE_SOR1>,
-				       <&bpmp TEGRA234_CLK_DP_LINK_REF>,
-				       <&bpmp TEGRA234_CLK_SOR_LINKA_INPUT>,
-				       <&bpmp TEGRA234_CLK_SOR_LINKA_AFIFO>,
-				       <&bpmp TEGRA234_CLK_SOR_LINKA_AFIFO_M>,
-				       <&bpmp TEGRA234_CLK_RG0_M>,
-				       <&bpmp TEGRA234_CLK_RG1_M>,
-				       <&bpmp TEGRA234_CLK_SOR0_M>,
-				       <&bpmp TEGRA234_CLK_SOR1_M>,
-				       <&bpmp TEGRA234_CLK_PLLHUB>,
-				       <&bpmp TEGRA234_CLK_SOR0>,
-				       <&bpmp TEGRA234_CLK_SOR1>,
-				       <&bpmp TEGRA234_CLK_SOR_PAD_INPUT>,
-				       <&bpmp TEGRA234_CLK_PRE_SF0>,
-				       <&bpmp TEGRA234_CLK_SF0>,
-				       <&bpmp TEGRA234_CLK_SF1>,
-				       <&bpmp TEGRA234_CLK_DSI_PAD_INPUT>,
-				       <&bpmp TEGRA234_CLK_PRE_SOR0_REF>,
-				       <&bpmp TEGRA234_CLK_PRE_SOR1_REF>,
-				       <&bpmp TEGRA234_CLK_SOR0_PLL_REF>,
-				       <&bpmp TEGRA234_CLK_SOR1_PLL_REF>,
-				       <&bpmp TEGRA234_CLK_SOR0_REF>,
-				       <&bpmp TEGRA234_CLK_SOR1_REF>,
-				       <&bpmp TEGRA234_CLK_OSC>,
-				       <&bpmp TEGRA234_CLK_DSC>,
-				       <&bpmp TEGRA234_CLK_MAUD>,
-				       <&bpmp TEGRA234_CLK_AZA_2XBIT>,
-				       <&bpmp TEGRA234_CLK_AZA_BIT>,
-				       <&bpmp TEGRA234_CLK_MIPI_CAL>,
-				       <&bpmp TEGRA234_CLK_UART_FST_MIPI_CAL>,
-				       <&bpmp TEGRA234_CLK_SOR0_DIV>;
-				clock-names = "nvdisplayhub_clk",
-					"nvdisplay_disp_clk",
-					"nvdisplay_p0_clk",
-					"nvdisplay_p1_clk",
-					"dpaux0_clk",
-					"fuse_clk",
-					"dsipll_vco_clk",
-					"dsipll_clkoutpn_clk",
-					"dsipll_clkouta_clk",
-					"sppll0_vco_clk",
-					"sppll0_clkoutpn_clk",
-					"sppll0_clkouta_clk",
-					"sppll0_clkoutb_clk",
-					"sppll0_div10_clk",
-					"sppll0_div25_clk",
-					"sppll0_div27_clk",
-					"sppll1_vco_clk",
-					"sppll1_clkoutpn_clk",
-					"sppll1_div27_clk",
-					"vpll0_ref_clk",
-					"vpll0_clk",
-					"vpll1_clk",
-					"nvdisplay_p0_ref_clk",
-					"rg0_clk",
-					"rg1_clk",
-					"disppll_clk",
-					"disphubpll_clk",
-					"dsi_lp_clk",
-					"dsi_core_clk",
-					"dsi_pixel_clk",
-					"pre_sor0_clk",
-					"pre_sor1_clk",
-					"dp_link_ref_clk",
-					"sor_linka_input_clk",
-					"sor_linka_afifo_clk",
-					"sor_linka_afifo_m_clk",
-					"rg0_m_clk",
-					"rg1_m_clk",
-					"sor0_m_clk",
-					"sor1_m_clk",
-					"pllhub_clk",
-					"sor0_clk",
-					"sor1_clk",
-					"sor_pad_input_clk",
-					"pre_sf0_clk",
-					"sf0_clk",
-					"sf1_clk",
-					"dsi_pad_input_clk",
-					"pre_sor0_ref_clk",
-					"pre_sor1_ref_clk",
-					"sor0_ref_pll_clk",
-					"sor1_ref_pll_clk",
-					"sor0_ref_clk",
-					"sor1_ref_clk",
-					"osc_clk",
-					"dsc_clk",
-					"maud_clk",
-					"aza_2xbit_clk",
-					"aza_bit_clk",
-					"mipi_cal_clk",
-					"uart_fst_mipi_cal_clk",
-					"sor0_div_clk";
-				resets = <&bpmp TEGRA234_RESET_NVDISPLAY>,
-				       <&bpmp TEGRA234_RESET_DPAUX>,
-				       <&bpmp TEGRA234_RESET_DSI_CORE>,
-				       <&bpmp TEGRA234_RESET_MIPI_CAL>;
-				reset-names = "nvdisplay_reset",
-					"dpaux0_reset",
-					"dsi_core_reset",
-					"mipi_cal_reset";
-				status = "disabled";
-				nvidia,disp-sw-soc-chip-id = <0x2350>;
-				interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDISPLAYR &emc>,
-					      <&mc TEGRA234_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
-				interconnect-names = "dma-mem", "read-1";
-				iommus = <&smmu_iso TEGRA234_SID_ISO_NVDISPLAY>;
-				non-coherent;
-				nvdisplay-niso {
-					compatible = "nvidia,tegra234-display-niso";
-					iommus = <&smmu_niso0 TEGRA234_SID_NVDISPLAY>;
-					dma-coherent;
-				};
-			};
+	display@13800000 {
+		compatible = "nvidia,tegra234-display";
+		power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DISP>;
+		nvidia,num-dpaux-instance = <1>;
+		reg-names = "nvdisplay", "dpaux0", "hdacodec", "mipical";
+		reg = <0x0 0x13800000 0x0 0xEFFFF    /* nvdisplay */
+			0x0 0x155C0000 0x0 0xFFFF     /* dpaux0 */
+			0x0 0x0242c000 0x0 0x1000     /* hdacodec */
+			0x0 0x03990000 0x0 0x10000>;  /* mipical */
+		interrupt-names = "nvdisplay", "dpaux0", "hdacodec";
+		interrupts = <0 416 4
+			0 419 4
+			0  61 4>;
+		nvidia,bpmp = <&bpmp>;
+		clocks = <&bpmp TEGRA234_CLK_HUB>,
+		       <&bpmp TEGRA234_CLK_DISP>,
+		       <&bpmp TEGRA234_CLK_NVDISPLAY_P0>,
+		       <&bpmp TEGRA234_CLK_NVDISPLAY_P1>,
+		       <&bpmp TEGRA234_CLK_DPAUX>,
+		       <&bpmp TEGRA234_CLK_FUSE>,
+		       <&bpmp TEGRA234_CLK_DSIPLL_VCO>,
+		       <&bpmp TEGRA234_CLK_DSIPLL_CLKOUTPN>,
+		       <&bpmp TEGRA234_CLK_DSIPLL_CLKOUTA>,
+		       <&bpmp TEGRA234_CLK_SPPLL0_VCO>,
+		       <&bpmp TEGRA234_CLK_SPPLL0_CLKOUTPN>,
+		       <&bpmp TEGRA234_CLK_SPPLL0_CLKOUTA>,
+		       <&bpmp TEGRA234_CLK_SPPLL0_CLKOUTB>,
+		       <&bpmp TEGRA234_CLK_SPPLL0_DIV10>,
+		       <&bpmp TEGRA234_CLK_SPPLL0_DIV25>,
+		       <&bpmp TEGRA234_CLK_SPPLL0_DIV27PN>,
+		       <&bpmp TEGRA234_CLK_SPPLL1_VCO>,
+		       <&bpmp TEGRA234_CLK_SPPLL1_CLKOUTPN>,
+		       <&bpmp TEGRA234_CLK_SPPLL1_DIV27PN>,
+		       <&bpmp TEGRA234_CLK_VPLL0_REF>,
+		       <&bpmp TEGRA234_CLK_VPLL0>,
+		       <&bpmp TEGRA234_CLK_VPLL1>,
+		       <&bpmp TEGRA234_CLK_NVDISPLAY_P0_REF>,
+		       <&bpmp TEGRA234_CLK_RG0>,
+		       <&bpmp TEGRA234_CLK_RG1>,
+		       <&bpmp TEGRA234_CLK_DISPPLL>,
+		       <&bpmp TEGRA234_CLK_DISPHUBPLL>,
+		       <&bpmp TEGRA234_CLK_DSI_LP>,
+		       <&bpmp TEGRA234_CLK_DSI_CORE>,
+		       <&bpmp TEGRA234_CLK_DSI_PIXEL>,
+		       <&bpmp TEGRA234_CLK_PRE_SOR0>,
+		       <&bpmp TEGRA234_CLK_PRE_SOR1>,
+		       <&bpmp TEGRA234_CLK_DP_LINK_REF>,
+		       <&bpmp TEGRA234_CLK_SOR_LINKA_INPUT>,
+		       <&bpmp TEGRA234_CLK_SOR_LINKA_AFIFO>,
+		       <&bpmp TEGRA234_CLK_SOR_LINKA_AFIFO_M>,
+		       <&bpmp TEGRA234_CLK_RG0_M>,
+		       <&bpmp TEGRA234_CLK_RG1_M>,
+		       <&bpmp TEGRA234_CLK_SOR0_M>,
+		       <&bpmp TEGRA234_CLK_SOR1_M>,
+		       <&bpmp TEGRA234_CLK_PLLHUB>,
+		       <&bpmp TEGRA234_CLK_SOR0>,
+		       <&bpmp TEGRA234_CLK_SOR1>,
+		       <&bpmp TEGRA234_CLK_SOR_PAD_INPUT>,
+		       <&bpmp TEGRA234_CLK_PRE_SF0>,
+		       <&bpmp TEGRA234_CLK_SF0>,
+		       <&bpmp TEGRA234_CLK_SF1>,
+		       <&bpmp TEGRA234_CLK_DSI_PAD_INPUT>,
+		       <&bpmp TEGRA234_CLK_PRE_SOR0_REF>,
+		       <&bpmp TEGRA234_CLK_PRE_SOR1_REF>,
+		       <&bpmp TEGRA234_CLK_SOR0_PLL_REF>,
+		       <&bpmp TEGRA234_CLK_SOR1_PLL_REF>,
+		       <&bpmp TEGRA234_CLK_SOR0_REF>,
+		       <&bpmp TEGRA234_CLK_SOR1_REF>,
+		       <&bpmp TEGRA234_CLK_OSC>,
+		       <&bpmp TEGRA234_CLK_DSC>,
+		       <&bpmp TEGRA234_CLK_MAUD>,
+		       <&bpmp TEGRA234_CLK_AZA_2XBIT>,
+		       <&bpmp TEGRA234_CLK_AZA_BIT>,
+		       <&bpmp TEGRA234_CLK_MIPI_CAL>,
+		       <&bpmp TEGRA234_CLK_UART_FST_MIPI_CAL>,
+		       <&bpmp TEGRA234_CLK_SOR0_DIV>;
+		clock-names = "nvdisplayhub_clk",
+			"nvdisplay_disp_clk",
+			"nvdisplay_p0_clk",
+			"nvdisplay_p1_clk",
+			"dpaux0_clk",
+			"fuse_clk",
+			"dsipll_vco_clk",
+			"dsipll_clkoutpn_clk",
+			"dsipll_clkouta_clk",
+			"sppll0_vco_clk",
+			"sppll0_clkoutpn_clk",
+			"sppll0_clkouta_clk",
+			"sppll0_clkoutb_clk",
+			"sppll0_div10_clk",
+			"sppll0_div25_clk",
+			"sppll0_div27_clk",
+			"sppll1_vco_clk",
+			"sppll1_clkoutpn_clk",
+			"sppll1_div27_clk",
+			"vpll0_ref_clk",
+			"vpll0_clk",
+			"vpll1_clk",
+			"nvdisplay_p0_ref_clk",
+			"rg0_clk",
+			"rg1_clk",
+			"disppll_clk",
+			"disphubpll_clk",
+			"dsi_lp_clk",
+			"dsi_core_clk",
+			"dsi_pixel_clk",
+			"pre_sor0_clk",
+			"pre_sor1_clk",
+			"dp_link_ref_clk",
+			"sor_linka_input_clk",
+			"sor_linka_afifo_clk",
+			"sor_linka_afifo_m_clk",
+			"rg0_m_clk",
+			"rg1_m_clk",
+			"sor0_m_clk",
+			"sor1_m_clk",
+			"pllhub_clk",
+			"sor0_clk",
+			"sor1_clk",
+			"sor_pad_input_clk",
+			"pre_sf0_clk",
+			"sf0_clk",
+			"sf1_clk",
+			"dsi_pad_input_clk",
+			"pre_sor0_ref_clk",
+			"pre_sor1_ref_clk",
+			"sor0_ref_pll_clk",
+			"sor1_ref_pll_clk",
+			"sor0_ref_clk",
+			"sor1_ref_clk",
+			"osc_clk",
+			"dsc_clk",
+			"maud_clk",
+			"aza_2xbit_clk",
+			"aza_bit_clk",
+			"mipi_cal_clk",
+			"uart_fst_mipi_cal_clk",
+			"sor0_div_clk";
+		resets = <&bpmp TEGRA234_RESET_NVDISPLAY>,
+		       <&bpmp TEGRA234_RESET_DPAUX>,
+		       <&bpmp TEGRA234_RESET_DSI_CORE>,
+		       <&bpmp TEGRA234_RESET_MIPI_CAL>;
+		reset-names = "nvdisplay_reset",
+			"dpaux0_reset",
+			"dsi_core_reset",
+			"mipi_cal_reset";
+		status = "disabled";
+		nvidia,disp-sw-soc-chip-id = <0x2350>;
+		interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDISPLAYR &emc>,
+			      <&mc TEGRA234_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
+		interconnect-names = "dma-mem", "read-1";
+		iommus = <&smmu_iso TEGRA234_SID_ISO_NVDISPLAY>;
+		non-coherent;
+		nvdisplay-niso {
+			compatible = "nvidia,tegra234-display-niso";
+			iommus = <&smmu_niso0 TEGRA234_SID_NVDISPLAY>;
+			dma-coherent;
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-overlay.dtsi b/nv-soc/tegra234-soc-overlay.dtsi
index 172639f..daaf941 100644
--- a/nv-soc/tegra234-soc-overlay.dtsi
+++ b/nv-soc/tegra234-soc-overlay.dtsi
@@ -16,989 +16,989 @@
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 
 / {
-			aliases {
-				nvdla0 = "/bus@0/host1x@13e00000/nvdla0@15880000";
-				nvdla1 = "/bus@0/host1x@13e00000/nvdla1@158c0000";
+	aliases {
+		nvdla0 = "/bus@0/host1x@13e00000/nvdla0@15880000";
+		nvdla1 = "/bus@0/host1x@13e00000/nvdla1@158c0000";
+	};
+
+	bus@0 {
+		actmon@d230000 {
+			compatible = "nvidia,tegra234-cactmon-mc-all";
+			reg = <0x0 0xd230000 0x0 0x1000>;
+			clocks = <&bpmp TEGRA234_CLK_ACTMON>;
+			clock-names = "actmon";
+			status = "disabled";
+		};
+
+		watchdog@2190000 {
+			compatible = "nvidia,tegra-wdt-t234";
+			reg = <0x0 0x02190000 0x0 0x10000>, /* WDT0 */
+			      <0x0 0x02090000 0x0 0x10000>, /* TMR0 */
+			      <0x0 0x02080000 0x0 0x10000>; /* TKE */
+			interrupts = <0 7 0x4 0 8 0x4>; /* TKE shared int */
+			nvidia,watchdog-index = <0>;
+			nvidia,timer-index = <7>;
+			nvidia,enable-on-init;
+			nvidia,extend-watchdog-suspend;
+			timeout-sec = <120>;
+			nvidia,disable-debug-reset;
+			status = "disabled";
+		};
+
+		i2c@3160000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+		};
+
+		i2c@3180000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+		};
+
+		i2c@3190000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+		};
+
+		i2c@31b0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+		};
+
+		i2c@31c0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+		};
+
+		i2c@31e0000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+		};
+
+		i2c@c240000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+		};
+
+		i2c@c250000 {
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+		};
+
+		pinmux@2430000 {
+			eqos_mii_rx_input_state_disable: eqos_rx_disable {
+				eqos {
+					nvidia,pins = "eqos_rd0_pe6","eqos_rd1_pe7",
+							"eqos_rd2_pf0","eqos_rd3_pf1",
+							"eqos_rx_ctl_pf2";
+					nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+				};
 			};
-
-			bus@0 {
-				actmon@d230000 {
-					compatible = "nvidia,tegra234-cactmon-mc-all";
-					reg = <0x0 0xd230000 0x0 0x1000>;
-					clocks = <&bpmp TEGRA234_CLK_ACTMON>;
-					clock-names = "actmon";
-					status = "disabled";
+			eqos_mii_rx_input_state_enable: eqos_rx_enable {
+				eqos {
+					nvidia,pins = "eqos_rd0_pe6","eqos_rd1_pe7",
+							"eqos_rd2_pf0","eqos_rd3_pf1",
+							"eqos_rx_ctl_pf2";
+					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 				};
+			};
+		};
 
-				watchdog@2190000 {
-					compatible = "nvidia,tegra-wdt-t234";
-					reg = <0x0 0x02190000 0x0 0x10000>, /* WDT0 */
-					      <0x0 0x02090000 0x0 0x10000>, /* TMR0 */
-					      <0x0 0x02080000 0x0 0x10000>; /* TKE */
-					interrupts = <0 7 0x4 0 8 0x4>; /* TKE shared int */
-					nvidia,watchdog-index = <0>;
-					nvidia,timer-index = <7>;
-					nvidia,enable-on-init;
-					nvidia,extend-watchdog-suspend;
-					timeout-sec = <120>;
-					nvidia,disable-debug-reset;
-					status = "disabled";
-				};
+		tegra_ufs: ufshci@2500000 {
+			compatible = "tegra234,ufs_variant";
+			reg = <0x0 0x02500000 0x0 0x4000>,
+			      <0x0 0x02510000 0x0 0x1000>,
+			      <0x0 0x02518000 0x0 0x1000>,
+			      <0x0 0x02520000 0x0 0x1000>,
+			      <0x0 0x02470000 0x0 0x4000>,
+			      <0x0 0x02480000 0x0 0x4000>;
+			interrupts = < 0 44 0x04 >;
+			interconnects = <&mc TEGRA234_MEMORY_CLIENT_UFSHCR>,
+					<&mc TEGRA234_MEMORY_CLIENT_UFSHCW>;
+			interconnect-names = "dma-mem", "dma-mem";
+			iommus = <&smmu_niso0 TEGRA234_SID_UFSHC>;
+			dma-coherent;
+			clocks = <&bpmp TEGRA234_CLK_PLLREFE_VCOOUT>,
+				 <&bpmp TEGRA234_CLK_MPHY_CORE_PLL_FIXED>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_TX_SYMB>,
+				 <&bpmp TEGRA234_CLK_MPHY_TX_1MHZ_REF>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_RX_ANA>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_RX_SYMB>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_TX_LS_3XBIT>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_RX_LS_BIT>,
+				 <&bpmp TEGRA234_CLK_MPHY_L1_RX_ANA>,
+				 <&bpmp TEGRA234_CLK_UFSHC>,
+				 <&bpmp TEGRA234_CLK_UFSDEV_REF>,
+				 <&bpmp TEGRA234_CLK_PLLP_OUT0>,
+				 <&bpmp TEGRA234_CLK_CLK_M>,
+				 <&bpmp TEGRA234_CLK_MPHY_FORCE_LS_MODE>,
+				 <&bpmp TEGRA234_CLK_UPHY_PLL3>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_TX_LS_3XBIT_DIV>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_TX_LS_SYMB_DIV>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_RX_LS_BIT_DIV>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_RX_LS_SYMB_DIV>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_TX_2X_SYMB>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_TX_HS_SYMB_DIV>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_RX_HS_SYMB_DIV>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_TX_MUX_SYMB_DIV>,
+				 <&bpmp TEGRA234_CLK_MPHY_L0_RX_MUX_SYMB_DIV>,
+				 <&bpmp TEGRA234_CLK_OSC>;
+			clock-names = "pllrefe_vcoout", "mphy_core_pll_fixed",
+				      "mphy_l0_tx_symb", "mphy_tx_1mhz_ref",
+				      "mphy_l0_rx_ana", "mphy_l0_rx_symb",
+				      "mphy_l0_tx_ls_3xbit", "mphy_l0_rx_ls_bit",
+				      "mphy_l1_rx_ana", "ufshc", "ufsdev_ref",
+				      "pll_p", "clk_m", "mphy_force_ls_mode",
+				      "uphy_pll3", "mphy_l0_tx_ls_3xbit_div",
+				      "mphy_l0_tx_ls_symb_div",
+				      "mphy_l0_rx_ls_bit_div",
+				      "mphy_l0_rx_ls_symb_div",
+				      "mphy_l0_tx_2x_symb",
+				      "mphy_l0_tx_hs_symb_div",
+				      "mphy_l0_rx_hs_symb_div",
+				      "mphy_l0_tx_mux_symb_div",
+				      "mphy_l0_rx_mux_symb_div", "osc";
+			resets = <&bpmp TEGRA234_RESET_MPHY_L0_RX>,
+				 <&bpmp TEGRA234_RESET_MPHY_L0_TX>,
+				 <&bpmp TEGRA234_RESET_MPHY_L1_RX>,
+				 <&bpmp TEGRA234_RESET_MPHY_L1_TX>,
+				 <&bpmp TEGRA234_RESET_MPHY_CLK_CTL>,
+				 <&bpmp TEGRA234_RESET_UFSHC>,
+				 <&bpmp TEGRA234_RESET_UFSHC_AXI_M>,
+				 <&bpmp TEGRA234_RESET_UFSHC_LP_SEQ>;
+			reset-names = "mphy-l0-rx-rst", "mphy-l0-tx-rst",
+				      "mphy-l1-rx-rst", "mphy-l1-tx-rst",
+				      "mphy-clk-ctl-rst", "ufs-rst",
+				      "ufs-axi-m-rst", "ufshc-lp-rst";
+			nvidia,enable-x2-config;
+			nvidia,mask-fast-auto-mode;
+			nvidia,enable-hs-mode;
+			nvidia,max-hs-gear = <4>;
+			nvidia,max-pwm-gear = <0>;
+			vcc-max-microamp = <0>;
+			vccq-max-microamp = <0>;
+			vccq2-max-microamp = <0>;
+			nvidia,configure-uphy-pll3;
+			status = "disabled";
 
-				i2c@3160000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-				};
+			ufs_variant {
+				compatible = "tegra234,ufs_variant";
+			};
+		};
 
-				i2c@3180000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-				};
+		serial@3110000 {
+			compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
+			reg = <0x0 0x03110000 0x0 0x10000>;
+			interrupts = <GIC_SPI TEGRA234_IRQ_UARTB IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA234_CLK_UARTB>;
+			resets = <&bpmp TEGRA234_RESET_UARTB>;
+			status = "disabled";
+		};
 
-				i2c@3190000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-				};
+		serial@3140000 {
+			compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
+			reg = <0x0 0x03140000 0x0 0x10000>;
+			interrupts = <GIC_SPI TEGRA234_IRQ_UARTE IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA234_CLK_UARTE>;
+			clock-names = "serial";
+			resets = <&bpmp TEGRA234_RESET_UARTE>;
+			reset-names = "serial";
+			status = "disabled";
+		};
 
-				i2c@31b0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-				};
+		spi@3210000 {
+			compatible = "nvidia,tegra210-spi";
+			reg = <0x0 0x03210000 0x0 0x1000>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&bpmp TEGRA234_CLK_SPI1>;
+			assigned-clocks = <&bpmp TEGRA234_CLK_SPI1>;
+			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+			clock-names = "spi";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			resets = <&bpmp TEGRA234_RESET_SPI1>;
+			reset-names = "spi";
+			dmas = <&gpcdma 15>, <&gpcdma 15>;
+			dma-names = "rx", "tx";
+			dma-coherent;
+			status = "disabled";
+		};
 
-				i2c@31c0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-				};
+		spi@3230000 {
+			compatible = "nvidia,tegra210-spi";
+			reg = <0x0 0x03230000 0x0 0x1000>;
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&bpmp TEGRA234_CLK_SPI3>;
+			clock-names = "spi";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			assigned-clocks = <&bpmp TEGRA234_CLK_SPI3>;
+			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+			resets = <&bpmp TEGRA234_RESET_SPI3>;
+			reset-names = "spi";
+			dmas = <&gpcdma 17>, <&gpcdma 17>;
+			dma-names = "rx", "tx";
+			dma-coherent;
+			status = "disabled";
+		};
 
-				i2c@31e0000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-				};
+		tachometer@39c0000 {
+			compatible = "nvidia,pwm-tegra234-tachometer";
+			reg = <0x0 0x039c0000 0x0 0x10>;
+			#pwm-cells = <2>;
+			clocks = <&bpmp TEGRA234_CLK_TACH0>;
+			clock-names = "tach";
+			resets = <&bpmp TEGRA234_RESET_TACH0>;
+			reset-names = "tach";
+			pulse-per-rev = <2>;
+			capture-window-length = <2>;
+			disable-clk-gate;
+			status = "disabled";
+		};
 
-				i2c@c240000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-				};
+		nvrng@3ae0000 {
+			compatible = "nvidia,tegra234-se-nvrng";
+			reg-names = "rng1", "sap";
+			reg = <0x0 0x3ae0000 0x0 0x10000>,
+			      <0x0 0x3ac0000 0x0 0x10000>;
+			interrupts = <0x0 284 0x4>;
+			clocks = <&bpmp TEGRA234_CLK_SE>;
+			clock-names = "se";
+			status = "disabled";
+		};
 
-				i2c@c250000 {
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-				};
+		ga10b: gpu@17000000 {
+			compatible = "nvidia,ga10b";
+			reg = <0x0 0x17000000 0x0 0x01000000>,
+			      <0x0 0x18000000 0x0 0x01000000>,
+			      <0x0 0x03b41000 0x0 0x00001000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "stall0", "stall1", "stall2", "nonstall";
+			power-domains = <&bpmp TEGRA234_POWER_DOMAIN_GPU>;
+			interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVL1R &emc>,
+					<&mc TEGRA234_MEMORY_CLIENT_NVL1W &emc>;
+			interconnect-names = "dma-mem", "write";
+			clocks = <&bpmp TEGRA234_CLK_GPUSYS>,
+				 <&bpmp TEGRA234_CLK_GPC0CLK>,
+				 <&bpmp TEGRA234_CLK_GPC1CLK>;
+			clock-names = "sysclk", "gpc0clk", "gpc1clk";
+			resets = <&bpmp TEGRA234_RESET_GPU>;
+			dma-coherent;
+			devfreq-timer = "delayed";
+			nvidia,bpmp = <&bpmp>;
 
-				pinmux@2430000 {
-					eqos_mii_rx_input_state_disable: eqos_rx_disable {
-						eqos {
-							nvidia,pins = "eqos_rd0_pe6","eqos_rd1_pe7",
-									"eqos_rd2_pf0","eqos_rd3_pf1",
-									"eqos_rx_ctl_pf2";
-							nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-						};
-					};
-					eqos_mii_rx_input_state_enable: eqos_rx_enable {
-						eqos {
-							nvidia,pins = "eqos_rd0_pe6","eqos_rd1_pe7",
-									"eqos_rd2_pf0","eqos_rd3_pf1",
-									"eqos_rx_ctl_pf2";
-							nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-						};
-					};
-				};
+			status = "disabled";
+		};
 
-				tegra_ufs: ufshci@2500000 {
-					compatible = "tegra234,ufs_variant";
-					reg = <0x0 0x02500000 0x0 0x4000>,
-					      <0x0 0x02510000 0x0 0x1000>,
-					      <0x0 0x02518000 0x0 0x1000>,
-					      <0x0 0x02520000 0x0 0x1000>,
-					      <0x0 0x02470000 0x0 0x4000>,
-					      <0x0 0x02480000 0x0 0x4000>;
-					interrupts = < 0 44 0x04 >;
-					interconnects = <&mc TEGRA234_MEMORY_CLIENT_UFSHCR>,
-							<&mc TEGRA234_MEMORY_CLIENT_UFSHCW>;
-					interconnect-names = "dma-mem", "dma-mem";
-					iommus = <&smmu_niso0 TEGRA234_SID_UFSHC>;
-					dma-coherent;
-					clocks = <&bpmp TEGRA234_CLK_PLLREFE_VCOOUT>,
-						 <&bpmp TEGRA234_CLK_MPHY_CORE_PLL_FIXED>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_TX_SYMB>,
-						 <&bpmp TEGRA234_CLK_MPHY_TX_1MHZ_REF>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_RX_ANA>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_RX_SYMB>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_TX_LS_3XBIT>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_RX_LS_BIT>,
-						 <&bpmp TEGRA234_CLK_MPHY_L1_RX_ANA>,
-						 <&bpmp TEGRA234_CLK_UFSHC>,
-						 <&bpmp TEGRA234_CLK_UFSDEV_REF>,
-						 <&bpmp TEGRA234_CLK_PLLP_OUT0>,
-						 <&bpmp TEGRA234_CLK_CLK_M>,
-						 <&bpmp TEGRA234_CLK_MPHY_FORCE_LS_MODE>,
-						 <&bpmp TEGRA234_CLK_UPHY_PLL3>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_TX_LS_3XBIT_DIV>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_TX_LS_SYMB_DIV>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_RX_LS_BIT_DIV>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_RX_LS_SYMB_DIV>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_TX_2X_SYMB>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_TX_HS_SYMB_DIV>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_RX_HS_SYMB_DIV>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_TX_MUX_SYMB_DIV>,
-						 <&bpmp TEGRA234_CLK_MPHY_L0_RX_MUX_SYMB_DIV>,
-						 <&bpmp TEGRA234_CLK_OSC>;
-					clock-names = "pllrefe_vcoout", "mphy_core_pll_fixed",
-						      "mphy_l0_tx_symb", "mphy_tx_1mhz_ref",
-						      "mphy_l0_rx_ana", "mphy_l0_rx_symb",
-						      "mphy_l0_tx_ls_3xbit", "mphy_l0_rx_ls_bit",
-						      "mphy_l1_rx_ana", "ufshc", "ufsdev_ref",
-						      "pll_p", "clk_m", "mphy_force_ls_mode",
-						      "uphy_pll3", "mphy_l0_tx_ls_3xbit_div",
-						      "mphy_l0_tx_ls_symb_div",
-						      "mphy_l0_rx_ls_bit_div",
-						      "mphy_l0_rx_ls_symb_div",
-						      "mphy_l0_tx_2x_symb",
-						      "mphy_l0_tx_hs_symb_div",
-						      "mphy_l0_rx_hs_symb_div",
-						      "mphy_l0_tx_mux_symb_div",
-						      "mphy_l0_rx_mux_symb_div", "osc";
-					resets = <&bpmp TEGRA234_RESET_MPHY_L0_RX>,
-						 <&bpmp TEGRA234_RESET_MPHY_L0_TX>,
-						 <&bpmp TEGRA234_RESET_MPHY_L1_RX>,
-						 <&bpmp TEGRA234_RESET_MPHY_L1_TX>,
-						 <&bpmp TEGRA234_RESET_MPHY_CLK_CTL>,
-						 <&bpmp TEGRA234_RESET_UFSHC>,
-						 <&bpmp TEGRA234_RESET_UFSHC_AXI_M>,
-						 <&bpmp TEGRA234_RESET_UFSHC_LP_SEQ>;
-					reset-names = "mphy-l0-rx-rst", "mphy-l0-tx-rst",
-						      "mphy-l1-rx-rst", "mphy-l1-tx-rst",
-						      "mphy-clk-ctl-rst", "ufs-rst",
-						      "ufs-axi-m-rst", "ufshc-lp-rst";
-					nvidia,enable-x2-config;
-					nvidia,mask-fast-auto-mode;
-					nvidia,enable-hs-mode;
-					nvidia,max-hs-gear = <4>;
-					nvidia,max-pwm-gear = <0>;
-					vcc-max-microamp = <0>;
-					vccq-max-microamp = <0>;
-					vccq2-max-microamp = <0>;
-					nvidia,configure-uphy-pll3;
+		aconnect@2900000 {
+			ahub@2900800 {
+				/* Below AHUB modules are not yet upstreamed */
+				tegra_arad: arad@290e400 {
 					status = "disabled";
 
-					ufs_variant {
-						compatible = "tegra234,ufs_variant";
-					};
-				};
-
-				serial@3110000 {
-					compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
-					reg = <0x0 0x03110000 0x0 0x10000>;
-					interrupts = <GIC_SPI TEGRA234_IRQ_UARTB IRQ_TYPE_LEVEL_HIGH>;
-					clocks = <&bpmp TEGRA234_CLK_UARTB>;
-					resets = <&bpmp TEGRA234_RESET_UARTB>;
-					status = "disabled";
-				};
-
-				serial@3140000 {
-					compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
-					reg = <0x0 0x03140000 0x0 0x10000>;
-					interrupts = <GIC_SPI TEGRA234_IRQ_UARTE IRQ_TYPE_LEVEL_HIGH>;
-					clocks = <&bpmp TEGRA234_CLK_UARTE>;
-					clock-names = "serial";
-					resets = <&bpmp TEGRA234_RESET_UARTE>;
-					reset-names = "serial";
-					status = "disabled";
-				};
-
-				spi@3210000 {
-					compatible = "nvidia,tegra210-spi";
-					reg = <0x0 0x03210000 0x0 0x1000>;
-					interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+					compatible = "nvidia,tegra186-arad";
+					reg = <0x0 0x290e400 0x0 0x400>;
 					#address-cells = <1>;
-					#size-cells = <0>;
-					clocks = <&bpmp TEGRA234_CLK_SPI1>;
-					assigned-clocks = <&bpmp TEGRA234_CLK_SPI1>;
-					assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
-					clock-names = "spi";
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					resets = <&bpmp TEGRA234_RESET_SPI1>;
-					reset-names = "spi";
-					dmas = <&gpcdma 15>, <&gpcdma 15>;
-					dma-names = "rx", "tx";
-					dma-coherent;
-					status = "disabled";
+					#size-cells = <1>;
+					#sound-dai-cells = <1>;
 				};
 
-				spi@3230000 {
-					compatible = "nvidia,tegra210-spi";
-					reg = <0x0 0x03230000 0x0 0x1000>;
-					interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+				tegra_afc1: afc@2907000 {
+					status = "disabled";
+
+					compatible = "nvidia,tegra234-afc",
+						     "nvidia,tegra186-afc";
+					reg = <0x0 0x2907000 0x0 0x100>;
 					#address-cells = <1>;
-					#size-cells = <0>;
-					clocks = <&bpmp TEGRA234_CLK_SPI3>;
-					clock-names = "spi";
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					assigned-clocks = <&bpmp TEGRA234_CLK_SPI3>;
-					assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
-					resets = <&bpmp TEGRA234_RESET_SPI3>;
-					reset-names = "spi";
-					dmas = <&gpcdma 17>, <&gpcdma 17>;
-					dma-names = "rx", "tx";
-					dma-coherent;
+					#size-cells = <1>;
+					sound-name-prefix = "AFC1";
+					#sound-dai-cells = <1>;
+				};
+
+				tegra_afc2: afc@2907100 {
 					status = "disabled";
-				};
 
-				tachometer@39c0000 {
-					compatible = "nvidia,pwm-tegra234-tachometer";
-					reg = <0x0 0x039c0000 0x0 0x10>;
-					#pwm-cells = <2>;
-					clocks = <&bpmp TEGRA234_CLK_TACH0>;
-					clock-names = "tach";
-					resets = <&bpmp TEGRA234_RESET_TACH0>;
-					reset-names = "tach";
-					pulse-per-rev = <2>;
-					capture-window-length = <2>;
-					disable-clk-gate;
-					status = "disabled";
-				};
-
-				nvrng@3ae0000 {
-					compatible = "nvidia,tegra234-se-nvrng";
-					reg-names = "rng1", "sap";
-					reg = <0x0 0x3ae0000 0x0 0x10000>,
-					      <0x0 0x3ac0000 0x0 0x10000>;
-					interrupts = <0x0 284 0x4>;
-					clocks = <&bpmp TEGRA234_CLK_SE>;
-					clock-names = "se";
-					status = "disabled";
-				};
-
-				ga10b: gpu@17000000 {
-					compatible = "nvidia,ga10b";
-					reg = <0x0 0x17000000 0x0 0x01000000>,
-					      <0x0 0x18000000 0x0 0x01000000>,
-					      <0x0 0x03b41000 0x0 0x00001000>;
-					interrupt-parent = <&gic>;
-					interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
-						     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
-						     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
-						     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "stall0", "stall1", "stall2", "nonstall";
-					power-domains = <&bpmp TEGRA234_POWER_DOMAIN_GPU>;
-					interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVL1R &emc>,
-						        <&mc TEGRA234_MEMORY_CLIENT_NVL1W &emc>;
-					interconnect-names = "dma-mem", "write";
-					clocks = <&bpmp TEGRA234_CLK_GPUSYS>,
-						 <&bpmp TEGRA234_CLK_GPC0CLK>,
-						 <&bpmp TEGRA234_CLK_GPC1CLK>;
-					clock-names = "sysclk", "gpc0clk", "gpc1clk";
-					resets = <&bpmp TEGRA234_RESET_GPU>;
-					dma-coherent;
-					devfreq-timer = "delayed";
-					nvidia,bpmp = <&bpmp>;
-
-					status = "disabled";
-				};
-
-				aconnect@2900000 {
-					ahub@2900800 {
-						/* Below AHUB modules are not yet upstreamed */
-						tegra_arad: arad@290e400 {
-							status = "disabled";
-
-							compatible = "nvidia,tegra186-arad";
-							reg = <0x0 0x290e400 0x0 0x400>;
-							#address-cells = <1>;
-							#size-cells = <1>;
-							#sound-dai-cells = <1>;
-						};
-
-						tegra_afc1: afc@2907000 {
-							status = "disabled";
-
-							compatible = "nvidia,tegra234-afc",
-								     "nvidia,tegra186-afc";
-							reg = <0x0 0x2907000 0x0 0x100>;
-							#address-cells = <1>;
-							#size-cells = <1>;
-							sound-name-prefix = "AFC1";
-							#sound-dai-cells = <1>;
-						};
-
-						tegra_afc2: afc@2907100 {
-							status = "disabled";
-
-							compatible = "nvidia,tegra234-afc",
-								     "nvidia,tegra186-afc";
-							reg = <0x0 0x2907100 0x0 0x100>;
-							#address-cells = <1>;
-							#size-cells = <1>;
-							sound-name-prefix = "AFC2";
-							#sound-dai-cells = <1>;
-						};
-
-						tegra_afc3: afc@2907200 {
-							status = "disabled";
-
-							compatible = "nvidia,tegra234-afc",
-								     "nvidia,tegra186-afc";
-							reg = <0x0 0x2907200 0x0 0x100>;
-							#address-cells = <1>;
-							#size-cells = <1>;
-							sound-name-prefix = "AFC3";
-							#sound-dai-cells = <1>;
-						};
-
-						tegra_afc4: afc@2907300 {
-							status = "disabled";
-
-							compatible = "nvidia,tegra234-afc",
-								     "nvidia,tegra186-afc";
-							reg = <0x0 0x2907300 0x0 0x100>;
-							#address-cells = <1>;
-							#size-cells = <1>;
-							sound-name-prefix = "AFC4";
-							#sound-dai-cells = <1>;
-						};
-
-						tegra_afc5: afc@2907400 {
-							status = "disabled";
-
-							compatible = "nvidia,tegra234-afc",
-								     "nvidia,tegra186-afc";
-							reg = <0x0 0x2907400 0x0 0x100>;
-							#address-cells = <1>;
-							#size-cells = <1>;
-							sound-name-prefix = "AFC5";
-							#sound-dai-cells = <1>;
-						};
-
-						tegra_afc6: afc@2907500 {
-							status = "disabled";
-
-							compatible = "nvidia,tegra234-afc",
-								     "nvidia,tegra186-afc";
-							reg = <0x0 0x2907500 0x0 0x100>;
-							#address-cells = <1>;
-							#size-cells = <1>;
-							sound-name-prefix = "AFC6";
-							#sound-dai-cells = <1>;
-						};
-					};
-				};
-
-				hwpm@f100000 {
-					compatible = "nvidia,t234-soc-hwpm";
-					dma-coherent;
-					reg = <0x0 0xf100000 0x0 0x1000>,
-					      <0x0 0xf101000 0x0 0x1000>,
-					      <0x0 0xf102000 0x0 0x1000>,
-					      <0x0 0xf103000 0x0 0x1000>,
-					      <0x0 0xf104000 0x0 0x1000>,
-					      <0x0 0xf105000 0x0 0x1000>,
-					      <0x0 0xf106000 0x0 0x1000>,
-					      <0x0 0xf107000 0x0 0x1000>,
-					      <0x0 0xf108000 0x0 0x1000>,
-					      <0x0 0xf109000 0x0 0x1000>,
-					      <0x0 0xf10a000 0x0 0x1000>,
-					      <0x0 0xf10b000 0x0 0x1000>,
-					      <0x0 0xf10c000 0x0 0x1000>,
-					      <0x0 0xf10d000 0x0 0x1000>,
-					      <0x0 0xf10e000 0x0 0x1000>,
-					      <0x0 0xf10f000 0x0 0x1000>,
-					      <0x0 0xf110000 0x0 0x1000>,
-					      <0x0 0xf111000 0x0 0x1000>,
-					      <0x0 0xf112000 0x0 0x1000>,
-					      <0x0 0xf113000 0x0 0x1000>,
-					      <0x0 0xf114000 0x0 0x1000>,
-					      <0x0 0xf115000 0x0 0x1000>,
-					      <0x0 0xf116000 0x0 0x1000>,
-					      <0x0 0xf117000 0x0 0x1000>,
-					      <0x0 0xf118000 0x0 0x1000>,
-					      <0x0 0xf119000 0x0 0x1000>,
-					      <0x0 0xf11a000 0x0 0x1000>,
-					      <0x0 0xf11b000 0x0 0x1000>,
-					      <0x0 0xf11c000 0x0 0x1000>,
-					      <0x0 0xf11d000 0x0 0x1000>,
-					      <0x0 0xf11e000 0x0 0x1000>,
-					      <0x0 0xf11f000 0x0 0x1000>,
-					      <0x0 0xf120000 0x0 0x1000>,
-					      <0x0 0xf121000 0x0 0x1000>,
-					      <0x0 0xf122000 0x0 0x1000>,
-					      <0x0 0xf123000 0x0 0x1000>,
-					      <0x0 0xf124000 0x0 0x1000>,
-					      <0x0 0xf125000 0x0 0x1000>,
-					      <0x0 0xf126000 0x0 0x1000>,
-					      <0x0 0xf127000 0x0 0x1000>,
-					      <0x0 0xf128000 0x0 0x1000>,
-					      <0x0 0xf129000 0x0 0x1000>,
-					      <0x0 0xf12a000 0x0 0x1000>,
-					      <0x0 0xf12b000 0x0 0x1000>,
-					      <0x0 0xf12c000 0x0 0x1000>,
-					      <0x0 0xf12d000 0x0 0x1000>,
-					      <0x0 0xf12e000 0x0 0x1000>,
-					      <0x0 0xf12f000 0x0 0x1000>,
-					      <0x0 0xf130000 0x0 0x1000>,
-					      <0x0 0xf131000 0x0 0x1000>,
-					      <0x0 0xf132000 0x0 0x1000>,
-					      <0x0 0xf133000 0x0 0x1000>,
-					      <0x0 0xf14a000 0x0 0x2000>,
-					      <0x0 0xf14d000 0x0 0x1000>;
-
-					reg-names = "perfmon_vi0",
-						"perfmon_vi1",
-						"perfmon_isp0",
-						"perfmon_vica0",
-						"perfmon_ofaa0",
-						"perfmon_pvav0", "perfmon_pvav1", "perfmon_pvac0",
-						"perfmon_nvdlab0", "perfmon_nvdlab1",
-						"perfmon_nvdisplay0",
-						"perfmon_sys0",
-						"perfmon_mgbe0", "perfmon_mgbe1",
-						"perfmon_mgbe2", "perfmon_mgbe3",
-						"perfmon_scf",
-						"perfmon_nvdeca0",
-						"perfmon_nvenca0",
-						"perfmon_mssnvlhsh0",
-						"perfmon_pcie0", "perfmon_pcie1",
-						"perfmon_pcie2", "perfmon_pcie3", "perfmon_pcie4",
-						"perfmon_pcie5", "perfmon_pcie6", "perfmon_pcie7",
-						"perfmon_pcie8", "perfmon_pcie9", "perfmon_pcie10",
-						"perfmon_msschannel_parta0",
-						"perfmon_msschannel_parta1",
-						"perfmon_msschannel_parta2",
-						"perfmon_msschannel_parta3",
-						"perfmon_msschannel_partb0",
-						"perfmon_msschannel_partb1",
-						"perfmon_msschannel_partb2",
-						"perfmon_msschannel_partb3",
-						"perfmon_msschannel_partc0",
-						"perfmon_msschannel_partc1",
-						"perfmon_msschannel_partc2",
-						"perfmon_msschannel_partc3",
-						"perfmon_msschannel_partd0",
-						"perfmon_msschannel_partd1",
-						"perfmon_msschannel_partd2",
-						"perfmon_msschannel_partd3",
-						"perfmon_msshub0", "perfmon_msshub1",
-						"perfmon_mssmcfclient0", "perfmon_mssmcfmem0",
-						"perfmon_mssmcfmem1",
-						"pma", "rtr";
-
-					clocks = <&bpmp TEGRA234_CLK_LA>,
-							<&bpmp TEGRA234_CLK_PLLREFE_VCOOUT_GATED>;
-					clock-names = "la", "parent";
-					resets = <&bpmp TEGRA234_RESET_LA>,
-						<&bpmp TEGRA234_RESET_HWPM>;
-					reset-names = "la", "hwpm";
-					iommus = <&smmu_niso1 TEGRA234_SID_HWMP_PMA>;
-					status = "disabled";
-				};
-
-				mc-hwpm@2c10000 {
-					compatible = "nvidia,tegra-t23x-mc-hwpm";
-					reg	   = <0x0 0x2c10000 0x0 0x10000>,   /* MCB */
-						     <0x0 0x2c20000 0x0 0x10000>,   /* MC0 */
-						     <0x0 0x2c30000 0x0 0x10000>,   /* MC1 */
-						     <0x0 0x2c40000 0x0 0x10000>,   /* MC2 */
-						     <0x0 0x2c50000 0x0 0x10000>,   /* MC3 */
-						     <0x0 0x2b80000 0x0 0x10000>,   /* MC4 */
-						     <0x0 0x2b90000 0x0 0x10000>,   /* MC5 */
-						     <0x0 0x2ba0000 0x0 0x10000>,   /* MC6 */
-						     <0x0 0x2bb0000 0x0 0x10000>,   /* MC7 */
-						     <0x0 0x1700000 0x0 0x10000>,   /* MC8 */
-						     <0x0 0x1710000 0x0 0x10000>,   /* MC9 */
-						     <0x0 0x1720000 0x0 0x10000>,   /* MC10 */
-						     <0x0 0x1730000 0x0 0x10000>,   /* MC11 */
-						     <0x0 0x1740000 0x0 0x10000>,   /* MC12 */
-						     <0x0 0x1750000 0x0 0x10000>,   /* MC13 */
-						     <0x0 0x1760000 0x0 0x10000>,   /* MC14 */
-						     <0x0 0x1770000 0x0 0x10000>;   /* MC15 */
-					status = "disabled";
-				};
-
-				host1x@13e00000 {
-					assigned-clocks = <&bpmp TEGRA234_CLK_HOST1X>;
-					assigned-clock-rates = <204000000>;
-
-					reg = <0x0 0x13e00000 0x0 0x10000>,
-					      <0x0 0x13e10000 0x0 0x10000>,
-					      <0x0 0x13e40000 0x0 0x10000>,
-					      <0x0 0x13ef0000 0x0 0x60000>;
-					reg-names = "common", "hypervisor", "vm", "actmon";
-					clocks = <&bpmp TEGRA234_CLK_HOST1X>,
-						 <&bpmp TEGRA234_CLK_ACTMON>;
-					clock-names = "host1x", "actmon";
-
-					nvjpg@15380000 {
-						compatible = "nvidia,tegra234-nvjpg";
-						reg = <0x0 0x15380000 0x0 0x00040000>;
-						clocks = <&bpmp TEGRA234_CLK_NVJPG>;
-						clock-names = "nvjpg";
-						resets = <&bpmp TEGRA234_RESET_NVJPG>;
-						reset-names = "nvjpg";
-
-						power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVJPGA>;
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVJPGSRD &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_NVJPGSWR &emc>;
-						interconnect-names = "dma-mem", "write";
-						iommus = <&smmu_niso1 TEGRA234_SID_NVJPG>;
-						dma-coherent;
-
-						nvidia,host1x-class = <0xc0>;
-						status = "disabled";
-					};
-
-					nvenc@154c0000 {
-						compatible = "nvidia,tegra234-nvenc";
-						reg = <0x0 0x154c0000 0x0 0x00040000>;
-						clocks = <&bpmp TEGRA234_CLK_NVENC>;
-						clock-names = "nvenc";
-						resets = <&bpmp TEGRA234_RESET_NVENC>;
-						reset-names = "nvenc";
-
-						power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVENC>;
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVENCSRD &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_NVENCSWR &emc>;
-						interconnect-names = "dma-mem", "write";
-						iommus = <&smmu_niso0 TEGRA234_SID_NVENC>;
-						dma-coherent;
-						status = "disabled";
-					};
-
-					nvjpg@15540000 {
-						compatible = "nvidia,tegra234-nvjpg";
-						reg = <0x0 0x15540000 0x0 0x00040000>;
-						clocks = <&bpmp TEGRA234_CLK_NVJPG1>;
-						clock-names = "nvjpg";
-						resets = <&bpmp TEGRA234_RESET_NVJPG1>;
-						reset-names = "nvjpg";
-
-						power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVJPGB>;
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVJPG1SRD &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_NVJPG1SWR &emc>;
-						interconnect-names = "dma-mem", "write";
-						iommus = <&smmu_niso0 TEGRA234_SID_NVJPG1>;
-						dma-coherent;
-
-						nvidia,host1x-class = <0x07>;
-						status = "disabled";
-					};
-
-					ofa@15a50000 {
-						compatible = "nvidia,tegra234-ofa";
-						reg = <0x0 0x15a50000 0x0 0x00040000>;
-						clocks = <&bpmp TEGRA234_CLK_OFA>;
-						clock-names = "ofa";
-						resets = <&bpmp TEGRA234_RESET_OFA>;
-						reset-names = "ofa";
-
-						power-domains = <&bpmp TEGRA234_POWER_DOMAIN_OFA>;
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_OFAR &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_OFAW &emc>;
-						interconnect-names = "dma-mem", "write";
-						iommus = <&smmu_niso0 TEGRA234_SID_OFA>;
-						dma-coherent;
-						status = "disabled";
-					};
-
-					se@15820000 {
-						compatible = "nvidia,tegra234-se2-aes";
-						reg = <0x0 0x15820000 0x0 0x10000>;
-						clocks = <&bpmp TEGRA234_CLK_SE>;
-						clock-names = "se";
-
-						iommus = <&smmu_niso1 TEGRA234_SID_SES_SE1>;
-						dma-coherent;
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_SESRD &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_SESWR &emc>;
-						interconnect-names = "read", "write";
-
-						status = "disabled";
-					};
-
-					se@15840000 {
-						compatible = "nvidia,tegra234-se4-hash";
-						reg = <0x0 0x15840000 0x0 0x10000>;
-						clocks = <&bpmp TEGRA234_CLK_SE>;
-						clock-names = "se";
-
-						iommus = <&smmu_niso1 TEGRA234_SID_SES_SE2>;
-						dma-coherent;
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_SESRD &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_SESWR &emc>;
-						interconnect-names = "read", "write";
-
-						status = "disabled";
-					};
-
-					tsec@15500000 {
-						compatible = "nvidia,tegra234-tsec";
-						reg = <0x0 0x15500000 0x0 0x00040000>;
-						interrupts = <0 228 0x04>;
-						resets = <&bpmp TEGRA234_RESET_TSEC>;
-						clocks = <&bpmp TEGRA234_CLK_TSEC>,
-							 <&bpmp  TEGRA234_CLK_FUSE>,
-							 <&bpmp  TEGRA234_CLK_TSEC_PKA>;
-						clock-names = "tsec", "efuse", "tsec_pka";
-
-						iommus = <&smmu_niso1 TEGRA234_SID_TSEC>;
-						nvidia,memory-controller = <&mc>;
-						dma-coherent;
-						status = "disabled";
-					};
-
-					nvdla0: nvdla0@15880000 {
-						compatible = "nvidia,tegra234-nvdla";
-						power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DLAA>;
-						reg = <0x0 0x15880000 0x0 0x00040000>;
-						interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
-
-						resets = <&bpmp TEGRA234_RESET_DLA0>;
-						clocks = <&bpmp TEGRA234_CLK_DLA0_CORE>,
-							 <&bpmp TEGRA234_CLK_DLA0_FALCON>;
-						clock-names = "nvdla0", "nvdla0_flcn";
-
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_DLA0RDA &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_DLA0FALRDB &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_DLA0WRA &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_DLA0FALWRB &emc>;
-						interconnect-names = "dma-mem", "read-1", "write", "write-1";
-						iommus = <&smmu_niso1 TEGRA234_SID_NVDLA0>;
-						dma-coherent;
-						status = "disabled";
-					};
-
-					nvdla1: nvdla1@158c0000 {
-						compatible = "nvidia,tegra234-nvdla";
-						power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DLAB>;
-						reg = <0x0 0x158c0000 0x0 0x00040000>;
-						interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
-
-						resets = <&bpmp TEGRA234_RESET_DLA1>;
-						clocks = <&bpmp TEGRA234_CLK_DLA1_CORE>,
-							 <&bpmp TEGRA234_CLK_DLA1_FALCON>;
-						clock-names = "nvdla1", "nvdla1_flcn";
-
-						interconnects = <&mc TEGRA234_MEMORY_CLIENT_DLA1RDA &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_DLA1FALRDB &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_DLA1WRA &emc>,
-								<&mc TEGRA234_MEMORY_CLIENT_DLA1FALWRB &emc>;
-						interconnect-names = "dma-mem", "read-1", "write", "write-1";
-						iommus = <&smmu_niso0 TEGRA234_SID_NVDLA1>;
-						dma-coherent;
-						status = "disabled";
-					};
-
-					pva0: pva0@16000000 {
-						compatible = "nvidia,tegra234-pva";
-						power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PVA>;
-						reg = <0x0 0x16000000 0x0 0x800000>,
-						      <0x0 0x24700000 0x0 0x080000>;
-						interrupts = <0 234 0x04>,
-							<0 432 0x04>,
-							<0 433 0x04>,
-							<0 434 0x04>,
-							<0 435 0x04>,
-							<0 436 0x04>,
-							<0 437 0x04>,
-							<0 438 0x04>,
-							<0 439 0x04>;
-						resets = <&bpmp TEGRA234_RESET_PVA0_ALL>;
-						clocks = <&bpmp TEGRA234_CLK_PVA0_CPU_AXI>,
-							 <&bpmp TEGRA234_CLK_NAFLL_PVA0_VPS>,
-							 <&bpmp TEGRA234_CLK_PVA0_VPS>;
-						clock-names = "axi", "vps0", "vps1";
-
-						iommus = <&smmu_niso1 TEGRA234_SID_PVA0>;
-						dma-coherent;
-						status = "disabled";
-
-						pva0_ctx0n1: pva0_niso1_ctx0 {
-							compatible = "nvidia,pva-tegra186-iommu-context";
-							iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM0>;
-							dma-coherent;
-							status = "disabled";
-						};
-
-						pva0_ctx1n1: pva0_niso1_ctx1 {
-							compatible = "nvidia,pva-tegra186-iommu-context";
-							iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM1>;
-							dma-coherent;
-							status = "disabled";
-						};
-
-						pva0_ctx2n1: pva0_niso1_ctx2 {
-							compatible = "nvidia,pva-tegra186-iommu-context";
-							iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM2>;
-							dma-coherent;
-							status = "disabled";
-						};
-
-						pva0_ctx3n1: pva0_niso1_ctx3 {
-							compatible = "nvidia,pva-tegra186-iommu-context";
-							iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM3>;
-							dma-coherent;
-							status = "disabled";
-						};
-
-						pva0_ctx4n1: pva0_niso1_ctx4 {
-							compatible = "nvidia,pva-tegra186-iommu-context";
-							iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM4>;
-							dma-coherent;
-							status = "disabled";
-						};
-
-						pva0_ctx5n1: pva0_niso1_ctx5 {
-							compatible = "nvidia,pva-tegra186-iommu-context";
-							iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM5>;
-							dma-coherent;
-							status = "disabled";
-						};
-
-						pva0_ctx6n1: pva0_niso1_ctx6 {
-							compatible = "nvidia,pva-tegra186-iommu-context";
-							iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM6>;
-							dma-coherent;
-							status = "disabled";
-						};
-
-						pva0_ctx7n1: pva0_niso1_ctx7 {
-							compatible = "nvidia,pva-tegra186-iommu-context";
-							iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM7>;
-							dma-coherent;
-							status = "disabled";
-						};
-					};
-				};
-
-				spi@c260000 {
-					compatible = "nvidia,tegra210-spi";
-					reg = <0x0 0x0c260000 0x0 0x1000>;
-					interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+					compatible = "nvidia,tegra234-afc",
+						     "nvidia,tegra186-afc";
+					reg = <0x0 0x2907100 0x0 0x100>;
 					#address-cells = <1>;
-					#size-cells = <0>;
-					clocks = <&bpmp TEGRA234_CLK_SPI2>,
-						<&bpmp TEGRA234_CLK_PLLAON>,
-						<&bpmp TEGRA234_CLK_OSC>;
-					clock-names = "spi";
-					iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-					assigned-clocks = <&bpmp TEGRA234_CLK_SPI2>;
-					assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
-					resets = <&bpmp TEGRA234_RESET_SPI2>;
-					reset-names = "spi";
-					dmas = <&gpcdma 16>, <&gpcdma 16>;
-					dma-names = "rx", "tx";
+					#size-cells = <1>;
+					sound-name-prefix = "AFC2";
+					#sound-dai-cells = <1>;
+				};
+
+				tegra_afc3: afc@2907200 {
+					status = "disabled";
+
+					compatible = "nvidia,tegra234-afc",
+						     "nvidia,tegra186-afc";
+					reg = <0x0 0x2907200 0x0 0x100>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					sound-name-prefix = "AFC3";
+					#sound-dai-cells = <1>;
+				};
+
+				tegra_afc4: afc@2907300 {
+					status = "disabled";
+
+					compatible = "nvidia,tegra234-afc",
+						     "nvidia,tegra186-afc";
+					reg = <0x0 0x2907300 0x0 0x100>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					sound-name-prefix = "AFC4";
+					#sound-dai-cells = <1>;
+				};
+
+				tegra_afc5: afc@2907400 {
+					status = "disabled";
+
+					compatible = "nvidia,tegra234-afc",
+						     "nvidia,tegra186-afc";
+					reg = <0x0 0x2907400 0x0 0x100>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					sound-name-prefix = "AFC5";
+					#sound-dai-cells = <1>;
+				};
+
+				tegra_afc6: afc@2907500 {
+					status = "disabled";
+
+					compatible = "nvidia,tegra234-afc",
+						     "nvidia,tegra186-afc";
+					reg = <0x0 0x2907500 0x0 0x100>;
+					#address-cells = <1>;
+					#size-cells = <1>;
+					sound-name-prefix = "AFC6";
+					#sound-dai-cells = <1>;
+				};
+			};
+		};
+
+		hwpm@f100000 {
+			compatible = "nvidia,t234-soc-hwpm";
+			dma-coherent;
+			reg = <0x0 0xf100000 0x0 0x1000>,
+			      <0x0 0xf101000 0x0 0x1000>,
+			      <0x0 0xf102000 0x0 0x1000>,
+			      <0x0 0xf103000 0x0 0x1000>,
+			      <0x0 0xf104000 0x0 0x1000>,
+			      <0x0 0xf105000 0x0 0x1000>,
+			      <0x0 0xf106000 0x0 0x1000>,
+			      <0x0 0xf107000 0x0 0x1000>,
+			      <0x0 0xf108000 0x0 0x1000>,
+			      <0x0 0xf109000 0x0 0x1000>,
+			      <0x0 0xf10a000 0x0 0x1000>,
+			      <0x0 0xf10b000 0x0 0x1000>,
+			      <0x0 0xf10c000 0x0 0x1000>,
+			      <0x0 0xf10d000 0x0 0x1000>,
+			      <0x0 0xf10e000 0x0 0x1000>,
+			      <0x0 0xf10f000 0x0 0x1000>,
+			      <0x0 0xf110000 0x0 0x1000>,
+			      <0x0 0xf111000 0x0 0x1000>,
+			      <0x0 0xf112000 0x0 0x1000>,
+			      <0x0 0xf113000 0x0 0x1000>,
+			      <0x0 0xf114000 0x0 0x1000>,
+			      <0x0 0xf115000 0x0 0x1000>,
+			      <0x0 0xf116000 0x0 0x1000>,
+			      <0x0 0xf117000 0x0 0x1000>,
+			      <0x0 0xf118000 0x0 0x1000>,
+			      <0x0 0xf119000 0x0 0x1000>,
+			      <0x0 0xf11a000 0x0 0x1000>,
+			      <0x0 0xf11b000 0x0 0x1000>,
+			      <0x0 0xf11c000 0x0 0x1000>,
+			      <0x0 0xf11d000 0x0 0x1000>,
+			      <0x0 0xf11e000 0x0 0x1000>,
+			      <0x0 0xf11f000 0x0 0x1000>,
+			      <0x0 0xf120000 0x0 0x1000>,
+			      <0x0 0xf121000 0x0 0x1000>,
+			      <0x0 0xf122000 0x0 0x1000>,
+			      <0x0 0xf123000 0x0 0x1000>,
+			      <0x0 0xf124000 0x0 0x1000>,
+			      <0x0 0xf125000 0x0 0x1000>,
+			      <0x0 0xf126000 0x0 0x1000>,
+			      <0x0 0xf127000 0x0 0x1000>,
+			      <0x0 0xf128000 0x0 0x1000>,
+			      <0x0 0xf129000 0x0 0x1000>,
+			      <0x0 0xf12a000 0x0 0x1000>,
+			      <0x0 0xf12b000 0x0 0x1000>,
+			      <0x0 0xf12c000 0x0 0x1000>,
+			      <0x0 0xf12d000 0x0 0x1000>,
+			      <0x0 0xf12e000 0x0 0x1000>,
+			      <0x0 0xf12f000 0x0 0x1000>,
+			      <0x0 0xf130000 0x0 0x1000>,
+			      <0x0 0xf131000 0x0 0x1000>,
+			      <0x0 0xf132000 0x0 0x1000>,
+			      <0x0 0xf133000 0x0 0x1000>,
+			      <0x0 0xf14a000 0x0 0x2000>,
+			      <0x0 0xf14d000 0x0 0x1000>;
+
+			reg-names = "perfmon_vi0",
+				"perfmon_vi1",
+				"perfmon_isp0",
+				"perfmon_vica0",
+				"perfmon_ofaa0",
+				"perfmon_pvav0", "perfmon_pvav1", "perfmon_pvac0",
+				"perfmon_nvdlab0", "perfmon_nvdlab1",
+				"perfmon_nvdisplay0",
+				"perfmon_sys0",
+				"perfmon_mgbe0", "perfmon_mgbe1",
+				"perfmon_mgbe2", "perfmon_mgbe3",
+				"perfmon_scf",
+				"perfmon_nvdeca0",
+				"perfmon_nvenca0",
+				"perfmon_mssnvlhsh0",
+				"perfmon_pcie0", "perfmon_pcie1",
+				"perfmon_pcie2", "perfmon_pcie3", "perfmon_pcie4",
+				"perfmon_pcie5", "perfmon_pcie6", "perfmon_pcie7",
+				"perfmon_pcie8", "perfmon_pcie9", "perfmon_pcie10",
+				"perfmon_msschannel_parta0",
+				"perfmon_msschannel_parta1",
+				"perfmon_msschannel_parta2",
+				"perfmon_msschannel_parta3",
+				"perfmon_msschannel_partb0",
+				"perfmon_msschannel_partb1",
+				"perfmon_msschannel_partb2",
+				"perfmon_msschannel_partb3",
+				"perfmon_msschannel_partc0",
+				"perfmon_msschannel_partc1",
+				"perfmon_msschannel_partc2",
+				"perfmon_msschannel_partc3",
+				"perfmon_msschannel_partd0",
+				"perfmon_msschannel_partd1",
+				"perfmon_msschannel_partd2",
+				"perfmon_msschannel_partd3",
+				"perfmon_msshub0", "perfmon_msshub1",
+				"perfmon_mssmcfclient0", "perfmon_mssmcfmem0",
+				"perfmon_mssmcfmem1",
+				"pma", "rtr";
+
+			clocks = <&bpmp TEGRA234_CLK_LA>,
+					<&bpmp TEGRA234_CLK_PLLREFE_VCOOUT_GATED>;
+			clock-names = "la", "parent";
+			resets = <&bpmp TEGRA234_RESET_LA>,
+				<&bpmp TEGRA234_RESET_HWPM>;
+			reset-names = "la", "hwpm";
+			iommus = <&smmu_niso1 TEGRA234_SID_HWMP_PMA>;
+			status = "disabled";
+		};
+
+		mc-hwpm@2c10000 {
+			compatible = "nvidia,tegra-t23x-mc-hwpm";
+			reg	   = <0x0 0x2c10000 0x0 0x10000>,   /* MCB */
+				     <0x0 0x2c20000 0x0 0x10000>,   /* MC0 */
+				     <0x0 0x2c30000 0x0 0x10000>,   /* MC1 */
+				     <0x0 0x2c40000 0x0 0x10000>,   /* MC2 */
+				     <0x0 0x2c50000 0x0 0x10000>,   /* MC3 */
+				     <0x0 0x2b80000 0x0 0x10000>,   /* MC4 */
+				     <0x0 0x2b90000 0x0 0x10000>,   /* MC5 */
+				     <0x0 0x2ba0000 0x0 0x10000>,   /* MC6 */
+				     <0x0 0x2bb0000 0x0 0x10000>,   /* MC7 */
+				     <0x0 0x1700000 0x0 0x10000>,   /* MC8 */
+				     <0x0 0x1710000 0x0 0x10000>,   /* MC9 */
+				     <0x0 0x1720000 0x0 0x10000>,   /* MC10 */
+				     <0x0 0x1730000 0x0 0x10000>,   /* MC11 */
+				     <0x0 0x1740000 0x0 0x10000>,   /* MC12 */
+				     <0x0 0x1750000 0x0 0x10000>,   /* MC13 */
+				     <0x0 0x1760000 0x0 0x10000>,   /* MC14 */
+				     <0x0 0x1770000 0x0 0x10000>;   /* MC15 */
+			status = "disabled";
+		};
+
+		host1x@13e00000 {
+			assigned-clocks = <&bpmp TEGRA234_CLK_HOST1X>;
+			assigned-clock-rates = <204000000>;
+
+			reg = <0x0 0x13e00000 0x0 0x10000>,
+			      <0x0 0x13e10000 0x0 0x10000>,
+			      <0x0 0x13e40000 0x0 0x10000>,
+			      <0x0 0x13ef0000 0x0 0x60000>;
+			reg-names = "common", "hypervisor", "vm", "actmon";
+			clocks = <&bpmp TEGRA234_CLK_HOST1X>,
+				 <&bpmp TEGRA234_CLK_ACTMON>;
+			clock-names = "host1x", "actmon";
+
+			nvjpg@15380000 {
+				compatible = "nvidia,tegra234-nvjpg";
+				reg = <0x0 0x15380000 0x0 0x00040000>;
+				clocks = <&bpmp TEGRA234_CLK_NVJPG>;
+				clock-names = "nvjpg";
+				resets = <&bpmp TEGRA234_RESET_NVJPG>;
+				reset-names = "nvjpg";
+
+				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVJPGA>;
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVJPGSRD &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_NVJPGSWR &emc>;
+				interconnect-names = "dma-mem", "write";
+				iommus = <&smmu_niso1 TEGRA234_SID_NVJPG>;
+				dma-coherent;
+
+				nvidia,host1x-class = <0xc0>;
+				status = "disabled";
+			};
+
+			nvenc@154c0000 {
+				compatible = "nvidia,tegra234-nvenc";
+				reg = <0x0 0x154c0000 0x0 0x00040000>;
+				clocks = <&bpmp TEGRA234_CLK_NVENC>;
+				clock-names = "nvenc";
+				resets = <&bpmp TEGRA234_RESET_NVENC>;
+				reset-names = "nvenc";
+
+				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVENC>;
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVENCSRD &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_NVENCSWR &emc>;
+				interconnect-names = "dma-mem", "write";
+				iommus = <&smmu_niso0 TEGRA234_SID_NVENC>;
+				dma-coherent;
+				status = "disabled";
+			};
+
+			nvjpg@15540000 {
+				compatible = "nvidia,tegra234-nvjpg";
+				reg = <0x0 0x15540000 0x0 0x00040000>;
+				clocks = <&bpmp TEGRA234_CLK_NVJPG1>;
+				clock-names = "nvjpg";
+				resets = <&bpmp TEGRA234_RESET_NVJPG1>;
+				reset-names = "nvjpg";
+
+				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVJPGB>;
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVJPG1SRD &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_NVJPG1SWR &emc>;
+				interconnect-names = "dma-mem", "write";
+				iommus = <&smmu_niso0 TEGRA234_SID_NVJPG1>;
+				dma-coherent;
+
+				nvidia,host1x-class = <0x07>;
+				status = "disabled";
+			};
+
+			ofa@15a50000 {
+				compatible = "nvidia,tegra234-ofa";
+				reg = <0x0 0x15a50000 0x0 0x00040000>;
+				clocks = <&bpmp TEGRA234_CLK_OFA>;
+				clock-names = "ofa";
+				resets = <&bpmp TEGRA234_RESET_OFA>;
+				reset-names = "ofa";
+
+				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_OFA>;
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_OFAR &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_OFAW &emc>;
+				interconnect-names = "dma-mem", "write";
+				iommus = <&smmu_niso0 TEGRA234_SID_OFA>;
+				dma-coherent;
+				status = "disabled";
+			};
+
+			se@15820000 {
+				compatible = "nvidia,tegra234-se2-aes";
+				reg = <0x0 0x15820000 0x0 0x10000>;
+				clocks = <&bpmp TEGRA234_CLK_SE>;
+				clock-names = "se";
+
+				iommus = <&smmu_niso1 TEGRA234_SID_SES_SE1>;
+				dma-coherent;
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_SESRD &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_SESWR &emc>;
+				interconnect-names = "read", "write";
+
+				status = "disabled";
+			};
+
+			se@15840000 {
+				compatible = "nvidia,tegra234-se4-hash";
+				reg = <0x0 0x15840000 0x0 0x10000>;
+				clocks = <&bpmp TEGRA234_CLK_SE>;
+				clock-names = "se";
+
+				iommus = <&smmu_niso1 TEGRA234_SID_SES_SE2>;
+				dma-coherent;
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_SESRD &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_SESWR &emc>;
+				interconnect-names = "read", "write";
+
+				status = "disabled";
+			};
+
+			tsec@15500000 {
+				compatible = "nvidia,tegra234-tsec";
+				reg = <0x0 0x15500000 0x0 0x00040000>;
+				interrupts = <0 228 0x04>;
+				resets = <&bpmp TEGRA234_RESET_TSEC>;
+				clocks = <&bpmp TEGRA234_CLK_TSEC>,
+					 <&bpmp  TEGRA234_CLK_FUSE>,
+					 <&bpmp  TEGRA234_CLK_TSEC_PKA>;
+				clock-names = "tsec", "efuse", "tsec_pka";
+
+				iommus = <&smmu_niso1 TEGRA234_SID_TSEC>;
+				nvidia,memory-controller = <&mc>;
+				dma-coherent;
+				status = "disabled";
+			};
+
+			nvdla0: nvdla0@15880000 {
+				compatible = "nvidia,tegra234-nvdla";
+				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DLAA>;
+				reg = <0x0 0x15880000 0x0 0x00040000>;
+				interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
+
+				resets = <&bpmp TEGRA234_RESET_DLA0>;
+				clocks = <&bpmp TEGRA234_CLK_DLA0_CORE>,
+					 <&bpmp TEGRA234_CLK_DLA0_FALCON>;
+				clock-names = "nvdla0", "nvdla0_flcn";
+
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_DLA0RDA &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_DLA0FALRDB &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_DLA0WRA &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_DLA0FALWRB &emc>;
+				interconnect-names = "dma-mem", "read-1", "write", "write-1";
+				iommus = <&smmu_niso1 TEGRA234_SID_NVDLA0>;
+				dma-coherent;
+				status = "disabled";
+			};
+
+			nvdla1: nvdla1@158c0000 {
+				compatible = "nvidia,tegra234-nvdla";
+				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_DLAB>;
+				reg = <0x0 0x158c0000 0x0 0x00040000>;
+				interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
+
+				resets = <&bpmp TEGRA234_RESET_DLA1>;
+				clocks = <&bpmp TEGRA234_CLK_DLA1_CORE>,
+					 <&bpmp TEGRA234_CLK_DLA1_FALCON>;
+				clock-names = "nvdla1", "nvdla1_flcn";
+
+				interconnects = <&mc TEGRA234_MEMORY_CLIENT_DLA1RDA &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_DLA1FALRDB &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_DLA1WRA &emc>,
+						<&mc TEGRA234_MEMORY_CLIENT_DLA1FALWRB &emc>;
+				interconnect-names = "dma-mem", "read-1", "write", "write-1";
+				iommus = <&smmu_niso0 TEGRA234_SID_NVDLA1>;
+				dma-coherent;
+				status = "disabled";
+			};
+
+			pva0: pva0@16000000 {
+				compatible = "nvidia,tegra234-pva";
+				power-domains = <&bpmp TEGRA234_POWER_DOMAIN_PVA>;
+				reg = <0x0 0x16000000 0x0 0x800000>,
+				      <0x0 0x24700000 0x0 0x080000>;
+				interrupts = <0 234 0x04>,
+					<0 432 0x04>,
+					<0 433 0x04>,
+					<0 434 0x04>,
+					<0 435 0x04>,
+					<0 436 0x04>,
+					<0 437 0x04>,
+					<0 438 0x04>,
+					<0 439 0x04>;
+				resets = <&bpmp TEGRA234_RESET_PVA0_ALL>;
+				clocks = <&bpmp TEGRA234_CLK_PVA0_CPU_AXI>,
+					 <&bpmp TEGRA234_CLK_NAFLL_PVA0_VPS>,
+					 <&bpmp TEGRA234_CLK_PVA0_VPS>;
+				clock-names = "axi", "vps0", "vps1";
+
+				iommus = <&smmu_niso1 TEGRA234_SID_PVA0>;
+				dma-coherent;
+				status = "disabled";
+
+				pva0_ctx0n1: pva0_niso1_ctx0 {
+					compatible = "nvidia,pva-tegra186-iommu-context";
+					iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM0>;
 					dma-coherent;
 					status = "disabled";
 				};
 
-				mttcan@c310000 {
-					compatible = "nvidia,tegra194-mttcan";
-					reg = <0x0 0x0c310000 0x0 0x144>,
-						<0x0 0x0c311000 0x0 0x32>,
-						<0x0 0x0c312000 0x0 0x1000>;
-					reg-names = "can-regs", "glue-regs", "msg-ram";
-					interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
-					pll_source = "pllaon";
-					clocks = <&bpmp TEGRA234_CLK_CAN1_CORE>,
-						<&bpmp TEGRA234_CLK_CAN1_HOST>,
-						<&bpmp TEGRA234_CLK_CAN1>,
-						<&bpmp TEGRA234_CLK_PLLAON>;
-					clock-names = "can_core", "can_host","can","pllaon";
-					resets = <&bpmp TEGRA234_RESET_CAN1>;
-					reset-names = "can";
-					mram-params = <0 16 16 32 0 0 16 16 16>;
-					tx-config = <0 16 0 64>;
-					rx-config = <64 64 64>;
-					bitrates = <500 2000>;
-					/* bittimes = <bitrate tdc_dbtp brp tseg1 tseg2 sjw support_bitrate> */
-					/* support_bitrate = nominal(0x1), data(0x2) by bitwise OR */
-					bittimes = <125  0x00 0x0F 0x13 0x03 0x00 0x03>,
-						<250  0x00 0x00 0xAE 0x17 0x00 0x01>,
-						<250  0x00 0x07 0x13 0x03 0x00 0x02>,
-						<500  0x00 0x03 0x13 0x03 0x00 0x03>,
-						<1000 0x00 0x01 0x10 0x06 0x00 0x03>,
-						<2000 0x00 0x00 0x10 0x06 0x00 0x02>;
-					status = "disabled";
-				};
-
-				mttcan@c320000 {
-					compatible = "nvidia,tegra194-mttcan";
-					reg = <0x0 0x0c320000 0x0 0x144>,
-						<0x0 0x0c321000 0x0 0x32>,
-						<0x0 0x0c322000 0x0 0x1000>;
-					reg-names = "can-regs", "glue-regs", "msg-ram";
-					interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-					pll_source = "pllaon";
-					clocks = <&bpmp TEGRA234_CLK_CAN2_CORE>,
-						<&bpmp TEGRA234_CLK_CAN2_HOST>,
-						<&bpmp TEGRA234_CLK_CAN2>,
-						<&bpmp TEGRA234_CLK_PLLAON>;
-					clock-names = "can_core", "can_host","can","pllaon";
-					resets = <&bpmp TEGRA234_RESET_CAN2>;
-					reset-names = "can";
-					mram-params = <0 16 16 32 0 0 16 16 16>;
-					tx-config = <0 16 0 64>;
-					rx-config = <64 64 64>;
-					bitrates = <500 2000>;
-					/* bittimes = <bitrate tdc_dbtp brp tseg1 tseg2 sjw support_bitrate> */
-					/* support_bitrate = nominal(0x1), data(0x2) by bitwise OR */
-					bittimes = <125  0x00 0x0F 0x13 0x03 0x00 0x03>,
-						<250  0x00 0x00 0xAE 0x17 0x00 0x01>,
-						<250  0x00 0x07 0x13 0x03 0x00 0x02>,
-						<500  0x00 0x03 0x13 0x03 0x00 0x03>,
-						<1000 0x00 0x01 0x10 0x06 0x00 0x03>,
-						<2000 0x00 0x00 0x10 0x06 0x00 0x02>;
-					status = "disabled";
-				};
-
-				hsp_top2: hsp@1600000 {
-					compatible = "nvidia,tegra234-hsp";
-					reg = <0x0 0x1600000 0x0 0x90000>;
-					interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "shared0";
-					#mbox-cells = <2>;
-					status = "disabled";
-				};
-
-				hsp_top1: hsp@3d00000 {
-					compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
-					reg = <0x0 0x03d00000 0x0 0x000a0000>;
-					interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
-						     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
-						     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
-						     <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "shared0", "shared1", "shared2", "shared3";
-					#mbox-cells = <2>;
-					status = "disabled";
-				};
-
-				aon: aon@c000000 {
-					compatible = "nvidia,tegra234-aon";
-					iommus = <&smmu_niso0 TEGRA234_SID_AON>;
+				pva0_ctx1n1: pva0_niso1_ctx1 {
+					compatible = "nvidia,pva-tegra186-iommu-context";
+					iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM1>;
 					dma-coherent;
-
-					/* common mailbox binding property, should be 1. */
-					#mbox-cells = <1>;
-					reg =	<0 0xc000000 0 0x800000>;
-					nvidia,ivc-carveout-base-ss = <0>;
-					nvidia,ivc-carveout-size-ss = <1>;
-					nvidia,ivc-rx-ss = <2>;
-					nvidia,ivc-tx-ss = <3>;
-
-					/* mailbox for debugging */
-					mboxes = <&aon 0>;
-
 					status = "disabled";
+				};
 
-					hsp {
-						compatible = "nvidia,tegra-aon-hsp";
-						mboxes =
-						  <&hsp_top1 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(5)>,
-						  <&hsp_top1 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(4)>;
-						mbox-names = "ivc-tx", "ivc-rx";
-					};
+				pva0_ctx2n1: pva0_niso1_ctx2 {
+					compatible = "nvidia,pva-tegra186-iommu-context";
+					iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM2>;
+					dma-coherent;
+					status = "disabled";
+				};
 
-					ivc-channels@80000000 {
-						#address-cells = <1>;
-						#size-cells = <0>;
+				pva0_ctx3n1: pva0_niso1_ctx3 {
+					compatible = "nvidia,pva-tegra186-iommu-context";
+					iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM3>;
+					dma-coherent;
+					status = "disabled";
+				};
 
-						ivc_aon_aondbg@0 {
-							reg = <0x0000>, <0x10000>;
-							reg-names = "rx", "tx";
-							nvidia,frame-count = <2>;
-							nvidia,frame-size = <64>;
-						};
+				pva0_ctx4n1: pva0_niso1_ctx4 {
+					compatible = "nvidia,pva-tegra186-iommu-context";
+					iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM4>;
+					dma-coherent;
+					status = "disabled";
+				};
 
-						ivc_aon_echo@100 {
-							reg = <0x0100>, <0x10100>;
-							reg-names = "rx", "tx";
-							nvidia,frame-count = <16>;
-							nvidia,frame-size = <64>;
-						};
-					};
+				pva0_ctx5n1: pva0_niso1_ctx5 {
+					compatible = "nvidia,pva-tegra186-iommu-context";
+					iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM5>;
+					dma-coherent;
+					status = "disabled";
+				};
+
+				pva0_ctx6n1: pva0_niso1_ctx6 {
+					compatible = "nvidia,pva-tegra186-iommu-context";
+					iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM6>;
+					dma-coherent;
+					status = "disabled";
+				};
+
+				pva0_ctx7n1: pva0_niso1_ctx7 {
+					compatible = "nvidia,pva-tegra186-iommu-context";
+					iommus = <&smmu_niso1 TEGRA234_SID_PVA0_VM7>;
+					dma-coherent;
+					status = "disabled";
 				};
 			};
+		};
 
-			hsp_rce: tegra-hsp@b950000 {
-				compatible = "nvidia,tegra186-hsp";
-				reg = <0 0x0b950000 0 0x00090000>;
-				interrupts =	<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_1 IRQ_TYPE_LEVEL_HIGH>,
-						<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_2 IRQ_TYPE_LEVEL_HIGH>,
-						<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_3 IRQ_TYPE_LEVEL_HIGH>,
-						<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_4 IRQ_TYPE_LEVEL_HIGH>;
-				#mbox-cells = <2>;
-				interrupt-names = "shared1", "shared2", "shared3", "shared4";
-				status = "disabled";
+		spi@c260000 {
+			compatible = "nvidia,tegra210-spi";
+			reg = <0x0 0x0c260000 0x0 0x1000>;
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&bpmp TEGRA234_CLK_SPI2>,
+				<&bpmp TEGRA234_CLK_PLLAON>,
+				<&bpmp TEGRA234_CLK_OSC>;
+			clock-names = "spi";
+			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+			assigned-clocks = <&bpmp TEGRA234_CLK_SPI2>;
+			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
+			resets = <&bpmp TEGRA234_RESET_SPI2>;
+			reset-names = "spi";
+			dmas = <&gpcdma 16>, <&gpcdma 16>;
+			dma-names = "rx", "tx";
+			dma-coherent;
+			status = "disabled";
+		};
+
+		mttcan@c310000 {
+			compatible = "nvidia,tegra194-mttcan";
+			reg = <0x0 0x0c310000 0x0 0x144>,
+				<0x0 0x0c311000 0x0 0x32>,
+				<0x0 0x0c312000 0x0 0x1000>;
+			reg-names = "can-regs", "glue-regs", "msg-ram";
+			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+			pll_source = "pllaon";
+			clocks = <&bpmp TEGRA234_CLK_CAN1_CORE>,
+				<&bpmp TEGRA234_CLK_CAN1_HOST>,
+				<&bpmp TEGRA234_CLK_CAN1>,
+				<&bpmp TEGRA234_CLK_PLLAON>;
+			clock-names = "can_core", "can_host","can","pllaon";
+			resets = <&bpmp TEGRA234_RESET_CAN1>;
+			reset-names = "can";
+			mram-params = <0 16 16 32 0 0 16 16 16>;
+			tx-config = <0 16 0 64>;
+			rx-config = <64 64 64>;
+			bitrates = <500 2000>;
+			/* bittimes = <bitrate tdc_dbtp brp tseg1 tseg2 sjw support_bitrate> */
+			/* support_bitrate = nominal(0x1), data(0x2) by bitwise OR */
+			bittimes = <125  0x00 0x0F 0x13 0x03 0x00 0x03>,
+				<250  0x00 0x00 0xAE 0x17 0x00 0x01>,
+				<250  0x00 0x07 0x13 0x03 0x00 0x02>,
+				<500  0x00 0x03 0x13 0x03 0x00 0x03>,
+				<1000 0x00 0x01 0x10 0x06 0x00 0x03>,
+				<2000 0x00 0x00 0x10 0x06 0x00 0x02>;
+			status = "disabled";
+		};
+
+		mttcan@c320000 {
+			compatible = "nvidia,tegra194-mttcan";
+			reg = <0x0 0x0c320000 0x0 0x144>,
+				<0x0 0x0c321000 0x0 0x32>,
+				<0x0 0x0c322000 0x0 0x1000>;
+			reg-names = "can-regs", "glue-regs", "msg-ram";
+			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+			pll_source = "pllaon";
+			clocks = <&bpmp TEGRA234_CLK_CAN2_CORE>,
+				<&bpmp TEGRA234_CLK_CAN2_HOST>,
+				<&bpmp TEGRA234_CLK_CAN2>,
+				<&bpmp TEGRA234_CLK_PLLAON>;
+			clock-names = "can_core", "can_host","can","pllaon";
+			resets = <&bpmp TEGRA234_RESET_CAN2>;
+			reset-names = "can";
+			mram-params = <0 16 16 32 0 0 16 16 16>;
+			tx-config = <0 16 0 64>;
+			rx-config = <64 64 64>;
+			bitrates = <500 2000>;
+			/* bittimes = <bitrate tdc_dbtp brp tseg1 tseg2 sjw support_bitrate> */
+			/* support_bitrate = nominal(0x1), data(0x2) by bitwise OR */
+			bittimes = <125  0x00 0x0F 0x13 0x03 0x00 0x03>,
+				<250  0x00 0x00 0xAE 0x17 0x00 0x01>,
+				<250  0x00 0x07 0x13 0x03 0x00 0x02>,
+				<500  0x00 0x03 0x13 0x03 0x00 0x03>,
+				<1000 0x00 0x01 0x10 0x06 0x00 0x03>,
+				<2000 0x00 0x00 0x10 0x06 0x00 0x02>;
+			status = "disabled";
+		};
+
+		hsp_top2: hsp@1600000 {
+			compatible = "nvidia,tegra234-hsp";
+			reg = <0x0 0x1600000 0x0 0x90000>;
+			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "shared0";
+			#mbox-cells = <2>;
+			status = "disabled";
+		};
+
+		hsp_top1: hsp@3d00000 {
+			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
+			reg = <0x0 0x03d00000 0x0 0x000a0000>;
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "shared0", "shared1", "shared2", "shared3";
+			#mbox-cells = <2>;
+			status = "disabled";
+		};
+
+		aon: aon@c000000 {
+			compatible = "nvidia,tegra234-aon";
+			iommus = <&smmu_niso0 TEGRA234_SID_AON>;
+			dma-coherent;
+
+			/* common mailbox binding property, should be 1. */
+			#mbox-cells = <1>;
+			reg =	<0 0xc000000 0 0x800000>;
+			nvidia,ivc-carveout-base-ss = <0>;
+			nvidia,ivc-carveout-size-ss = <1>;
+			nvidia,ivc-rx-ss = <2>;
+			nvidia,ivc-tx-ss = <3>;
+
+			/* mailbox for debugging */
+			mboxes = <&aon 0>;
+
+			status = "disabled";
+
+			hsp {
+				compatible = "nvidia,tegra-aon-hsp";
+				mboxes =
+				  <&hsp_top1 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(5)>,
+				  <&hsp_top1 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(4)>;
+				mbox-names = "ivc-tx", "ivc-rx";
 			};
 
-			tegra_mce@e100000 {
-				compatible = "nvidia,t23x-mce";
-				reg =   <0x0 0x0E100000 0x0 0x00010000>, /* ARI BASE Core 0*/
-						<0x0 0x0E110000 0x0 0x00010000>,
-						<0x0 0x0E120000 0x0 0x00010000>,
-						<0x0 0x0E130000 0x0 0x00010000>,
-						<0x0 0x0E140000 0x0 0x00010000>,
-						<0x0 0x0E150000 0x0 0x00010000>,
-						<0x0 0x0E160000 0x0 0x00010000>,
-						<0x0 0x0E170000 0x0 0x00010000>,
-						<0x0 0x0E180000 0x0 0x00010000>,
-						<0x0 0x0E190000 0x0 0x00010000>,
-						<0x0 0x0E1A0000 0x0 0x00010000>,
-						<0x0 0x0E1B0000 0x0 0x00010000>;
-				status = "disabled";
-			};
-
-			scf-pmu {
-				compatible = "nvidia,scf-pmu";
-				interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-affinity = <&cpu0_0>;
-				status = "disabled";
-			};
-
-			nvpmodel {
-				compatible = "nvidia,nvpmodel";
-				nvidia,bpmp = <&bpmp>;
-				clocks = <&bpmp TEGRA234_CLK_EMC>;
-				clock-names = "emc";
-				status = "disabled";
-			};
-
-			soctherm-oc-event {
-				compatible = "nvidia,tegra234-oc-event";
-				nvidia,bpmp = <&bpmp>;
-				status = "disabled";
-			};
-
-			/* TSC Signal Generators */
-			tsc_sig_gen@c6a0000 {
-				compatible = "nvidia,tegra234-cam-cdi-tsc";
-				ranges = <0x0 0x0 0xc6a0000 0x10000>;
-				reg = <0x0 0xc6a0000 0x0 0x18>;
+			ivc-channels@80000000 {
 				#address-cells = <1>;
-				#size-cells = <1>;
-				status = "disabled";
-				/* EDGE_OUT #0 */
-				generator@380 {
-					reg = <0x380 0x80>;
-					freq_hz = <30>;
-					duty_cycle = <25>;
-					offset_ms = <0>;
-					gpio_pinmux = <&gpio_aon TEGRA234_AON_GPIO(BB, 2) GPIO_ACTIVE_LOW>;
-					status = "disabled";
+				#size-cells = <0>;
+
+				ivc_aon_aondbg@0 {
+					reg = <0x0000>, <0x10000>;
+					reg-names = "rx", "tx";
+					nvidia,frame-count = <2>;
+					nvidia,frame-size = <64>;
 				};
-				/* EDGE_OUT #1 */
-				generator@400 {
-					reg = <0x400 0x80>;
-					freq_hz = <30>;
-					duty_cycle = <25>;
-					offset_ms = <0>;
-					status = "disabled";
-				};
-				/* EDGE_OUT #2 */
-				generator@480 {
-					reg = <0x480 0x80>;
-					freq_hz = <30>;
-					duty_cycle = <25>;
-					offset_ms = <0>;
-					status = "disabled";
-				};
-				/* EDGE_OUT #3 */
-				generator@500 {
-					reg = <0x500 0x80>;
-					freq_hz = <30>;
-					duty_cycle = <25>;
-					offset_ms = <0>;
-					status = "disabled";
+
+				ivc_aon_echo@100 {
+					reg = <0x0100>, <0x10100>;
+					reg-names = "rx", "tx";
+					nvidia,frame-count = <16>;
+					nvidia,frame-size = <64>;
 				};
 			};
+		};
+	};
+
+	hsp_rce: tegra-hsp@b950000 {
+		compatible = "nvidia,tegra186-hsp";
+		reg = <0 0x0b950000 0 0x00090000>;
+		interrupts =	<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_1 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_2 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_3 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_4 IRQ_TYPE_LEVEL_HIGH>;
+		#mbox-cells = <2>;
+		interrupt-names = "shared1", "shared2", "shared3", "shared4";
+		status = "disabled";
+	};
+
+	tegra_mce@e100000 {
+		compatible = "nvidia,t23x-mce";
+		reg =   <0x0 0x0E100000 0x0 0x00010000>, /* ARI BASE Core 0*/
+				<0x0 0x0E110000 0x0 0x00010000>,
+				<0x0 0x0E120000 0x0 0x00010000>,
+				<0x0 0x0E130000 0x0 0x00010000>,
+				<0x0 0x0E140000 0x0 0x00010000>,
+				<0x0 0x0E150000 0x0 0x00010000>,
+				<0x0 0x0E160000 0x0 0x00010000>,
+				<0x0 0x0E170000 0x0 0x00010000>,
+				<0x0 0x0E180000 0x0 0x00010000>,
+				<0x0 0x0E190000 0x0 0x00010000>,
+				<0x0 0x0E1A0000 0x0 0x00010000>,
+				<0x0 0x0E1B0000 0x0 0x00010000>;
+		status = "disabled";
+	};
+
+	scf-pmu {
+		compatible = "nvidia,scf-pmu";
+		interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0_0>;
+		status = "disabled";
+	};
+
+	nvpmodel {
+		compatible = "nvidia,nvpmodel";
+		nvidia,bpmp = <&bpmp>;
+		clocks = <&bpmp TEGRA234_CLK_EMC>;
+		clock-names = "emc";
+		status = "disabled";
+	};
+
+	soctherm-oc-event {
+		compatible = "nvidia,tegra234-oc-event";
+		nvidia,bpmp = <&bpmp>;
+		status = "disabled";
+	};
+
+	/* TSC Signal Generators */
+	tsc_sig_gen@c6a0000 {
+		compatible = "nvidia,tegra234-cam-cdi-tsc";
+		ranges = <0x0 0x0 0xc6a0000 0x10000>;
+		reg = <0x0 0xc6a0000 0x0 0x18>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "disabled";
+		/* EDGE_OUT #0 */
+		generator@380 {
+			reg = <0x380 0x80>;
+			freq_hz = <30>;
+			duty_cycle = <25>;
+			offset_ms = <0>;
+			gpio_pinmux = <&gpio_aon TEGRA234_AON_GPIO(BB, 2) GPIO_ACTIVE_LOW>;
+			status = "disabled";
+		};
+		/* EDGE_OUT #1 */
+		generator@400 {
+			reg = <0x400 0x80>;
+			freq_hz = <30>;
+			duty_cycle = <25>;
+			offset_ms = <0>;
+			status = "disabled";
+		};
+		/* EDGE_OUT #2 */
+		generator@480 {
+			reg = <0x480 0x80>;
+			freq_hz = <30>;
+			duty_cycle = <25>;
+			offset_ms = <0>;
+			status = "disabled";
+		};
+		/* EDGE_OUT #3 */
+		generator@500 {
+			reg = <0x500 0x80>;
+			freq_hz = <30>;
+			duty_cycle = <25>;
+			offset_ms = <0>;
+			status = "disabled";
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-prod-overlay.dtsi b/nv-soc/tegra234-soc-prod-overlay.dtsi
index 453839a..d0a32fa 100644
--- a/nv-soc/tegra234-soc-prod-overlay.dtsi
+++ b/nv-soc/tegra234-soc-prod-overlay.dtsi
@@ -2,829 +2,829 @@
 // SPDX-FileCopyrightText: Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
 
 / {
-			bus@0 {
-				i2c@3160000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
-							nvidia,i2c-hs-sclk-high-period = <0x03>;
-							nvidia,i2c-hs-sclk-low-period = <0x08>;
-							prod = <
-								0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
-								0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
-								0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
-								0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
-								0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
-						};
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_hs {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-clk-divisor-hs-mode = <0x02>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							nvidia,i2c-hs-stop-setup-time = <0x09>;
-							nvidia,i2c-hs-start-hold-time = <0x09>;
-							nvidia,i2c-hs-start-setup-time = <0x09>;
-							prod = <
-								0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
-								0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
-						};
-					};
+	bus@0 {
+		i2c@3160000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
+					nvidia,i2c-hs-sclk-high-period = <0x03>;
+					nvidia,i2c-hs-sclk-low-period = <0x08>;
+					prod = <
+						0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
+						0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
+						0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
+						0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
+						0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
 				};
-
-				i2c@3180000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
-							nvidia,i2c-hs-sclk-high-period = <0x03>;
-							nvidia,i2c-hs-sclk-low-period = <0x08>;
-							prod = <
-								0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
-								0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
-								0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
-								0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
-								0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
-						};
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_hs {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-clk-divisor-hs-mode = <0x02>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							nvidia,i2c-hs-stop-setup-time = <0x09>;
-							nvidia,i2c-hs-start-hold-time = <0x09>;
-							nvidia,i2c-hs-start-setup-time = <0x09>;
-							prod = <
-								0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
-								0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
-						};
-					};
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
 				};
-
-				i2c@3190000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
-							nvidia,i2c-hs-sclk-high-period = <0x03>;
-							nvidia,i2c-hs-sclk-low-period = <0x08>;
-							prod = <
-								0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
-								0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
-								0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
-								0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
-								0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
-						};
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_fmplus {
-							prod = <
-								0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_hs {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-clk-divisor-hs-mode = <0x02>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							nvidia,i2c-hs-stop-setup-time = <0x09>;
-							nvidia,i2c-hs-start-hold-time = <0x09>;
-							nvidia,i2c-hs-start-setup-time = <0x09>;
-							prod = <
-								0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
-								0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
-						};
-					};
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
 				};
-
-				i2c@31b0000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
-							nvidia,i2c-hs-sclk-high-period = <0x03>;
-							nvidia,i2c-hs-sclk-low-period = <0x08>;
-							prod = <
-								0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
-								0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
-								0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
-								0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
-								0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
-						};
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_hs {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-clk-divisor-hs-mode = <0x02>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							nvidia,i2c-hs-stop-setup-time = <0x09>;
-							nvidia,i2c-hs-start-hold-time = <0x09>;
-							nvidia,i2c-hs-start-setup-time = <0x09>;
-							prod = <
-								0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
-								0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
-						};
-					};
+				prod_c_hs {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-clk-divisor-hs-mode = <0x02>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					nvidia,i2c-hs-stop-setup-time = <0x09>;
+					nvidia,i2c-hs-start-hold-time = <0x09>;
+					nvidia,i2c-hs-start-setup-time = <0x09>;
+					prod = <
+						0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
+						0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
 				};
-
-				i2c@31c0000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
-							nvidia,i2c-hs-sclk-high-period = <0x03>;
-							nvidia,i2c-hs-sclk-low-period = <0x08>;
-							prod = <
-								0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
-								0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
-								0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
-								0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
-								0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
-						};
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_hs {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-clk-divisor-hs-mode = <0x02>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							nvidia,i2c-hs-stop-setup-time = <0x09>;
-							nvidia,i2c-hs-start-hold-time = <0x09>;
-							nvidia,i2c-hs-start-setup-time = <0x09>;
-							prod = <
-								0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
-								0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
-						};
-					};
-				};
-
-				i2c@31e0000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
-							nvidia,i2c-hs-sclk-high-period = <0x03>;
-							nvidia,i2c-hs-sclk-low-period = <0x08>;
-							prod = <
-								0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
-								0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
-								0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
-								0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
-								0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
-						};
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_hs {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-clk-divisor-hs-mode = <0x02>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							nvidia,i2c-hs-stop-setup-time = <0x09>;
-							nvidia,i2c-hs-start-hold-time = <0x09>;
-							nvidia,i2c-hs-start-setup-time = <0x09>;
-							prod = <
-								0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
-								0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
-						};
-					};
-				};
-
-				i2c@c240000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
-							nvidia,i2c-hs-sclk-high-period = <0x03>;
-							nvidia,i2c-hs-sclk-low-period = <0x08>;
-							prod = <
-								0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
-								0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
-								0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
-								0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
-								0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
-						};
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_hs {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-clk-divisor-hs-mode = <0x02>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							nvidia,i2c-hs-stop-setup-time = <0x09>;
-							nvidia,i2c-hs-start-hold-time = <0x09>;
-							nvidia,i2c-hs-start-setup-time = <0x09>;
-							prod = <
-								0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
-								0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
-						};
-					};
-				};
-
-				i2c@c250000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
-							nvidia,i2c-hs-sclk-high-period = <0x03>;
-							nvidia,i2c-hs-sclk-low-period = <0x08>;
-							prod = <
-								0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
-								0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
-								0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
-								0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
-								0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
-						};
-						prod_c_fm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_fmplus {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
-						};
-						prod_c_hs {
-							nvidia,i2c-clk-divisor-fs-mode = <0x16>;
-							nvidia,i2c-clk-divisor-hs-mode = <0x02>;
-							nvidia,i2c-sclk-high-period = <0x02>;
-							nvidia,i2c-sclk-low-period = <0x02>;
-							nvidia,i2c-bus-free-time = <0x02>;
-							nvidia,i2c-stop-setup-time = <0x02>;
-							nvidia,i2c-start-hold-time = <0x02>;
-							nvidia,i2c-start-setup-time = <0x02>;
-							nvidia,i2c-hs-stop-setup-time = <0x09>;
-							nvidia,i2c-hs-start-hold-time = <0x09>;
-							nvidia,i2c-hs-start-setup-time = <0x09>;
-							prod = <
-								0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
-								0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
-						};
-						prod_c_sm {
-							nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
-							nvidia,i2c-sclk-high-period = <0x07>;
-							nvidia,i2c-sclk-low-period = <0x08>;
-							nvidia,i2c-bus-free-time = <0x08>;
-							nvidia,i2c-stop-setup-time = <0x08>;
-							nvidia,i2c-start-hold-time = <0x08>;
-							nvidia,i2c-start-setup-time = <0x08>;
-							prod = <
-								0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
-								0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
-								0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
-						};
-					};
-				};
-
-				mmc@3400000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_1_8v {
-							prod = <
-								0 0x000001e0 0x01f00000 0x00800000>;            //SDMMCA_SDMEMCOMPPADCTRL_0
-						};
-						prod_c_3_3v {
-							prod = <
-								0 0x000001e0 0x01f00000 0x00900000>;            //SDMMCA_SDMEMCOMPPADCTRL_0
-						};
-						prod {
-							prod = <
-								0 0x00000028 0x00000022 0x00000002              //SDMMCA_POWER_CONTROL_HOST_0
-								0 0x00000100 0x1fff006a 0x0e080020              //SDMMCA_VENDOR_CLOCK_CNTRL_0
-								0 0x00000128 0x42000000 0x00000000              //SDMMCA_VENDOR_MISC_CNTRL2_0
-								0 0x000001c0 0x00001fc0 0x00000040              //SDMMCA_VENDOR_TUNING_CNTRL0_0
-								0 0x000001e0 0x0001f000 0x00009000              //SDMMCA_SDMEMCOMPPADCTRL_0
-								0 0x000001e4 0x20000000 0x20000000>;            //SDMMCA_AUTO_CAL_CONFIG_0
-						};
-						prod_c_ddr50 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00040000>;            //SDMMCA_AUTO_CMD12_ERR_STATUS_0
-						};
-						prod_c_ddr52 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00040000>;            //SDMMCA_AUTO_CMD12_ERR_STATUS_0
-						};
-						prod_c_hs200 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00030000              //SDMMCA_AUTO_CMD12_ERR_STATUS_0
-								0 0x000001c0 0x0000e000 0x00004000>;            //SDMMCA_VENDOR_TUNING_CNTRL0_0
-						};
-						prod_c_nopwrsave {
-							prod = <
-								0 0x00000100 0x00000001 0x00000001              //SDMMCA_VENDOR_CLOCK_CNTRL_0
-								0 0x000001ac 0x00000004 0x00000000>;            //SDMMCA_VENDOR_IO_TRIM_CNTRL_0
-						};
-						prod_c_pwrsave {
-							prod = <
-								0 0x00000100 0x00000001 0x00000000              //SDMMCA_VENDOR_CLOCK_CNTRL_0
-								0 0x000001ac 0x00000004 0x00000004>;            //SDMMCA_VENDOR_IO_TRIM_CNTRL_0
-						};
-						prod_c_sdr104 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00030000              //SDMMCA_AUTO_CMD12_ERR_STATUS_0
-								0 0x000001c0 0x0000e000 0x00004000>;            //SDMMCA_VENDOR_TUNING_CNTRL0_0
-						};
-						prod_c_sdr12 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00000000>;            //SDMMCA_AUTO_CMD12_ERR_STATUS_0
-						};
-						prod_c_sdr25 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00010000>;            //SDMMCA_AUTO_CMD12_ERR_STATUS_0
-						};
-						prod_c_sdr50 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00020000              //SDMMCA_AUTO_CMD12_ERR_STATUS_0
-								0 0x000001c0 0x0000e000 0x00008000>;            //SDMMCA_VENDOR_TUNING_CNTRL0_0
-						};
-					};
-				};
-				mmc@3460000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							prod = <
-								0 0x00000004 0x00000fff 0x00000200              //sdmmcab_block_size_block_count_0
-								0 0x00000028 0x00000020 0x00000020              //sdmmcab_power_control_host_0
-								0 0x00000100 0x1f00006a 0x12000020              //sdmmcab_vendor_clock_cntrl_0
-								0 0x00000128 0x43000000 0x00000000              //sdmmcab_vendor_misc_cntrl2_0
-								0 0x000001c0 0x00001fc0 0x00000040              //sdmmcab_vendor_tuning_cntrl0_0
-								0 0x000001e0 0x01f1f000 0x00a0a000              //sdmmcab_sdmemcomppadctrl_0
-								0 0x000001e4 0x20000000 0x20000000>;            //sdmmcab_auto_cal_config_0
-						};
-						prod_c_ddr50 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00040000              //sdmmcab_auto_cmd12_err_status_0
-								0 0x00000100 0x1fff0000 0x12070000>;            //sdmmcab_vendor_clock_cntrl_0
-						};
-						prod_c_ddr52 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00040000              //sdmmcab_auto_cmd12_err_status_0
-								0 0x00000100 0x1fff0000 0x12070000>;            //sdmmcab_vendor_clock_cntrl_0
-						};
-						prod_c_hs200 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00030000              //sdmmcab_auto_cmd12_err_status_0
-								0 0x000001c0 0x0000e000 0x00004000>;            //sdmmcab_vendor_tuning_cntrl0_0
-						};
-						prod_c_hs400 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00050000              //sdmmcab_auto_cmd12_err_status_0
-								0 0x00000100 0x00000008 0x00000008              //sdmmcab_vendor_clock_cntrl_0
-								0 0x0000010c 0x00003f00 0x00002800              //sdmmcab_vendor_cap_overrides_0
-								0 0x000001c0 0x0000e000 0x00004000>;            //sdmmcab_vendor_tuning_cntrl0_0
-						};
-						prod_c_nopwrsave {
-							prod = <
-								0 0x00000100 0x00000001 0x00000001              //sdmmcab_vendor_clock_cntrl_0
-								0 0x000001ac 0x00000004 0x00000000>;            //sdmmcab_vendor_io_trim_cntrl_0
-						};
-						prod_c_pwrsave {
-							prod = <
-								0 0x00000100 0x00000001 0x00000000              //sdmmcab_vendor_clock_cntrl_0
-								0 0x000001ac 0x00000004 0x00000004>;            //sdmmcab_vendor_io_trim_cntrl_0
-						};
-						prod_c_sdr12 {
-							prod = <
-								0 0x00000100 0x1fff0000 0x12070000>;            //sdmmcab_vendor_clock_cntrl_0
-						};
-						prod_c_sdr25 {
-							prod = <
-								0 0x00000100 0x1fff0000 0x12070000>;            //sdmmcab_vendor_clock_cntrl_0
-						};
-						prod_c_sdr50 {
-							prod = <
-								0 0x0000003c 0x00070000 0x00020000>;            //sdmmcab_auto_cmd12_err_status_0
-						};
-					};
-				};
-
-				spi@3210000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							prod = <
-								0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
-						};
-					};
-				};
-
-				spi@3230000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							prod = <
-								0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
-						};
-					};
-				};
-
-				spi@3240000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							prod = <
-								0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
-						};
-					};
-				};
-
-				spi@3250000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							prod = <
-								0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
-						};
-					};
-				};
-
-				spi@3270000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_nonsecure {
-							prod = <
-								0 0x0000f000 0x0000003f 0x00000012>;            //qspi_secure_axi_ctl_0
-						};
-						prod_c_nopwrsave {
-							prod = <
-								0 0x00000194 0x80000000 0x80000000              //qspi_misc_0
-								0 0x000001ec 0x00000002 0x00000000              //qspi_qspi_comp_control_0
-								0 0x000001fc 0x00000002 0x00000000>;            //qspi_io_trim_cntrl_0
-						};
-						prod_c_pwrsave {
-							prod = <
-								0 0x00000194 0x80000000 0x00000000              //qspi_misc_0
-								0 0x000001ec 0x00000002 0x00000002              //qspi_qspi_comp_control_0
-								0 0x000001fc 0x00000002 0x00000002>;            //qspi_io_trim_cntrl_0
-						};
-						prod_c_secure {
-							prod = <
-								0 0x0000f000 0x0000003f 0x00000000>;            //qspi_secure_axi_ctl_0
-						};
-					};
-				};
-
-				spi@3300000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod_c_nonsecure {
-							prod = <
-								0 0x0000f000 0x0000003f 0x00000012>;            //qspi_secure_axi_ctl_0
-						};
-						prod_c_nopwrsave {
-							prod = <
-								0 0x00000194 0x80000000 0x80000000              //qspi_misc_0
-								0 0x000001ec 0x00000002 0x00000000              //qspi_qspi_comp_control_0
-								0 0x000001fc 0x00000002 0x00000000>;            //qspi_io_trim_cntrl_0
-						};
-						prod_c_pwrsave {
-							prod = <
-								0 0x00000194 0x80000000 0x00000000              //qspi_misc_0
-								0 0x000001ec 0x00000002 0x00000002              //qspi_qspi_comp_control_0
-								0 0x000001fc 0x00000002 0x00000002>;            //qspi_io_trim_cntrl_0
-						};
-						prod_c_secure {
-							prod = <
-								0 0x0000f000 0x0000003f 0x00000000>;            //qspi_secure_axi_ctl_0
-						};
-					};
-				};
-
-				spi@c260000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							prod = <
-								0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
-						};
-					};
-				};
-
-				padctl@3520000 {
-					prod-settings {
-						#prod-cells = <4>;
-						prod {
-							nvidia,xusb-pad-hs-discon-level = <0x7>;
-							nvidia,xusb-pad-trk-start-timer = <0x1e>;
-							nvidia,xusb-pad-trk-reset-timer = <0xa>;
-							prod = <
-								0 0x00000284 0x00000038 0x00000038              //XUSB_PADCTL_USB2_BIAS_PAD_CTL_0_0
-								0 0x00000288 0x03fff000 0x0051e000>;            //XUSB_PADCTL_USB2_BIAS_PAD_CTL_1_0
-						};
-					};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
 				};
 			};
+		};
+
+		i2c@3180000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
+					nvidia,i2c-hs-sclk-high-period = <0x03>;
+					nvidia,i2c-hs-sclk-low-period = <0x08>;
+					prod = <
+						0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
+						0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
+						0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
+						0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
+						0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
+				};
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_hs {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-clk-divisor-hs-mode = <0x02>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					nvidia,i2c-hs-stop-setup-time = <0x09>;
+					nvidia,i2c-hs-start-hold-time = <0x09>;
+					nvidia,i2c-hs-start-setup-time = <0x09>;
+					prod = <
+						0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
+						0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
+				};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
+				};
+			};
+		};
+
+		i2c@3190000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
+					nvidia,i2c-hs-sclk-high-period = <0x03>;
+					nvidia,i2c-hs-sclk-low-period = <0x08>;
+					prod = <
+						0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
+						0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
+						0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
+						0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
+						0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
+				};
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_fmplus {
+					prod = <
+						0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_hs {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-clk-divisor-hs-mode = <0x02>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					nvidia,i2c-hs-stop-setup-time = <0x09>;
+					nvidia,i2c-hs-start-hold-time = <0x09>;
+					nvidia,i2c-hs-start-setup-time = <0x09>;
+					prod = <
+						0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
+						0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
+				};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
+				};
+			};
+		};
+
+		i2c@31b0000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
+					nvidia,i2c-hs-sclk-high-period = <0x03>;
+					nvidia,i2c-hs-sclk-low-period = <0x08>;
+					prod = <
+						0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
+						0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
+						0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
+						0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
+						0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
+				};
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_hs {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-clk-divisor-hs-mode = <0x02>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					nvidia,i2c-hs-stop-setup-time = <0x09>;
+					nvidia,i2c-hs-start-hold-time = <0x09>;
+					nvidia,i2c-hs-start-setup-time = <0x09>;
+					prod = <
+						0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
+						0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
+				};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
+				};
+			};
+		};
+
+		i2c@31c0000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
+					nvidia,i2c-hs-sclk-high-period = <0x03>;
+					nvidia,i2c-hs-sclk-low-period = <0x08>;
+					prod = <
+						0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
+						0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
+						0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
+						0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
+						0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
+				};
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_hs {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-clk-divisor-hs-mode = <0x02>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					nvidia,i2c-hs-stop-setup-time = <0x09>;
+					nvidia,i2c-hs-start-hold-time = <0x09>;
+					nvidia,i2c-hs-start-setup-time = <0x09>;
+					prod = <
+						0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
+						0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
+				};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
+				};
+			};
+		};
+
+		i2c@31e0000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
+					nvidia,i2c-hs-sclk-high-period = <0x03>;
+					nvidia,i2c-hs-sclk-low-period = <0x08>;
+					prod = <
+						0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
+						0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
+						0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
+						0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
+						0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
+				};
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_hs {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-clk-divisor-hs-mode = <0x02>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					nvidia,i2c-hs-stop-setup-time = <0x09>;
+					nvidia,i2c-hs-start-hold-time = <0x09>;
+					nvidia,i2c-hs-start-setup-time = <0x09>;
+					prod = <
+						0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
+						0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
+				};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
+				};
+			};
+		};
+
+		i2c@c240000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
+					nvidia,i2c-hs-sclk-high-period = <0x03>;
+					nvidia,i2c-hs-sclk-low-period = <0x08>;
+					prod = <
+						0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
+						0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
+						0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
+						0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
+						0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
+				};
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_hs {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-clk-divisor-hs-mode = <0x02>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					nvidia,i2c-hs-stop-setup-time = <0x09>;
+					nvidia,i2c-hs-start-hold-time = <0x09>;
+					nvidia,i2c-hs-start-setup-time = <0x09>;
+					prod = <
+						0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
+						0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
+				};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
+				};
+			};
+		};
+
+		i2c@c250000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					/* 0xd4, 0xd8, 0xdc, 0xe0 not defined in drivery */
+					nvidia,i2c-hs-sclk-high-period = <0x03>;
+					nvidia,i2c-hs-sclk-low-period = <0x08>;
+					prod = <
+						0 0x0000009c 0x0000ffff 0x00000308              //i2c_i2c_hs_interface_timing_0_0
+						0 0x000000d4 0x000000ff 0x00000000              //i2c_i2c_interface_timing_2_0
+						0 0x000000d8 0x000000ff 0x00000000              //i2c_i2c_hs_interface_timing_2_0
+						0 0x000000dc 0x0000ffff 0x00000001              //i2c_i2c_mstr_data_capture_timing_0
+						0 0x000000e0 0x0000ffff 0x00000002>;            //i2c_i2c_slv_data_capture_timing_0
+				};
+				prod_c_fm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x3c>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x003c0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_fmplus {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x00160000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202>;            //i2c_i2c_interface_timing_1_0
+				};
+				prod_c_hs {
+					nvidia,i2c-clk-divisor-fs-mode = <0x16>;
+					nvidia,i2c-clk-divisor-hs-mode = <0x02>;
+					nvidia,i2c-sclk-high-period = <0x02>;
+					nvidia,i2c-sclk-low-period = <0x02>;
+					nvidia,i2c-bus-free-time = <0x02>;
+					nvidia,i2c-stop-setup-time = <0x02>;
+					nvidia,i2c-start-hold-time = <0x02>;
+					nvidia,i2c-start-setup-time = <0x02>;
+					nvidia,i2c-hs-stop-setup-time = <0x09>;
+					nvidia,i2c-hs-start-hold-time = <0x09>;
+					nvidia,i2c-hs-start-setup-time = <0x09>;
+					prod = <
+						0 0x0000006c 0xffffffff 0x00160002              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000202              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x02020202              //i2c_i2c_interface_timing_1_0
+						0 0x000000a0 0x00ffffff 0x00090909>;            //i2c_i2c_hs_interface_timing_1_0
+				};
+				prod_c_sm {
+					nvidia,i2c-clk-divisor-fs-mode = <0x4f>;
+					nvidia,i2c-sclk-high-period = <0x07>;
+					nvidia,i2c-sclk-low-period = <0x08>;
+					nvidia,i2c-bus-free-time = <0x08>;
+					nvidia,i2c-stop-setup-time = <0x08>;
+					nvidia,i2c-start-hold-time = <0x08>;
+					nvidia,i2c-start-setup-time = <0x08>;
+					prod = <
+						0 0x0000006c 0xffff0000 0x004f0000              //i2c_i2c_clk_divisor_register_0
+						0 0x00000094 0x0000ffff 0x00000708              //i2c_i2c_interface_timing_0_0
+						0 0x00000098 0xffffffff 0x08080808>;            //i2c_i2c_interface_timing_1_0
+				};
+			};
+		};
+
+		mmc@3400000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_1_8v {
+					prod = <
+						0 0x000001e0 0x01f00000 0x00800000>;            //SDMMCA_SDMEMCOMPPADCTRL_0
+				};
+				prod_c_3_3v {
+					prod = <
+						0 0x000001e0 0x01f00000 0x00900000>;            //SDMMCA_SDMEMCOMPPADCTRL_0
+				};
+				prod {
+					prod = <
+						0 0x00000028 0x00000022 0x00000002              //SDMMCA_POWER_CONTROL_HOST_0
+						0 0x00000100 0x1fff006a 0x0e080020              //SDMMCA_VENDOR_CLOCK_CNTRL_0
+						0 0x00000128 0x42000000 0x00000000              //SDMMCA_VENDOR_MISC_CNTRL2_0
+						0 0x000001c0 0x00001fc0 0x00000040              //SDMMCA_VENDOR_TUNING_CNTRL0_0
+						0 0x000001e0 0x0001f000 0x00009000              //SDMMCA_SDMEMCOMPPADCTRL_0
+						0 0x000001e4 0x20000000 0x20000000>;            //SDMMCA_AUTO_CAL_CONFIG_0
+				};
+				prod_c_ddr50 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00040000>;            //SDMMCA_AUTO_CMD12_ERR_STATUS_0
+				};
+				prod_c_ddr52 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00040000>;            //SDMMCA_AUTO_CMD12_ERR_STATUS_0
+				};
+				prod_c_hs200 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00030000              //SDMMCA_AUTO_CMD12_ERR_STATUS_0
+						0 0x000001c0 0x0000e000 0x00004000>;            //SDMMCA_VENDOR_TUNING_CNTRL0_0
+				};
+				prod_c_nopwrsave {
+					prod = <
+						0 0x00000100 0x00000001 0x00000001              //SDMMCA_VENDOR_CLOCK_CNTRL_0
+						0 0x000001ac 0x00000004 0x00000000>;            //SDMMCA_VENDOR_IO_TRIM_CNTRL_0
+				};
+				prod_c_pwrsave {
+					prod = <
+						0 0x00000100 0x00000001 0x00000000              //SDMMCA_VENDOR_CLOCK_CNTRL_0
+						0 0x000001ac 0x00000004 0x00000004>;            //SDMMCA_VENDOR_IO_TRIM_CNTRL_0
+				};
+				prod_c_sdr104 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00030000              //SDMMCA_AUTO_CMD12_ERR_STATUS_0
+						0 0x000001c0 0x0000e000 0x00004000>;            //SDMMCA_VENDOR_TUNING_CNTRL0_0
+				};
+				prod_c_sdr12 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00000000>;            //SDMMCA_AUTO_CMD12_ERR_STATUS_0
+				};
+				prod_c_sdr25 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00010000>;            //SDMMCA_AUTO_CMD12_ERR_STATUS_0
+				};
+				prod_c_sdr50 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00020000              //SDMMCA_AUTO_CMD12_ERR_STATUS_0
+						0 0x000001c0 0x0000e000 0x00008000>;            //SDMMCA_VENDOR_TUNING_CNTRL0_0
+				};
+			};
+		};
+		mmc@3460000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					prod = <
+						0 0x00000004 0x00000fff 0x00000200              //sdmmcab_block_size_block_count_0
+						0 0x00000028 0x00000020 0x00000020              //sdmmcab_power_control_host_0
+						0 0x00000100 0x1f00006a 0x12000020              //sdmmcab_vendor_clock_cntrl_0
+						0 0x00000128 0x43000000 0x00000000              //sdmmcab_vendor_misc_cntrl2_0
+						0 0x000001c0 0x00001fc0 0x00000040              //sdmmcab_vendor_tuning_cntrl0_0
+						0 0x000001e0 0x01f1f000 0x00a0a000              //sdmmcab_sdmemcomppadctrl_0
+						0 0x000001e4 0x20000000 0x20000000>;            //sdmmcab_auto_cal_config_0
+				};
+				prod_c_ddr50 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00040000              //sdmmcab_auto_cmd12_err_status_0
+						0 0x00000100 0x1fff0000 0x12070000>;            //sdmmcab_vendor_clock_cntrl_0
+				};
+				prod_c_ddr52 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00040000              //sdmmcab_auto_cmd12_err_status_0
+						0 0x00000100 0x1fff0000 0x12070000>;            //sdmmcab_vendor_clock_cntrl_0
+				};
+				prod_c_hs200 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00030000              //sdmmcab_auto_cmd12_err_status_0
+						0 0x000001c0 0x0000e000 0x00004000>;            //sdmmcab_vendor_tuning_cntrl0_0
+				};
+				prod_c_hs400 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00050000              //sdmmcab_auto_cmd12_err_status_0
+						0 0x00000100 0x00000008 0x00000008              //sdmmcab_vendor_clock_cntrl_0
+						0 0x0000010c 0x00003f00 0x00002800              //sdmmcab_vendor_cap_overrides_0
+						0 0x000001c0 0x0000e000 0x00004000>;            //sdmmcab_vendor_tuning_cntrl0_0
+				};
+				prod_c_nopwrsave {
+					prod = <
+						0 0x00000100 0x00000001 0x00000001              //sdmmcab_vendor_clock_cntrl_0
+						0 0x000001ac 0x00000004 0x00000000>;            //sdmmcab_vendor_io_trim_cntrl_0
+				};
+				prod_c_pwrsave {
+					prod = <
+						0 0x00000100 0x00000001 0x00000000              //sdmmcab_vendor_clock_cntrl_0
+						0 0x000001ac 0x00000004 0x00000004>;            //sdmmcab_vendor_io_trim_cntrl_0
+				};
+				prod_c_sdr12 {
+					prod = <
+						0 0x00000100 0x1fff0000 0x12070000>;            //sdmmcab_vendor_clock_cntrl_0
+				};
+				prod_c_sdr25 {
+					prod = <
+						0 0x00000100 0x1fff0000 0x12070000>;            //sdmmcab_vendor_clock_cntrl_0
+				};
+				prod_c_sdr50 {
+					prod = <
+						0 0x0000003c 0x00070000 0x00020000>;            //sdmmcab_auto_cmd12_err_status_0
+				};
+			};
+		};
+
+		spi@3210000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					prod = <
+						0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
+				};
+			};
+		};
+
+		spi@3230000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					prod = <
+						0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
+				};
+			};
+		};
+
+		spi@3240000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					prod = <
+						0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
+				};
+			};
+		};
+
+		spi@3250000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					prod = <
+						0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
+				};
+			};
+		};
+
+		spi@3270000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_nonsecure {
+					prod = <
+						0 0x0000f000 0x0000003f 0x00000012>;            //qspi_secure_axi_ctl_0
+				};
+				prod_c_nopwrsave {
+					prod = <
+						0 0x00000194 0x80000000 0x80000000              //qspi_misc_0
+						0 0x000001ec 0x00000002 0x00000000              //qspi_qspi_comp_control_0
+						0 0x000001fc 0x00000002 0x00000000>;            //qspi_io_trim_cntrl_0
+				};
+				prod_c_pwrsave {
+					prod = <
+						0 0x00000194 0x80000000 0x00000000              //qspi_misc_0
+						0 0x000001ec 0x00000002 0x00000002              //qspi_qspi_comp_control_0
+						0 0x000001fc 0x00000002 0x00000002>;            //qspi_io_trim_cntrl_0
+				};
+				prod_c_secure {
+					prod = <
+						0 0x0000f000 0x0000003f 0x00000000>;            //qspi_secure_axi_ctl_0
+				};
+			};
+		};
+
+		spi@3300000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod_c_nonsecure {
+					prod = <
+						0 0x0000f000 0x0000003f 0x00000012>;            //qspi_secure_axi_ctl_0
+				};
+				prod_c_nopwrsave {
+					prod = <
+						0 0x00000194 0x80000000 0x80000000              //qspi_misc_0
+						0 0x000001ec 0x00000002 0x00000000              //qspi_qspi_comp_control_0
+						0 0x000001fc 0x00000002 0x00000000>;            //qspi_io_trim_cntrl_0
+				};
+				prod_c_pwrsave {
+					prod = <
+						0 0x00000194 0x80000000 0x00000000              //qspi_misc_0
+						0 0x000001ec 0x00000002 0x00000002              //qspi_qspi_comp_control_0
+						0 0x000001fc 0x00000002 0x00000002>;            //qspi_io_trim_cntrl_0
+				};
+				prod_c_secure {
+					prod = <
+						0 0x0000f000 0x0000003f 0x00000000>;            //qspi_secure_axi_ctl_0
+				};
+			};
+		};
+
+		spi@c260000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					prod = <
+						0 0x00000194 0x80000000 0x00000000>;            //spi_misc_0
+				};
+			};
+		};
+
+		padctl@3520000 {
+			prod-settings {
+				#prod-cells = <4>;
+				prod {
+					nvidia,xusb-pad-hs-discon-level = <0x7>;
+					nvidia,xusb-pad-trk-start-timer = <0x1e>;
+					nvidia,xusb-pad-trk-reset-timer = <0xa>;
+					prod = <
+						0 0x00000284 0x00000038 0x00000038              //XUSB_PADCTL_USB2_BIAS_PAD_CTL_0_0
+						0 0x00000288 0x03fff000 0x0051e000>;            //XUSB_PADCTL_USB2_BIAS_PAD_CTL_1_0
+				};
+			};
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-safetyservice-fsicom.dtsi b/nv-soc/tegra234-soc-safetyservice-fsicom.dtsi
index 867c83b..a0e7f0c 100644
--- a/nv-soc/tegra234-soc-safetyservice-fsicom.dtsi
+++ b/nv-soc/tegra234-soc-safetyservice-fsicom.dtsi
@@ -5,143 +5,143 @@
 #include <dt-bindings/memory/tegra234-mc.h>
 
 / {
-        	reserved-memory {
-        		#address-cells = <2>;
-        		#size-cells = <2>;
-        		ranges;
-        
-        		fsicom_resv: reservation-fsicom {
-        			iommu-addresses = <&fsicom_client 0x0 0x0 0x0 0xf0000000>,
-        				<&fsicom_client 0x0 0xf1000000 0xffffffff 0x0effffff>;
-        		};
-        		fsicom_resv_inst1: reservation-fsicom_inst1 {
-        			iommu-addresses = <&fsicom_client_inst1 0x0 0x0 0x0 0xf0000000>,
-        				<&fsicom_client_inst1 0x0 0xf1000000 0xffffffff 0x0effffff>;
-        		};
-        	};
+reserved-memory {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
 
-        	fsicom_client: fsicom_client {
-        		compatible = "nvidia,tegra234-fsicom-client";
-#if TEGRA_HSP_DT_VERSION >= DT_VERSION_2
-        		mboxes =
-        			<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(2)>,
-        			<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_RX(1)>,
-        			<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(5)>,
-        			<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_RX(4)>;
-#else
-        		mboxes =
-        			<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_TX(2)>,
-        			<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_RX(1)>,
-        			<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_TX(5)>,
-        			<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_RX(4)>;
-#endif
-        		mbox-names = "fsi-tx-cpu0", "fsi-rx-cpu0", "fsi-tx-cpu1", "fsi-rx-cpu1";
-        		iommus = <&smmu_niso1 TEGRA234_SID_NISO1_FSI_CPU0>;
-		        memory-region = <&fsicom_resv>;
-        		dma-coherent;
-#if defined(ENABLE_FSI) && !defined(ENABLE_MODS_CONFIG)
-        		enable-deinit-notify;
-#endif
-        		smmu_inst = <0>;
-        		max_fsi_core=<1>; /*Value 1 <-> core 0, value 2 <-> core0,1*/
-        		status = "disabled";
-        	};
-        	fsicom_client_inst1: fsicom_client_inst1 {
-        		compatible = "nvidia,tegra234-fsicom-client";
-        		iommus = <&smmu_niso1 TEGRA234_SID_NISO1_FSI_CPU1>;
-        		memory-region = <&fsicom_resv_inst1>;
-        		dma-coherent;
-        		smmu_inst = <1>;
-        		status = "okay";
-        	};
-        	safetyservices_epl_client@110000 {
-        		compatible = "nvidia,tegra234-epl-client";
-#if TEGRA_HSP_DT_VERSION >= DT_VERSION_2
-        		mboxes =
-        			<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(0)>;
-#else
-        		mboxes =
-        			<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_TX(0)>;
-#endif
-        		mbox-names = "epl-tx";
-
-        		reg = <0x0 0x00110000 0x0 0x4>,
-        			  <0x0 0x00110004 0x0 0x4>,
-        			  <0x0 0x00120000 0x0 0x4>,
-        			  <0x0 0x00120004 0x0 0x4>,
-        			  <0x0 0x00130000 0x0 0x4>,
-        			  <0x0 0x00130004 0x0 0x4>,
-        			  <0x0 0x00140000 0x0 0x4>,
-        			  <0x0 0x00140004 0x0 0x4>,
-        			  <0x0 0x00150000 0x0 0x4>,
-        			  <0x0 0x00150004 0x0 0x4>,
-        			  <0x0 0x024e0038 0x0 0x4>;
-
-        		/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR0_SW_ERR_CODE_0 */
-        		client-misc-sw-generic-err0 = "fsicom_client";
-        		/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR1_SW_ERR_CODE_0 */
-        		client-misc-sw-generic-err1 = "gk20b";
-        		/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR3_SW_ERR_CODE_0 */
-        		client-misc-sw-generic-err3 = "gk20d";
-        		/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR4_SW_ERR_CODE_0 */
-        		client-misc-sw-generic-err4 = "gk20e";
-
-#if defined(ENABLE_FSI) && !defined(ENABLE_MODS_CONFIG)
-    		    enable-deinit-notify;
-#endif
-        		status = "disabled";
-
-        	};
-        	FsiComIvc {
-        		compatible = "nvidia,tegra-fsicom-channels";
-        		status = "disabled";
-        		nChannel=<7>;
-        		channel_0{
-        			frame-count = <4>;
-        			frame-size = <1024>;
-        			core-id = <0>;
-        			NvSciCh = "nvfsicom_EPD";
-        		};
-        		channel_1{
-        			frame-count = <30>;
-        			frame-size = <64>;
-        			core-id = <0>;
-        			NvSciCh = "nvfsicom_CcplexApp";
-        		};
-        		channel_2{
-        			frame-count = <4>;
-        			frame-size = <64>;
-        			core-id = <0>;
-        			NvSciCh = "nvfsicom_CcplexApp_state_change";
-        		};
-        		channel_3{
-        			frame-count = <4>;
-        			frame-size = <64>;
-        			core-id = <0>;
-        			NvSciCh = "nvfsicom_app1";
-        		};
-        		channel_4{
-        			frame-count = <2>;
-        			frame-size = <64>;
-        			core-id = <1>;
-        			NvSciCh = "nvfsicom_app2";
-        		};
-        		channel_5{
-        			frame-count = <4>;
-        			frame-size = <64>;
-        			core-id = <0>;
-        			NvSciCh = "nvfsicom_appGR";
-        		};
-        		channel_6{
-        			frame-count = <4>;
-        			frame-size = <10240>;
-        			core-id = <0>;
-        		};
-        	};
-
-        	FsiComClientChConfigEpd{
-        		compatible = "nvidia,tegra-fsicom-EPD";
-        		status = "disabled";
-        		channelid_list = <0>;
-        	};
+	fsicom_resv: reservation-fsicom {
+		iommu-addresses = <&fsicom_client 0x0 0x0 0x0 0xf0000000>,
+			<&fsicom_client 0x0 0xf1000000 0xffffffff 0x0effffff>;
+	};
+	fsicom_resv_inst1: reservation-fsicom_inst1 {
+		iommu-addresses = <&fsicom_client_inst1 0x0 0x0 0x0 0xf0000000>,
+			<&fsicom_client_inst1 0x0 0xf1000000 0xffffffff 0x0effffff>;
+	};
+};
+
+fsicom_client: fsicom_client {
+	compatible = "nvidia,tegra234-fsicom-client";
+#if TEGRA_HSP_DT_VERSION >= DT_VERSION_2
+	mboxes =
+		<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(2)>,
+		<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_RX(1)>,
+		<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(5)>,
+		<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_RX(4)>;
+#else
+	mboxes =
+		<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_TX(2)>,
+		<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_RX(1)>,
+		<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_TX(5)>,
+		<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_RX(4)>;
+#endif
+	mbox-names = "fsi-tx-cpu0", "fsi-rx-cpu0", "fsi-tx-cpu1", "fsi-rx-cpu1";
+	iommus = <&smmu_niso1 TEGRA234_SID_NISO1_FSI_CPU0>;
+	memory-region = <&fsicom_resv>;
+	dma-coherent;
+#if defined(ENABLE_FSI) && !defined(ENABLE_MODS_CONFIG)
+	enable-deinit-notify;
+#endif
+	smmu_inst = <0>;
+	max_fsi_core=<1>; /*Value 1 <-> core 0, value 2 <-> core0,1*/
+	status = "disabled";
+};
+fsicom_client_inst1: fsicom_client_inst1 {
+	compatible = "nvidia,tegra234-fsicom-client";
+	iommus = <&smmu_niso1 TEGRA234_SID_NISO1_FSI_CPU1>;
+	memory-region = <&fsicom_resv_inst1>;
+	dma-coherent;
+	smmu_inst = <1>;
+	status = "okay";
+};
+safetyservices_epl_client@110000 {
+	compatible = "nvidia,tegra234-epl-client";
+#if TEGRA_HSP_DT_VERSION >= DT_VERSION_2
+	mboxes =
+		<&hsp_top2 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(0)>;
+#else
+	mboxes =
+		<&hsp_top2 TEGRA_HSP_MBOX_TYPE_SM_128BIT TEGRA_HSP_SM_TX(0)>;
+#endif
+	mbox-names = "epl-tx";
+
+	reg = <0x0 0x00110000 0x0 0x4>,
+		  <0x0 0x00110004 0x0 0x4>,
+		  <0x0 0x00120000 0x0 0x4>,
+		  <0x0 0x00120004 0x0 0x4>,
+		  <0x0 0x00130000 0x0 0x4>,
+		  <0x0 0x00130004 0x0 0x4>,
+		  <0x0 0x00140000 0x0 0x4>,
+		  <0x0 0x00140004 0x0 0x4>,
+		  <0x0 0x00150000 0x0 0x4>,
+		  <0x0 0x00150004 0x0 0x4>,
+		  <0x0 0x024e0038 0x0 0x4>;
+
+	/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR0_SW_ERR_CODE_0 */
+	client-misc-sw-generic-err0 = "fsicom_client";
+	/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR1_SW_ERR_CODE_0 */
+	client-misc-sw-generic-err1 = "gk20b";
+	/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR3_SW_ERR_CODE_0 */
+	client-misc-sw-generic-err3 = "gk20d";
+	/* Device driver's name for reporting errors via MISCREG_MISC_EC_ERR4_SW_ERR_CODE_0 */
+	client-misc-sw-generic-err4 = "gk20e";
+
+#if defined(ENABLE_FSI) && !defined(ENABLE_MODS_CONFIG)
+    enable-deinit-notify;
+#endif
+	status = "disabled";
+
+};
+FsiComIvc {
+	compatible = "nvidia,tegra-fsicom-channels";
+	status = "disabled";
+	nChannel=<7>;
+	channel_0{
+		frame-count = <4>;
+		frame-size = <1024>;
+		core-id = <0>;
+		NvSciCh = "nvfsicom_EPD";
+	};
+	channel_1{
+		frame-count = <30>;
+		frame-size = <64>;
+		core-id = <0>;
+		NvSciCh = "nvfsicom_CcplexApp";
+	};
+	channel_2{
+		frame-count = <4>;
+		frame-size = <64>;
+		core-id = <0>;
+		NvSciCh = "nvfsicom_CcplexApp_state_change";
+	};
+	channel_3{
+		frame-count = <4>;
+		frame-size = <64>;
+		core-id = <0>;
+		NvSciCh = "nvfsicom_app1";
+	};
+	channel_4{
+		frame-count = <2>;
+		frame-size = <64>;
+		core-id = <1>;
+		NvSciCh = "nvfsicom_app2";
+	};
+	channel_5{
+		frame-count = <4>;
+		frame-size = <64>;
+		core-id = <0>;
+		NvSciCh = "nvfsicom_appGR";
+	};
+	channel_6{
+		frame-count = <4>;
+		frame-size = <10240>;
+		core-id = <0>;
+	};
+};
+
+FsiComClientChConfigEpd{
+	compatible = "nvidia,tegra-fsicom-EPD";
+	status = "disabled";
+	channelid_list = <0>;
+};
 };
diff --git a/nv-soc/tegra234-soc-thermal-shutdown.dtsi b/nv-soc/tegra234-soc-thermal-shutdown.dtsi
index cd2993c..77a12ed 100644
--- a/nv-soc/tegra234-soc-thermal-shutdown.dtsi
+++ b/nv-soc/tegra234-soc-thermal-shutdown.dtsi
@@ -4,95 +4,95 @@
 #define TEGRA234_THERMAL_SHUTDOWN_TEMP 104500
 
 / {
-			thermal-zones {
-				cpu-thermal {
-					trips {
-						cpu_sw_shutdown: cpu-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
-				};
-
-				gpu-thermal {
-					trips {
-						gpu_sw_shutdown: gpu-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
-				};
-
-				cv0-thermal {
-					trips {
-						cv0_sw_shutdown: cv0-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
-				};
-
-				cv1-thermal {
-					trips {
-						cv1_sw_shutdown: cv1-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
-				};
-
-				cv2-thermal {
-					trips {
-						cv2_sw_shutdown: cv2-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
-				};
-
-				soc0-thermal {
-					trips {
-						soc0_sw_shutdown: soc0-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
-				};
-
-				soc1-thermal {
-					trips {
-						soc1_sw_shutdown: soc1-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
-				};
-
-				soc2-thermal {
-					trips {
-						soc2_sw_shutdown: soc2-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
-				};
-
-				tj-thermal {
-					trips {
-						tj_sw_shutdown: tj-sw-shutdown {
-							temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "critical";
-						};
-					};
+	thermal-zones {
+		cpu-thermal {
+			trips {
+				cpu_sw_shutdown: cpu-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
 				};
 			};
+		};
+
+		gpu-thermal {
+			trips {
+				gpu_sw_shutdown: gpu-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+
+		cv0-thermal {
+			trips {
+				cv0_sw_shutdown: cv0-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+
+		cv1-thermal {
+			trips {
+				cv1_sw_shutdown: cv1-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+
+		cv2-thermal {
+			trips {
+				cv2_sw_shutdown: cv2-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+
+		soc0-thermal {
+			trips {
+				soc0_sw_shutdown: soc0-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+
+		soc1-thermal {
+			trips {
+				soc1_sw_shutdown: soc1-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+
+		soc2-thermal {
+			trips {
+				soc2_sw_shutdown: soc2-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+
+		tj-thermal {
+			trips {
+				tj_sw_shutdown: tj-sw-shutdown {
+					temperature = <TEGRA234_THERMAL_SHUTDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-thermal-slowdown-cluster.dtsi b/nv-soc/tegra234-soc-thermal-slowdown-cluster.dtsi
index 5835ba0..7bb374f 100644
--- a/nv-soc/tegra234-soc-thermal-slowdown-cluster.dtsi
+++ b/nv-soc/tegra234-soc-thermal-slowdown-cluster.dtsi
@@ -6,217 +6,217 @@
 #define TEGRA234_THERMAL_SLOWDOWN_TEMP 99000
 
 / {
-			bus@0 {
-				gpu@17000000 {
-					#cooling-cells = <2>;
+	bus@0 {
+		gpu@17000000 {
+			#cooling-cells = <2>;
+		};
+	};
+
+	cpus{
+		cpu@0 {
+			#cooling-cells = <2>;
+		};
+
+		cpu@10000 {
+			#cooling-cells = <2>;
+		};
+
+		cpu@20000 {
+			#cooling-cells = <2>;
+		};
+	};
+
+	thermal-zones {
+		cpu-thermal {
+			trips {
+				cpu_sw_slowdown: cpu-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
 				};
 			};
 
-			cpus{
-				cpu@0 {
-					#cooling-cells = <2>;
+			cooling-maps {
+				map-cpufreq {
+					trip = <&cpu_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 
-				cpu@10000 {
-					#cooling-cells = <2>;
+				map-devfreq {
+					trip = <&cpu_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
+			};
+		};
 
-				cpu@20000 {
-					#cooling-cells = <2>;
+		gpu-thermal {
+			trips {
+				gpu_sw_slowdown: gpu-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
 				};
 			};
 
-			thermal-zones {
-				cpu-thermal {
-					trips {
-						cpu_sw_slowdown: cpu-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&cpu_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&cpu_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
+			cooling-maps {
+				map-cpufreq {
+					trip = <&gpu_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 
-				gpu-thermal {
-					trips {
-						gpu_sw_slowdown: gpu-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&gpu_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&gpu_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				cv0-thermal {
-					trips {
-						cv0_sw_slowdown: cv0-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&cv0_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&cv0_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				cv1-thermal {
-					trips {
-						cv1_sw_slowdown: cv1-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&cv1_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&cv1_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				cv2-thermal {
-					trips {
-						cv2_sw_slowdown: cv2-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&cv2_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&cv2_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				soc0-thermal {
-					trips {
-						soc0_sw_slowdown: soc0-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&soc0_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&soc0_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				soc1-thermal {
-					trips {
-						soc1_sw_slowdown: soc1-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&soc1_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&soc1_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				soc2-thermal {
-					trips {
-						soc2_sw_slowdown: soc2-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&soc2_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&soc2_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
+				map-devfreq {
+					trip = <&gpu_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 			};
+		};
+
+		cv0-thermal {
+			trips {
+				cv0_sw_slowdown: cv0-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&cv0_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&cv0_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		cv1-thermal {
+			trips {
+				cv1_sw_slowdown: cv1-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&cv1_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&cv1_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		cv2-thermal {
+			trips {
+				cv2_sw_slowdown: cv2-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&cv2_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&cv2_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		soc0-thermal {
+			trips {
+				soc0_sw_slowdown: soc0-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&soc0_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&soc0_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		soc1-thermal {
+			trips {
+				soc1_sw_slowdown: soc1-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&soc1_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&soc1_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		soc2-thermal {
+			trips {
+				soc2_sw_slowdown: soc2-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&soc2_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&soc2_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-thermal-slowdown-corepair.dtsi b/nv-soc/tegra234-soc-thermal-slowdown-corepair.dtsi
index d6ca3de..0381f64 100644
--- a/nv-soc/tegra234-soc-thermal-slowdown-corepair.dtsi
+++ b/nv-soc/tegra234-soc-thermal-slowdown-corepair.dtsi
@@ -6,253 +6,253 @@
 #define TEGRA234_THERMAL_SLOWDOWN_TEMP 99000
 
 / {
-			bus@0 {
-				gpu@17000000 {
-					#cooling-cells = <2>;
+	bus@0 {
+		gpu@17000000 {
+			#cooling-cells = <2>;
+		};
+	};
+
+	cpus{
+		cpu@0 {
+			#cooling-cells = <2>;
+		};
+
+		cpu@200 {
+			#cooling-cells = <2>;
+		};
+
+		cpu@10000 {
+			#cooling-cells = <2>;
+		};
+
+		cpu@10200 {
+			#cooling-cells = <2>;
+		};
+
+		cpu@20000 {
+			#cooling-cells = <2>;
+		};
+
+		cpu@20200 {
+			#cooling-cells = <2>;
+		};
+	};
+
+	thermal-zones {
+		cpu-thermal {
+			trips {
+				cpu_sw_slowdown: cpu-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
 				};
 			};
 
-			cpus{
-				cpu@0 {
-					#cooling-cells = <2>;
+			cooling-maps {
+				map-cpufreq {
+					trip = <&cpu_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 
-				cpu@200 {
-					#cooling-cells = <2>;
+				map-devfreq {
+					trip = <&cpu_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
+			};
+		};
 
-				cpu@10000 {
-					#cooling-cells = <2>;
-				};
-
-				cpu@10200 {
-					#cooling-cells = <2>;
-				};
-
-				cpu@20000 {
-					#cooling-cells = <2>;
-				};
-
-				cpu@20200 {
-					#cooling-cells = <2>;
+		gpu-thermal {
+			trips {
+				gpu_sw_slowdown: gpu-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
 				};
 			};
 
-			thermal-zones {
-				cpu-thermal {
-					trips {
-						cpu_sw_slowdown: cpu-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&cpu_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&cpu_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
+			cooling-maps {
+				map-cpufreq {
+					trip = <&gpu_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 
-				gpu-thermal {
-					trips {
-						gpu_sw_slowdown: gpu-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&gpu_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&gpu_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				cv0-thermal {
-					trips {
-						cv0_sw_slowdown: cv0-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&cv0_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&cv0_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				cv1-thermal {
-					trips {
-						cv1_sw_slowdown: cv1-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&cv1_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&cv1_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				cv2-thermal {
-					trips {
-						cv2_sw_slowdown: cv2-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&cv2_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&cv2_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				soc0-thermal {
-					trips {
-						soc0_sw_slowdown: soc0-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&soc0_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&soc0_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				soc1-thermal {
-					trips {
-						soc1_sw_slowdown: soc1-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&soc1_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&soc1_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
-				};
-
-				soc2-thermal {
-					trips {
-						soc2_sw_slowdown: soc2-sw-slowdown {
-							temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
-							hysteresis = <0>;
-							type = "passive";
-						};
-					};
-
-					cooling-maps {
-						map-cpufreq {
-							trip = <&soc2_sw_slowdown>;
-							cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-									 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-
-						map-devfreq {
-							trip = <&soc2_sw_slowdown>;
-							cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-						};
-					};
+				map-devfreq {
+					trip = <&gpu_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 			};
+		};
+
+		cv0-thermal {
+			trips {
+				cv0_sw_slowdown: cv0-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&cv0_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&cv0_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		cv1-thermal {
+			trips {
+				cv1_sw_slowdown: cv1-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&cv1_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&cv1_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		cv2-thermal {
+			trips {
+				cv2_sw_slowdown: cv2-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&cv2_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&cv2_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		soc0-thermal {
+			trips {
+				soc0_sw_slowdown: soc0-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&soc0_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&soc0_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		soc1-thermal {
+			trips {
+				soc1_sw_slowdown: soc1-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&soc1_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&soc1_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		soc2-thermal {
+			trips {
+				soc2_sw_slowdown: soc2-sw-slowdown {
+					temperature = <TEGRA234_THERMAL_SLOWDOWN_TEMP>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map-cpufreq {
+					trip = <&soc2_sw_slowdown>;
+					cooling-device = <&cpu0_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu0_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map-devfreq {
+					trip = <&soc2_sw_slowdown>;
+					cooling-device = <&ga10b THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+	};
 };
diff --git a/nv-soc/tegra234-soc-thermal.dtsi b/nv-soc/tegra234-soc-thermal.dtsi
index 6045e18..2ec1218 100644
--- a/nv-soc/tegra234-soc-thermal.dtsi
+++ b/nv-soc/tegra234-soc-thermal.dtsi
@@ -4,50 +4,50 @@
 #define TEGRA234_THERMAL_POLLING_DELAY 1000
 
 / {
-			thermal-zones {
-				cpu-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
+	thermal-zones {
+		cpu-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
 
-				gpu-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
+		gpu-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
 
-				cv0-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
+		cv0-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
 
-				cv1-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
+		cv1-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
 
-				cv2-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
+		cv2-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
 
-				soc0-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
+		soc0-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
 
-				soc1-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
+		soc1-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
 
-				soc2-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
+		soc2-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
 
-				tj-thermal {
-					polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
-					polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
-				};
-			};
+		tj-thermal {
+			polling-delay = <TEGRA234_THERMAL_POLLING_DELAY>;
+			polling-delay-passive = <TEGRA234_THERMAL_POLLING_DELAY>;
+		};
+	};
 };