tegra234: Align serial, usb and regulator nodes with 6.5.rc2

Do the multiple minor alignment with mainline DTS/DTSI file
as follows:
- Rearranged the clock speed of serial port based on mainline.
- Corrected the pci3v3 regualotr GPIO on P3701-0000.
- Corrected usb phy-names on Pp3768-0000.

Bug 4037899

Change-Id: Ie39ede2eaed8f7eb0a2cbee6cdde47205a358c19
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2945863
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>

tegra234-p3740-0002+p3701-0008.dts

@@ -12,6 +12,7 @@
 
 	aliases {
 		serial0 = &tcu;
+		serial1 = &uarta;
 	};
 
 	chosen {
@@ -22,6 +23,7 @@
 	bus@0 {
 		serial@3100000 {
 			compatible = "nvidia,tegra194-hsuart";
+			reset-names = "serial";
 			status = "okay";
 		};