mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
tegra234: Resequence the nodes matching with mainline 6.5.rc3
Resequence the nodes in base DTBs which are available in mainline as per mainline version 6.5.rc3. This will help on matching the files with mainline. There is no change in the nodes other than just changing their position based on mainline. Bug 4037899 Change-Id: I2e3d12b44e22c3182d6246edc9e77fd6e6554ac1 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2944776
This commit is contained in:
committed by
mobile promotions
parent
416c472bb5
commit
aaa02ac7bf
@@ -1,5 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
|
||||
#include "tegra234.dtsi"
|
||||
#include "tegra234-p3701.dtsi"
|
||||
|
||||
@@ -1,5 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
#include "tegra234.dtsi"
|
||||
#include "tegra234-p3701.dtsi"
|
||||
|
||||
@@ -1,5 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
|
||||
/ {
|
||||
compatible = "nvidia,p3701", "nvidia,tegra234";
|
||||
|
||||
@@ -1,5 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
@@ -161,57 +160,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@14100000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
|
||||
phys = <&p2u_hsio_3>;
|
||||
phy-names = "p2u-0";
|
||||
};
|
||||
|
||||
pcie@14160000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
|
||||
phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
|
||||
<&p2u_hsio_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
|
||||
};
|
||||
|
||||
pcie@141a0000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
vpcie3v3-supply = <&vdd_3v3_pcie>;
|
||||
vpcie12v-supply = <&vdd_12v_pcie>;
|
||||
|
||||
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
|
||||
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
|
||||
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
|
||||
"p2u-5", "p2u-6", "p2u-7";
|
||||
};
|
||||
|
||||
pcie-ep@141a0000 {
|
||||
status = "disabled";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
|
||||
reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>;
|
||||
|
||||
nvidia,refclk-select-gpios = <&gpio_aon
|
||||
TEGRA234_AON_GPIO(AA, 4)
|
||||
GPIO_ACTIVE_HIGH>;
|
||||
|
||||
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
|
||||
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
|
||||
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
|
||||
"p2u-5", "p2u-6", "p2u-7";
|
||||
};
|
||||
|
||||
i2c@c240000 {
|
||||
status = "okay";
|
||||
typec@8 {
|
||||
@@ -269,6 +217,57 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pcie@14100000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
|
||||
phys = <&p2u_hsio_3>;
|
||||
phy-names = "p2u-0";
|
||||
};
|
||||
|
||||
pcie@14160000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
|
||||
phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
|
||||
<&p2u_hsio_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
|
||||
};
|
||||
|
||||
pcie@141a0000 {
|
||||
status = "okay";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
vpcie3v3-supply = <&vdd_3v3_pcie>;
|
||||
vpcie12v-supply = <&vdd_12v_pcie>;
|
||||
|
||||
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
|
||||
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
|
||||
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
|
||||
"p2u-5", "p2u-6", "p2u-7";
|
||||
};
|
||||
|
||||
pcie-ep@141a0000 {
|
||||
status = "disabled";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
|
||||
reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>;
|
||||
|
||||
nvidia,refclk-select-gpios = <&gpio_aon
|
||||
TEGRA234_AON_GPIO(AA, 4)
|
||||
GPIO_ACTIVE_HIGH>;
|
||||
|
||||
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
|
||||
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
|
||||
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
|
||||
"p2u-5", "p2u-6", "p2u-7";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
@@ -308,9 +307,8 @@
|
||||
};
|
||||
|
||||
sound {
|
||||
status = "okay";
|
||||
|
||||
compatible = "nvidia,tegra186-audio-graph-card";
|
||||
status = "okay";
|
||||
|
||||
dais = /* ADMAIF (FE) Ports */
|
||||
<&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
|
||||
|
||||
@@ -1,5 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
@@ -21,51 +20,6 @@
|
||||
};
|
||||
|
||||
bus@0 {
|
||||
host1x@13e00000 {
|
||||
nvdec@15480000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pcie@140e0000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
phys = <&p2u_gbe_4>, <&p2u_gbe_5>;
|
||||
phy-names = "p2u-0", "p2u-1";
|
||||
};
|
||||
|
||||
pcie@14100000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
phys = <&p2u_hsio_3>;
|
||||
phy-names = "p2u-0";
|
||||
};
|
||||
|
||||
pcie@14160000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
phys = <&p2u_hsio_7>, <&p2u_hsio_6>, <&p2u_hsio_5>,
|
||||
<&p2u_hsio_4>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
|
||||
};
|
||||
|
||||
pcie@141a0000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
|
||||
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
|
||||
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
|
||||
"p2u-5", "p2u-6", "p2u-7";
|
||||
};
|
||||
|
||||
pcie@141e0000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
|
||||
phy-names = "p2u-0", "p2u-1";
|
||||
};
|
||||
|
||||
serial@3100000 {
|
||||
compatible = "nvidia,tegra194-hsuart";
|
||||
status = "okay";
|
||||
@@ -116,6 +70,51 @@
|
||||
i2c@c250000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
host1x@13e00000 {
|
||||
nvdec@15480000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
pcie@140e0000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
phys = <&p2u_gbe_4>, <&p2u_gbe_5>;
|
||||
phy-names = "p2u-0", "p2u-1";
|
||||
};
|
||||
|
||||
pcie@14100000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
phys = <&p2u_hsio_3>;
|
||||
phy-names = "p2u-0";
|
||||
};
|
||||
|
||||
pcie@14160000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
phys = <&p2u_hsio_7>, <&p2u_hsio_6>, <&p2u_hsio_5>,
|
||||
<&p2u_hsio_4>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
|
||||
};
|
||||
|
||||
pcie@141a0000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
|
||||
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
|
||||
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
|
||||
"p2u-5", "p2u-6", "p2u-7";
|
||||
};
|
||||
|
||||
pcie@141e0000 {
|
||||
status = "okay";
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ls>;
|
||||
phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
|
||||
phy-names = "p2u-0", "p2u-1";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
|
||||
@@ -1,5 +1,4 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
// Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <dt-bindings/sound/rt5640.h>
|
||||
|
||||
/ {
|
||||
@@ -33,19 +32,6 @@
|
||||
};
|
||||
|
||||
i2c@31c0000 {
|
||||
/* carrier board ID EEPROM */
|
||||
eeprom@55 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x55>;
|
||||
|
||||
label = "system";
|
||||
vcc-supply = <&vdd_1v8_ls>;
|
||||
address-width = <8>;
|
||||
pagesize = <8>;
|
||||
size = <256>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
rt5640: audio-codec@1c {
|
||||
compatible = "realtek,rt5640";
|
||||
reg = <0x1c>;
|
||||
@@ -73,6 +59,20 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* carrier board ID EEPROM */
|
||||
eeprom@55 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x55>;
|
||||
|
||||
label = "system";
|
||||
vcc-supply = <&vdd_1v8_ls>;
|
||||
address-width = <8>;
|
||||
pagesize = <8>;
|
||||
size = <256>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
padctl@3520000 {
|
||||
|
||||
@@ -134,6 +134,19 @@
|
||||
"usb3-1";
|
||||
};
|
||||
|
||||
/* C8 - Ethernet */
|
||||
pcie@140a0000 {
|
||||
status = "okay";
|
||||
|
||||
num-lanes = <2>;
|
||||
|
||||
phys = <&p2u_gbe_2>, <&p2u_gbe_3>;
|
||||
phy-names = "p2u-0", "p2u-1";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
vpcie3v3-supply = <&vdd_3v3_pcie>;
|
||||
};
|
||||
|
||||
/* C1 - M.2 Key-E */
|
||||
pcie@14100000 {
|
||||
status = "okay";
|
||||
@@ -155,19 +168,6 @@
|
||||
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
|
||||
};
|
||||
|
||||
/* C8 - Ethernet */
|
||||
pcie@140a0000 {
|
||||
status = "okay";
|
||||
|
||||
num-lanes = <2>;
|
||||
|
||||
phys = <&p2u_gbe_2>, <&p2u_gbe_3>;
|
||||
phy-names = "p2u-0", "p2u-1";
|
||||
|
||||
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
|
||||
vpcie3v3-supply = <&vdd_3v3_pcie>;
|
||||
};
|
||||
|
||||
/* C7 - M.2 Key-M */
|
||||
pcie@141e0000 {
|
||||
status = "okay";
|
||||
|
||||
Reference in New Issue
Block a user