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p3768: Added missing hdr40 pin config

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Current hdr40 dtsi misses the extperiph clks
and pwm pins configuration. Hence added the same
through this CL

Bug 4033331

Change-Id: I39b2b54bbe1057dfee73451bb98e7faefd32ec9d
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/platform/t23x/p3768-dts/+/2872809
(cherry picked from commit 572941f05417513d55b8e120b2f819e72cec127e)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/platform/t23x/p3768-dts/+/2872805
(cherry picked from commit ba24d22a526ced00a0511aed2d425ffdfa986f04)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/platform/t23x/p3768-dts/+/2889623
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Asha Talambedu <atalambedu@nvidia.com>
Tested-by: Asha Talambedu <atalambedu@nvidia.com>
This commit is contained in:
Asha T
2023-03-17 14:46:07 +05:30
committed by Laxman Dewangan
parent 70d869c90a
commit b7310ef8bb
1 changed files with 41 additions and 0 deletions
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41
overlay/tegra234-p3767-0000-common-hdr40.dtsi
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@@ -61,6 +61,13 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
hdr40-pin15 {
nvidia,pins = "soc_gpio39_pn1";
nvidia,function = "gp";
nvidia,pin-group = "pwm1";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
hdr40-pin16 {
nvidia,pins = "spi3_cs0_py3";
nvidia,function = "spi3";
@@ -123,6 +130,40 @@
hdr40-pin28 {
nvidia,pins = "gen2_i2c_scl_pcc7";
};
hdr40-pin29 {
nvidia,pins = "soc_gpio32_pq5";
nvidia,function = "extperiph3";
nvidia,pin-group = "extperiph3_clk";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
hdr40-pin31 {
nvidia,pins = "soc_gpio33_pq6";
nvidia,function = "extperiph4";
nvidia,pin-group = "extperiph4_clk";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};
hdr40-pin32 {
nvidia,pins = "soc_gpio19_pg6";
nvidia,function = "gp";
nvidia,pin-group = "pwm7";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
hdr40-pin33 {
nvidia,pins = "soc_gpio21_ph0";
nvidia,function = "gp";
nvidia,pin-group = "pwm5";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
hdr40-pin35 {
nvidia,pins = "soc_gpio44_pi2";
nvidia,function = "i2s2";