nv-public:P3783: Fix probe fail of Hawks during boot.

1. Made all sensors of Hawks as master sensors so any sensor is capable
   to program SERIALIZERS i2c address translation during probe time
   i.e first come first basis.So, We wont miss or skip SERIALIZERS
   i2c trans
2. Corrected CAM0_PWDN GPIO from (H, 6) to (E, 6)

Bug 4510846
Bug 4565904

Change-Id: I6d0b881ce3e3425d70672ea56064209ac65c3c2a
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3173608
(cherry picked from commit 1ffe07b61c)
Signed-off-by: Hiteshkumar Patel <hiteshkumarg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3176364
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Praveen AC <pac@nvidia.com>
This commit is contained in:
Hiteshkumar Patel
2024-07-11 22:27:07 +00:00
committed by mobile promotions
parent b1ab4a9440
commit b9fb65ff2a

View File

@@ -9,7 +9,7 @@
#include "dt-bindings/clock/tegra234-clock.h" #include "dt-bindings/clock/tegra234-clock.h"
#define CAM0_RST_L TEGRA234_MAIN_GPIO(H, 3) #define CAM0_RST_L TEGRA234_MAIN_GPIO(H, 3)
#define CAM0_PWDN TEGRA234_MAIN_GPIO(H, 6) #define CAM0_PWDN TEGRA234_MAIN_GPIO(E, 6)
#define CAM1_RST_L TEGRA234_MAIN_GPIO(AC, 1) #define CAM1_RST_L TEGRA234_MAIN_GPIO(AC, 1)
#define CAM1_PWDN TEGRA234_MAIN_GPIO(AC, 0) #define CAM1_PWDN TEGRA234_MAIN_GPIO(AC, 0)
#define PWR_EN TEGRA234_MAIN_GPIO(AC, 7) #define PWR_EN TEGRA234_MAIN_GPIO(AC, 7)
@@ -170,7 +170,7 @@
<&bpmp TEGRA234_CLK_EXTPERIPH1>; <&bpmp TEGRA234_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba"; clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1"; mclk = "extperiph1";
channel = "c"; channel = "a";
has-eeprom; has-eeprom;
eeprom-addr = <0x40>; eeprom-addr = <0x40>;
reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -208,7 +208,7 @@
<&bpmp TEGRA234_CLK_EXTPERIPH1>; <&bpmp TEGRA234_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba"; clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1"; mclk = "extperiph1";
channel = "c"; channel = "a";
has-eeprom; has-eeprom;
eeprom-addr = <0x42>; eeprom-addr = <0x42>;
reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -240,7 +240,7 @@
<&bpmp TEGRA234_CLK_EXTPERIPH1>; <&bpmp TEGRA234_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba"; clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1"; mclk = "extperiph1";
channel = "c"; channel = "a";
has-eeprom; has-eeprom;
eeprom-addr = <0x44>; eeprom-addr = <0x44>;
reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -272,7 +272,7 @@
<&bpmp TEGRA234_CLK_EXTPERIPH1>; <&bpmp TEGRA234_CLK_EXTPERIPH1>;
clock-names = "extperiph1", "pllp_grtba"; clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1"; mclk = "extperiph1";
channel = "c"; channel = "a";
has-eeprom; has-eeprom;
eeprom-addr = <0x46>; eeprom-addr = <0x46>;
reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;