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nv-platform: replace INA, hdr40_vdd_3v3, and CMA

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The on-board INA sensors and hdr40_vdd_3v3 regulator should be defined
in CVB-specific device tree instead of CVM-specific.
CMA should be defined in CVM-specific instead of CVB-specific.

Bug 4378720

Signed-off-by: Yi-Wei Wang <yiweiw@nvidia.com>
Change-Id: I31ebb14ffacb6d1fb58ba3848f4ce1ac5322655f
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3016311
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Yi-Wei Wang
2023-11-15 14:59:37 +08:00
committed by mobile promotions
parent e5ce927b18
commit c194f14a21
4 changed files with 52 additions and 54 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
nv-platform/tegra234-p3701-0000.dtsi
View File

@@ -59,14 +59,6 @@
};
};
hdr40_vdd_3v3: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd-3v3-sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
bpmp {
i2c {
vrs@3c {

46
nv-platform/tegra234-p3701-0008.dtsi
View File

@@ -48,37 +48,6 @@
};
};
i2c@c250000 {
ina3221@41 {
compatible = "ti,ina3221";
reg = <0x41>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0x0>;
label = "CVB_ATX_12V";
shunt-resistor-micro-ohms = <2000>;
};
channel@1 {
reg = <0x1>;
label = "CVB_ATX_3V3";
shunt-resistor-micro-ohms = <2000>;
};
channel@2 {
reg = <0x2>;
label = "CVB_ATX_5V";
shunt-resistor-micro-ohms = <2000>;
};
};
ina219@44 {
compatible = "ti,ina219";
reg = <0x44>;
shunt-resistor = <2000>;
label = "CVB_ATX_12V_8P";
};
};
spi@3270000 {
flash@0 {
spi-max-frequency = <51000000>;
@@ -157,6 +126,21 @@
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma { /* Needed for nvgpu comptags */
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x20000000>; /* 512MB */
alignment = <0x0 0x10000>;
linux,cma-default;
status = "okay";
};
};
thermal-zones {
cpu-thermal {
trips {

8
nv-platform/tegra234-p3737-0000.dtsi
View File

@@ -84,6 +84,14 @@
};
};
hdr40_vdd_3v3: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd-3v3-sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
tegra_sound_graph: tegra_sound: sound {
compatible = "nvidia,tegra186-audio-graph-card",
"nvidia,tegra186-ape";

44
nv-platform/tegra234-p3740-0002.dtsi
View File

@@ -31,6 +31,35 @@
};
i2c@c250000 {
ina3221@41 {
compatible = "ti,ina3221";
reg = <0x41>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0x0>;
label = "CVB_ATX_12V";
shunt-resistor-micro-ohms = <2000>;
};
channel@1 {
reg = <0x1>;
label = "CVB_ATX_3V3";
shunt-resistor-micro-ohms = <2000>;
};
channel@2 {
reg = <0x2>;
label = "CVB_ATX_5V";
shunt-resistor-micro-ohms = <2000>;
};
};
ina219@44 {
compatible = "ti,ina219";
reg = <0x44>;
shunt-resistor = <2000>;
label = "CVB_ATX_12V_8P";
};
f75308@4d {
compatible = "fintek,f75308";
reg = <0x4d>;
@@ -141,21 +170,6 @@
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma { /* Needed for nvgpu comptags */
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x20000000>; /* 512MB */
alignment = <0x0 0x10000>;
linux,cma-default;
status = "okay";
};
};
p3740_vdd_0v95_AO: regulator-vdd-0v95-AO {
compatible = "regulator-fixed";
regulator-name = "vdd-0v95-AO";