diff --git a/nv-platform/tegra234-p3701-0000.dtsi b/nv-platform/tegra234-p3701-0000.dtsi index 90d08d9..4a80e9d 100644 --- a/nv-platform/tegra234-p3701-0000.dtsi +++ b/nv-platform/tegra234-p3701-0000.dtsi @@ -11,7 +11,6 @@ reg = <0x40>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; label = "VDD_GPU_SOC"; @@ -26,7 +25,7 @@ reg = <0x2>; label = "VIN_SYS_5V0"; shunt-resistor-micro-ohms = <2000>; - summation-bypass; + ti,summation-disable; }; }; @@ -35,7 +34,6 @@ reg = <0x41>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; status = "disabled"; diff --git a/nv-platform/tegra234-p3701-0008.dtsi b/nv-platform/tegra234-p3701-0008.dtsi index 14a6f04..a15356a 100644 --- a/nv-platform/tegra234-p3701-0008.dtsi +++ b/nv-platform/tegra234-p3701-0008.dtsi @@ -9,7 +9,6 @@ reg = <0x40>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; label = "VDD_GPU_SOC"; @@ -24,7 +23,7 @@ reg = <0x2>; label = "VIN_SYS_5V0"; shunt-resistor-micro-ohms = <2000>; - summation-bypass; + ti,summation-disable; }; }; @@ -33,7 +32,6 @@ reg = <0x41>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; status = "disabled"; @@ -56,7 +54,6 @@ reg = <0x41>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; label = "CVB_ATX_12V"; diff --git a/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi b/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi index bf315d6..cb2cfa5 100644 --- a/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi +++ b/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi @@ -190,7 +190,6 @@ reg = <0x40>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; label = "VDD_IN";