From d5f38ecfe702ee3087d321b61f7819ead06aba7d Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Fri, 27 Oct 2023 11:03:08 +0100 Subject: [PATCH] t23x: nv-public: Update ina3221 properties The ina3221 driver has been updated to pull in the latest upstream changes. The property 'summation-bypass' has been replaced with 'ti,summation-disable' in upstream and so update the device-tree accordingly. Finally, remove the 'io-channel-cells' property because this is not used at all and hence not needed. Bug 3851858 Change-Id: Id1c1e7e994b185167f7b17ae682e26cb886f2704 Signed-off-by: Jon Hunter Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3005677 (cherry picked from commit 4fdf4e123bac8237406adc839b1c245d59aa6287) Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3005156 GVS: Gerrit_Virtual_Submit Reviewed-by: Yi-Wei Wang Reviewed-by: Ninad Malwade --- nv-platform/tegra234-p3701-0000.dtsi | 4 +--- nv-platform/tegra234-p3701-0008.dtsi | 5 +---- nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi | 1 - 3 files changed, 2 insertions(+), 8 deletions(-) diff --git a/nv-platform/tegra234-p3701-0000.dtsi b/nv-platform/tegra234-p3701-0000.dtsi index 90d08d9..4a80e9d 100644 --- a/nv-platform/tegra234-p3701-0000.dtsi +++ b/nv-platform/tegra234-p3701-0000.dtsi @@ -11,7 +11,6 @@ reg = <0x40>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; label = "VDD_GPU_SOC"; @@ -26,7 +25,7 @@ reg = <0x2>; label = "VIN_SYS_5V0"; shunt-resistor-micro-ohms = <2000>; - summation-bypass; + ti,summation-disable; }; }; @@ -35,7 +34,6 @@ reg = <0x41>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; status = "disabled"; diff --git a/nv-platform/tegra234-p3701-0008.dtsi b/nv-platform/tegra234-p3701-0008.dtsi index 14a6f04..a15356a 100644 --- a/nv-platform/tegra234-p3701-0008.dtsi +++ b/nv-platform/tegra234-p3701-0008.dtsi @@ -9,7 +9,6 @@ reg = <0x40>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; label = "VDD_GPU_SOC"; @@ -24,7 +23,7 @@ reg = <0x2>; label = "VIN_SYS_5V0"; shunt-resistor-micro-ohms = <2000>; - summation-bypass; + ti,summation-disable; }; }; @@ -33,7 +32,6 @@ reg = <0x41>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; status = "disabled"; @@ -56,7 +54,6 @@ reg = <0x41>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; label = "CVB_ATX_12V"; diff --git a/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi b/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi index bf315d6..cb2cfa5 100644 --- a/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi +++ b/nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi @@ -190,7 +190,6 @@ reg = <0x40>; #address-cells = <1>; #size-cells = <0>; - #io-channel-cells = <1>; channel@0 { reg = <0x0>; label = "VDD_IN";