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dt: soc: t234: add iommu mappings for vi&isp units

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Access the syncpoint shim and gos (if any) via SMMU.

Bug 4152947

Signed-off-by: Evgeny Kornev <ekornev@nvidia.com>
Change-Id: Id78bd8615587691f548b7ec2628d6ffc049053b6
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3099100
Tested-by: Pratik Prajapati <pratikp@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
This commit is contained in:
Evgeny Kornev
2024-03-18 21:09:23 +02:00
committed by mobile promotions
parent 377286e967
commit d7ce420bbc
1 changed files with 7 additions and 1 deletions
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8
nv-soc/tegra234-soc-camera.dtsi
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@@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
// SPDX-FileCopyrightText: Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. // SPDX-FileCopyrightText: Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/* /*
* tegra234-soc-camera.dtsi: Camera RTCPU DTSI file. * tegra234-soc-camera.dtsi: Camera RTCPU DTSI file.
@@ -36,6 +36,8 @@
compatible = "nvidia,tegra234-vi-thi"; compatible = "nvidia,tegra234-vi-thi";
resets = <&bpmp TEGRA234_RESET_VI>; resets = <&bpmp TEGRA234_RESET_VI>;
reset-names = "vi0_thi"; reset-names = "vi0_thi";
iommus = <&smmu_iso TEGRA234_SID_ISO_VI>;
non-coherent;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2FALR &emc>, interconnects = <&mc TEGRA234_MEMORY_CLIENT_VI2FALR &emc>,
<&mc TEGRA234_MEMORY_CLIENT_VI2FALW &emc>; <&mc TEGRA234_MEMORY_CLIENT_VI2FALW &emc>;
interconnect-names = "dma-mem", "write"; interconnect-names = "dma-mem", "write";
@@ -60,6 +62,8 @@
compatible = "nvidia,tegra234-vi-thi"; compatible = "nvidia,tegra234-vi-thi";
resets = <&bpmp TEGRA234_RESET_VI2>; resets = <&bpmp TEGRA234_RESET_VI2>;
reset-names = "vi1_thi"; reset-names = "vi1_thi";
iommus = <&smmu_iso TEGRA234_SID_ISO_VI2>;
non-coherent;
interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIFALR &emc>, interconnects = <&mc TEGRA234_MEMORY_CLIENT_VIFALR &emc>,
<&mc TEGRA234_MEMORY_CLIENT_VIFALW &emc>; <&mc TEGRA234_MEMORY_CLIENT_VIFALW &emc>;
interconnect-names = "dma-mem", "write"; interconnect-names = "dma-mem", "write";
@@ -85,6 +89,8 @@
isp_thi: isp-thi@14b00000 { isp_thi: isp-thi@14b00000 {
compatible = "nvidia,tegra194-isp-thi"; compatible = "nvidia,tegra194-isp-thi";
resets = <&bpmp TEGRA234_RESET_ISP>; resets = <&bpmp TEGRA234_RESET_ISP>;
iommus = <&smmu_niso1 TEGRA234_SID_ISP>;
dma-coherent;
status = "okay"; status = "okay";
}; };