From deaf369054a67e59b98bee8a492975d9d4c257f6 Mon Sep 17 00:00:00 2001 From: haotienh Date: Mon, 16 Oct 2023 05:53:03 +0000 Subject: [PATCH] dt: xusb: prod settings in new format Add prod setting properties for all fields aligned to new format. Bug 4099482 Change-Id: Ic4f833e7dc51ec7ce8acf720b77af7da92b38e1b Signed-off-by: haotienh Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2997806 Reviewed-by: svcacv Reviewed-by: Laxman Dewangan GVS: Gerrit_Virtual_Submit --- overlay/tegra234-p3701-0000-prod-overlay.dtsi | 13 ++++++++++++- overlay/tegra234-soc-prod-overlay.dtsi | 5 ++++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/overlay/tegra234-p3701-0000-prod-overlay.dtsi b/overlay/tegra234-p3701-0000-prod-overlay.dtsi index f201430..692cf1e 100644 --- a/overlay/tegra234-p3701-0000-prod-overlay.dtsi +++ b/overlay/tegra234-p3701-0000-prod-overlay.dtsi @@ -293,10 +293,21 @@ }; }; - xusb_padctl@3520000 { + padctl@3520000 { prod-settings { #prod-cells = <4>; prod { + nvidia,xusb-pad0-ls-rise-slew = <0x6>; + nvidia,xusb-pad0-ls-fall-slew = <0x6>; + nvidia,xusb-pad0-hs-txeq = <0x2>; + nvidia,xusb-pad1-ls-rise-slew = <0x6>; + nvidia,xusb-pad1-ls-fall-slew = <0x6>; + nvidia,xusb-pad1-hs-txeq = <0x2>; + nvidia,xusb-pad2-ls-rise-slew = <0x6>; + nvidia,xusb-pad2-ls-fall-slew = <0x6>; + nvidia,xusb-pad2-hs-txeq = <0x0>; + nvidia,xusb-pad3-ls-rise-slew = <0x6>; + nvidia,xusb-pad3-ls-fall-slew = <0x6>; board { prod = < 0 0x00000088 0x01fe0000 0x00cc0000 //XUSB_PADCTL_USB2_OTG_PAD0_CTL_0_0 diff --git a/overlay/tegra234-soc-prod-overlay.dtsi b/overlay/tegra234-soc-prod-overlay.dtsi index e3f8e74..2fd4cd7 100644 --- a/overlay/tegra234-soc-prod-overlay.dtsi +++ b/overlay/tegra234-soc-prod-overlay.dtsi @@ -816,10 +816,13 @@ }; }; - xusb_padctl@3520000 { + padctl@3520000 { prod-settings { #prod-cells = <4>; prod { + nvidia,xusb-pad-hs-discon-level = <0x7>; + nvidia,xusb-pad-trk-start-timer = <0x1e>; + nvidia,xusb-pad-trk-reset-timer = <0xa>; prod = < 0 0x00000284 0x00000038 0x00000038 //XUSB_PADCTL_USB2_BIAS_PAD_CTL_0_0 0 0x00000288 0x03fff000 0x0051e000>; //XUSB_PADCTL_USB2_BIAS_PAD_CTL_1_0