diff --git a/overlay/tegra234-camera-p3762-a00.dtsi b/overlay/tegra234-camera-p3762-a00.dtsi
index 918dbf1..64b9c6a 100644
--- a/overlay/tegra234-camera-p3762-a00.dtsi
+++ b/overlay/tegra234-camera-p3762-a00.dtsi
@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-only
-// SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-FileCopyrightText: Copyright (c) 2023-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 
 /* 12 camera module with 4 hawks and 4 Owls
  * HAWK1 - 2 ar0234 cameras - max96712 Aggregator 1 - GMSL0
@@ -750,6 +750,8 @@
 				};
 				/*i2c8*/
 				i2c@31e0000 {
+					/* Set i2c freq to 400khz */
+					clock-frequency = <400000>;
 					virtual_i2c_mux@50 {
 						i2c@0 {
 							ar0234_a@30 {
diff --git a/overlay/tegra234-camera-p3783-a00.dtsi b/overlay/tegra234-camera-p3783-a00.dtsi
index e64a856..c31e907 100644
--- a/overlay/tegra234-camera-p3783-a00.dtsi
+++ b/overlay/tegra234-camera-p3783-a00.dtsi
@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-only
-// SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// SPDX-FileCopyrightText: Copyright (c) 2023-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 
 /* 12 camera module with 4 hawks and 4 Owls
  * HAWK1 - 2 ar0234 cameras - max96712 Aggregator 1 - GMSL0
@@ -750,6 +750,8 @@
 				};
 				/*i2c8*/
 				i2c@31e0000 {
+					/* Set i2c freq to 400khz */
+					clock-frequency = <400000>;
 					virtual_i2c_mux@50 {
 						i2c@0 {
 							ar0234_a@30 {
diff --git a/overlay/tegra234-p3737-camera-p3762-a00-overlay.dts b/overlay/tegra234-p3737-camera-p3762-a00-overlay.dts
index 2ccbc2b..a3a1e08 100644
--- a/overlay/tegra234-p3737-camera-p3762-a00-overlay.dts
+++ b/overlay/tegra234-p3737-camera-p3762-a00-overlay.dts
@@ -171,7 +171,7 @@
 								       <&bpmp TEGRA234_CLK_EXTPERIPH1>;
 								clock-names = "extperiph1", "pllp_grtba";
 								mclk = "extperiph1";
-								channel = "c";
+								channel = "a";
 								has-eeprom;
 								eeprom-addr = <0x40>;
 								reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -209,7 +209,7 @@
 								       <&bpmp TEGRA234_CLK_EXTPERIPH1>;
 								clock-names = "extperiph1", "pllp_grtba";
 								mclk = "extperiph1";
-								channel = "c";
+								channel = "a";
 								has-eeprom;
 								eeprom-addr = <0x42>;
 								reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -241,7 +241,7 @@
 								       <&bpmp TEGRA234_CLK_EXTPERIPH1>;
 								clock-names = "extperiph1", "pllp_grtba";
 								mclk = "extperiph1";
-								channel = "c";
+								channel = "a";
 								has-eeprom;
 								eeprom-addr = <0x44>;
 								reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -273,7 +273,7 @@
 								       <&bpmp TEGRA234_CLK_EXTPERIPH1>;
 								clock-names = "extperiph1", "pllp_grtba";
 								mclk = "extperiph1";
-								channel = "c";
+								channel = "a";
 								has-eeprom;
 								eeprom-addr = <0x46>;
 								reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;