From fb8cabec2a96a954bebd450d70a02d96735f5053 Mon Sep 17 00:00:00 2001 From: Asha Talambedu Date: Fri, 24 Jun 2022 14:20:49 +0530 Subject: [PATCH] dt-common: Add AGX Orin Dev Kit SKU4 variant ref DT header file is modified for supporting overlays on Jetson AGX Orin Developer Kit platform's SKU4 variant. The file adds the necessary board compatible string Bug 3689332 Change-Id: I75116202b0afa9c305ebe023b75139392d60e822 Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/tegra/+/2734824 (cherry picked from commit 08093f59bf3ba2c3d2c6d7abaf6733f8bcc2ce47) Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/tegra/+/2741673 Tested-by: Asha Talambedu Reviewed-by: Asha Talambedu Reviewed-by: Sameer Pujar Reviewed-by: Viswanath L Reviewed-by: Sharad Gupta --- include/platforms/dt-bindings/tegra234-p3737-0000+p3701-0000.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/platforms/dt-bindings/tegra234-p3737-0000+p3701-0000.h b/include/platforms/dt-bindings/tegra234-p3737-0000+p3701-0000.h index 884c531..2625f34 100644 --- a/include/platforms/dt-bindings/tegra234-p3737-0000+p3701-0000.h +++ b/include/platforms/dt-bindings/tegra234-p3737-0000+p3701-0000.h @@ -20,7 +20,7 @@ #include -#define JETSON_COMPATIBLE "nvidia,p3737-0000+p3701-0000" +#define JETSON_COMPATIBLE "nvidia,p3737-0000+p3701-0000", "nvidia,p3737-0000+p3701-0004" /* SoC function name for clock signal on 40-pin header pin 7 */ #define HDR40_CLK "extperiph4"