// SPDX-License-Identifier: GPL-2.0-only
// SPDX-FileCopyrightText: Copyright (c) 2017-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.

#include <dt-bindings/clock/tegra234-clock.h>
#include <dt-bindings/gpio/tegra234-gpio.h>
#include "tegra234-camera-imx274-dual.dtsi"

#define CAM0_RST_L	TEGRA234_MAIN_GPIO(H, 3)
#define CAM0_PWDN	TEGRA234_MAIN_GPIO(E, 6)

/* camera control gpio definitions */
/ {
	fragment-camera-dual-imx274@0 {
		target-path = "/bus@0";
		__overlay__ {
			gpio@2200000 {
				camera-control-output-low {
					gpio-hog;
					output-low;
					gpios = <CAM0_RST_L GPIO_ACTIVE_HIGH CAM0_PWDN GPIO_ACTIVE_HIGH>;
					label = "cam0-rst", "cam0-pwdn";
				};
			};
			i2c@3180000 {
				tca9546@70 {
					compatible = "nxp,pca9546";
					reg = <0x70>;
					#address-cells = <1>;
					#size-cells = <0>;
					skip_mux_detect = "yes";
					vcc-supply = <&vdd_1v8_ls>;
					i2c@0 {
						reg = <0>;
						i2c-mux,deselect-on-exit;
						#address-cells = <1>;
						#size-cells = <0>;
						imx274_a@1a {
							/* Define any required hw resources needed by driver */
							/* ie. clocks, io pins, power sources */
							clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
									<&bpmp TEGRA234_CLK_EXTPERIPH1>;
							clock-names = "extperiph1", "pllp_grtba";
							mclk = "extperiph1";
							reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
						};
					};
					i2c@1 {
						reg = <1>;
						i2c-mux,deselect-on-exit;
						#address-cells = <1>;
						#size-cells = <0>;
						imx274_c@1a {
							/* Define any required hw resources needed by driver */
							/* ie. clocks, io pins, power sources */
							clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
									<&bpmp TEGRA234_CLK_EXTPERIPH1>;
							clock-names = "extperiph1", "pllp_grtba";
							mclk = "extperiph1";
							reset-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
						};
					};
				};
			};
		};
	};
};