mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
5767db6887
1. Add missing properties to enable C5 PCIe EP on P3737 2. Also add missing properties for some old p3737 boards Bug 4428373 Change-Id: Ic7a6a36c6874a1d42fe903ce726b8aa075d108c4 Signed-off-by: Wayne Wang(SW-TEGRA) <waywang@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3040254 Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Brad Griffis <bgriffis@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
125 lines
3.0 KiB
Devicetree
125 lines
3.0 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2023-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/tegra234-gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "tegra234-p3737-camera-modules.dtsi"
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/ {
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overlay-name = "Tegra234 p3737-0000+p3701-xxxx Dynamic Overlay";
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fragment-t234-p3737-0000-p3701-0000@0 {
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target-path = "/";
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board_config {
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ids = ">=3737-0000-TS4", ">=3737-0000-RC1", ">=3737-0000-300";
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};
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__overlay__ {
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bus@0 {
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i2c@31e0000 {
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rt5640: audio-codec@1c {
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#sound-dai-cells = <1>;
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status = "okay";
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};
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};
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};
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sound {
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nvidia-audio-card,widgets =
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"Headphone", "CVB-RT Headphone Jack",
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"Microphone", "CVB-RT Mic Jack",
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"Speaker", "CVB-RT Int Spk",
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"Microphone", "CVB-RT Int Mic";
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nvidia-audio-card,routing =
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"CVB-RT Headphone Jack", "CVB-RT HPOL",
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"CVB-RT Headphone Jack", "CVB-RT HPOR",
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"CVB-RT IN1P", "CVB-RT Mic Jack",
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"CVB-RT IN2P", "CVB-RT Mic Jack",
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"CVB-RT Int Spk", "CVB-RT SPOLP",
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"CVB-RT Int Spk", "CVB-RT SPORP",
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"CVB-RT DMIC1", "CVB-RT Int Mic",
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"CVB-RT DMIC2", "CVB-RT Int Mic";
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nvidia-audio-card,dai-link@76 {
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link-name = "rt5640-playback";
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codec {
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sound-dai = <&rt5640 0>;
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prefix = "CVB-RT";
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};
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};
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};
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};
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};
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fragment-t234-p3737-0000-p3701-0000@1 {
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target-path = "/";
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board_config {
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ids = "3737-0000-TS1","3737-0000-TS2","3737-0000-TS3","3737-0000-EB1","3737-0000-EB2","3737-0000-EB3","3737-0000-000","3737-0000-100","3737-0000-200";
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};
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__overlay__ {
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bus@0{
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i2c@c240000 {
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typec@8 {
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interrupt-parent = <&gpio_aon>;
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interrupts = <TEGRA234_AON_GPIO(BB, 2) IRQ_TYPE_LEVEL_LOW>;
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};
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};
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pcie-ep@141a0000 {
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nvidia,refclk-select-gpios = <&gpio_aon
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TEGRA234_AON_GPIO(AA, 4)
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GPIO_ACTIVE_HIGH>;
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};
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};
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regulator-vdd-3v3-pcie {
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gpio = <&gpio TEGRA234_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
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};
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};
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};
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/* PCIe 12V supply through NCP for TS3 */
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fragment-t234-p3737-0000-p3701-0000@2 {
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target-path = "/";
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board_config {
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ids = "3737-0000-TS3","3737-0000-200","3737-0000-300","3737-0000-EB3";
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};
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__overlay__ {
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bus@0{
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i2c@c240000 {
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ncp_12v_pcie_supply: ncp81599@74 {
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compatible = "nvidia,ncp81599";
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reg = <0x74>;
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regulator-name = "ncp81599";
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ncp81599-supply = <&vdd_5v0_sys>;
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status = "okay";
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};
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};
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pcie@141a0000 {
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vpcie12v-supply = <&ncp_12v_pcie_supply>;
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};
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pcie-ep@141a0000 {
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vpcie12v-supply = <&ncp_12v_pcie_supply>;
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};
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};
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};
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};
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/* PCIe C5 endpoint */
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fragment-t234-p3737-0000-p3701-0000-pcie-c5-ep@0 {
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target-path = "/bus@0";
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board_config {
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odm-data = "nvhs-uphy-config-1";
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};
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__overlay__ {
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pcie@141a0000 {
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status = "disabled";
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};
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pcie-ep@141a0000 {
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status = "okay";
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};
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};
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};
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};
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