mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
024feb9113
Bug 3793131 Change-Id: Icb7e7b61bbc55089ac2976b8c7e5babab5b695b5 Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/platform/t23x/concord-generic-dts/+/2808888 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
309 lines
6.4 KiB
Devicetree
309 lines
6.4 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/dts-v1/;
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/plugin/;
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#include "overlay/tegra234-soc-overlay.dtsi"
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#include "tegra234-p3737-0000.dtsi"
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#include "tegra234-p3701-0000.dtsi"
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#include "overlay/tegra234-audio-dai-links-overlay.dtsi"
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#include "tegra234-dcb-p3737-0000-p3701-0000.dtsi"
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/ {
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fragment-t234-p3737-p3701@0 {
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target-path = "/bpmp/i2c";
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__overlay__ {
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vrs@3c {
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compatible = "nvidia,vrs-pseq";
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reg = <0x3c>;
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interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <3>;
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status = "okay";
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vrs_rtc: rtc {
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status = "okay";
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};
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};
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};
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};
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fragment-t234-p3737-p3701@1 {
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target-path = "/bus@0/i2c@3160000";
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__overlay__ {
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status = "okay";
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};
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};
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fragment-t234-p3737-p3701@2 {
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target-path = "/bus@0/i2c@c240000";
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__overlay__ {
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status = "okay";
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};
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};
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fragment-t234-p3737-p3701@3 {
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target-path = "/bus@0/i2c@3180000";
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__overlay__ {
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status = "okay";
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};
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};
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fragment-t234-p3737-p3701@4 {
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target-path = "/bus@0/i2c@3190000";
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__overlay__ {
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status = "okay";
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};
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};
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fragment-t234-p3737-p3701@5 {
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target-path = "/bus@0/i2c@31b0000";
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__overlay__ {
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nvidia,hw-instance-id = <0x5>;
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status = "okay";
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};
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};
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fragment-t234-p3737-p3701@6 {
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target-path = "/bus@0/i2c@31c0000";
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__overlay__ {
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status = "okay";
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};
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};
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fragment-t234-p3737-p3701@7 {
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target-path = "/bus@0/i2c@c250000";
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__overlay__ {
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status = "okay";
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};
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};
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fragment-t234-p3737-p3701@8 {
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target-path = "/bus@0/i2c@31e0000";
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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rt5640: rt5640.8-001c@1c {
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compatible = "realtek,rt5640";
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reg = <0x1c>;
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clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
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clock-names = "mclk";
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realtek,dmic1-data-pin = <0>; /* RT5659_DMIC1_NULL */
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realtek,dmic2-data-pin = <0>; /* RT5659_DMIC2_NULL */
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realtek,jack-detect-source = <7>;
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#sound-dai-cells = <1>;
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sound-name-prefix = "CVB-RT";
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status = "okay";
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};
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};
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};
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fragment-t234-p3737-p3701@9 {
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target-path = "/";
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__overlay__ {
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sound {
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compatible = "nvidia,tegra186-ape";
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clocks = <&bpmp TEGRA234_CLK_PLLA>,
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<&bpmp TEGRA234_CLK_PLLA_OUT0>,
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<&bpmp TEGRA234_CLK_AUD_MCLK>;
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clock-names = "pll_a", "pll_a_out0", "extern1";
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assigned-clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
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assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
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nvidia-audio-card,name = "NVIDIA Jetson AGX Orin APE";
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nvidia-audio-card,widgets =
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"Headphone", "CVB-RT Headphone Jack",
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"Microphone", "CVB-RT Mic Jack",
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"Speaker", "CVB-RT Int Spk",
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"Microphone", "CVB-RT Int Mic";
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nvidia-audio-card,routing =
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"CVB-RT Headphone Jack", "CVB-RT HPOL",
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"CVB-RT Headphone Jack", "CVB-RT HPOR",
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"CVB-RT IN1P", "CVB-RT Mic Jack",
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"CVB-RT IN2P", "CVB-RT Mic Jack",
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"CVB-RT Int Spk", "CVB-RT SPOLP",
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"CVB-RT Int Spk", "CVB-RT SPORP",
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"CVB-RT DMIC1", "CVB-RT Int Mic",
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"CVB-RT DMIC2", "CVB-RT Int Mic";
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nvidia-audio-card,mclk-fs = <256>;
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nvidia-audio-card,dai-link@76 {
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link-name = "rt5640-playback";
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codec {
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sound-dai = <&rt5640 0>;
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prefix = "CVB-RT";
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};
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};
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma { /* Needed for nvgpu comptags */
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compatible = "shared-dma-pool";
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reusable;
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size = <0x0 0x10000000>; /* 256MB */
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alignment = <0x0 0x10000>;
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linux,cma-default;
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status = "okay";
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};
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};
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};
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};
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fragment-t234-p3737-p3701@10 {
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target-path = "/cpus";
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__overlay__ {
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cpu_core_power_states {
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C1: c1 {
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compatible = "arm,idle-state";
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state-name = "Clock gated";
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wakeup-latency-us = <1>;
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min-residency-us = <1>;
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status = "okay";
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};
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C7: c7 {
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compatible = "arm,idle-state";
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state-name = "Core powergate";
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wakeup-latency-us = <5000>;
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arm,psci-suspend-param= <0x40000007>;
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min-residency-us = <30000>;
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status = "okay";
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};
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};
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};
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};
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fragment-t234-p3737-p3701@11 {
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target-path = "/cpus/cpu@0";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@12 {
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target-path = "/cpus/cpu@100";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@13 {
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target-path = "/cpus/cpu@200";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@14 {
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target-path = "/cpus/cpu@300";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@15 {
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target-path = "/cpus/cpu@10000";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@16 {
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target-path = "/cpus/cpu@10100";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@17 {
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target-path = "/cpus/cpu@10200";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@18 {
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target-path = "/cpus/cpu@10300";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@19 {
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target-path = "/cpus/cpu@20000";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@20 {
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target-path = "/cpus/cpu@20100";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@21 {
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target-path = "/cpus/cpu@20200";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@22 {
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target-path = "/cpus/cpu@20300";
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__overlay__ {
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cpu-idle-states = <&C7>;
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};
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};
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fragment-t234-p3737-p3701@23 {
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target-path = "/bus@0";
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__overlay__ {
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ethernet@6800000 {
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status = "okay";
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nvidia,mac-addr-idx = <0>;
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nvidia,max-platform-mtu = <16383>;
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/* 1=enable, 0=disable */
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nvidia,pause_frames = <1>;
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phy-handle = <&mgbe0_aqr113c_phy>;
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phy-mode = "10gbase-r";
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/* 0:XFI 10G, 1:XFI 5G, 2:USXGMII 10G, 3:USXGMII 5G */
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nvidia,phy-iface-mode = <0>;
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nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(Y, 1) 0>;
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nvidia,mdio_addr = <0>;
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mdio {
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compatible = "nvidia,eqos-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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mgbe0_aqr113c_phy: ethernet_phy@0 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <0x0>;
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nvidia,phy-rst-pdelay-msec = <150>; /* msec */
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nvidia,phy-rst-duration-usec = <221000>; /* usec */
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA234_MAIN_GPIO(Y, 3) IRQ_TYPE_LEVEL_LOW>;
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};
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};
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};
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};
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};
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};
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