mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
2039982712
UEFI needs this data under protected cpubl-dtb to determine green state. The value is test key only and will be overriden on signing server. Bug 4264841 Change-Id: I9897c06e2f191abf619a734caecad33f33848d8d Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3262316 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Yijun Zhou <yijunz@nvidia.com> Reviewed-by: Byungkuk Seo <bseo@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
152 lines
3.2 KiB
Devicetree
152 lines
3.2 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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//
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// This file contains the DT nodes of T234 which are not in base/tegra234.dtsi
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/tegra234-android-bootargs.h>
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/ {
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fragment-t234-android@0 {
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target-path = "/";
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__overlay__ {
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firmware {
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android {
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compatible = "android,firmware";
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first_stage_delay = "1";
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};
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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status = "okay";
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};
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uefi {
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use-partition-name-suffixes;
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};
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};
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chosen {
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use_dts_cmdline;
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bootargs = ANDROID_BOOTARGS;
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bootconfig = ANDROID_BOOTCONFIG;
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/* Test key hash, will got overriden on signing server */
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avb_key0_sha1 = <0x2597c218 0xaae470a1 0x30f61162 0xfeaae70a 0xfd97f011>;
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/* RSA2K = 520, RSA4K = 1032, RSA8K = 2056 */
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avb_key0_size = <1032>;
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};
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bus@0 {
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ethernet@6800000 {
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status = "okay";
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};
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ethernet@6900000 {
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status = "okay";
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};
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ethernet@6a00000 {
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status = "okay";
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};
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ethernet@6b00000 {
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status = "okay";
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};
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/* SPI1, 40pin header, Pin 19(MOSIsdd, Pin 21(MISO), Pin 23(CLK), Pin 24(CS) */
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spi@3210000 {
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status = "okay";
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spi@0 {
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compatible = "tegra-spidev";
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reg = <0x0>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,enable-hw-based-cs;
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nvidia,rx-clk-tap-delay = <0x10>;
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nvidia,tx-clk-tap-delay = <0x0>;
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};
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};
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spi@1 {
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compatible = "tegra-spidev";
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reg = <0x1>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,enable-hw-based-cs;
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nvidia,rx-clk-tap-delay = <0x10>;
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nvidia,tx-clk-tap-delay = <0x0>;
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};
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};
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};
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/* SPI3, 40pin header, Pin 37(MOSI), Pin 22(MISO), Pin 13(CLK), Pin 18(CS) */
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spi@3230000 {
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status = "okay";
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spi@0 {
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compatible = "tegra-spidev";
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reg = <0x0>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,enable-hw-based-cs;
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nvidia,rx-clk-tap-delay = <0x10>;
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nvidia,tx-clk-tap-delay = <0x0>;
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};
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};
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spi@1 {
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compatible = "tegra-spidev";
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reg = <0x1>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,enable-hw-based-cs;
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nvidia,rx-clk-tap-delay = <0x10>;
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nvidia,tx-clk-tap-delay = <0x0>;
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};
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};
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};
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serial@3100000 {
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dma-coherent;
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dmas = <&gpcdma 8>, <&gpcdma 8>;
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dma-names = "rx", "tx";
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};
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serial@3110000 {
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dma-coherent;
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dmas = <&gpcdma 8>, <&gpcdma 8>;
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dma-names = "rx", "tx";
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};
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serial@3140000 {
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dma-coherent;
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dmas = <&gpcdma 8>, <&gpcdma 8>;
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dma-names = "rx", "tx";
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};
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host1x@13e00000 {
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crypto@15810000 {
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status = "disabled";
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};
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crypto@15820000 {
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status = "disabled";
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};
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crypto@15840000 {
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status = "disabled";
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};
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};
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};
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display@13800000 {
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hdcp_enabled;
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status = "okay";
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};
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};
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};
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fragment-t234-android@1 {
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target-path = "/bus@0/mmc@3400000";
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delete_prop = "sd-uhs-ddr50";
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};
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};
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