mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
In Jetson-IO, I2C and UART pins are configured by default, and there is no option to disable or display them as enabled. By adding the appropriate "nvidia,function" value, Jetson-IO updates the "Configure header pins manually" section to show the pin state, allowing the user to enable or disable these pins. Also, add the input and tristate values so that the pin can be enabled back to the right configuration. Bug 3866629 Change-Id: I2c01ac7355259e4a3e0a10905699b5dfbbbaf177 Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3219025 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Sheetal . <sheetal@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
237 lines
6.9 KiB
Devicetree
237 lines
6.9 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2021-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/*
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* Device-tree overlay for tegra234-p3737-0000-p3701-0000 40-pin
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* Expansion Header.
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/pinctrl/pinctrl-tegra.h>
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#include <dt-bindings/tegra234-p3737-0000+p3701-0000.h>
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/ {
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overlay-name = "Jetson 40pin Header";
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compatible = JETSON_COMPATIBLE;
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p3737-0000_p3701-0000-hdr40@0 {
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target = <&pinmux>;
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&jetson_io_pinmux>;
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jetson_io_pinmux: exp-header-pinmux {
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hdr40-pin7 {
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nvidia,pins = "soc_gpio33_pq6";
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nvidia,function = "extperiph4";
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nvidia,pin-group = "extperiph4_clk";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin8 {
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nvidia,pins = "uart1_tx_pr2";
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nvidia,function = "uarta";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin10 {
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nvidia,pins = "uart1_rx_pr3";
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nvidia,function = "uarta";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin11 {
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nvidia,pins = "uart1_rts_pr4";
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nvidia,function = "uarta";
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nvidia,pin-group = "uarta-cts/rts";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin12 {
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nvidia,pins = "soc_gpio41_ph7";
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nvidia,function = "i2s2";
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nvidia,pin-label = "i2s2_sclk";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin13 {
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nvidia,pins = "soc_gpio37_pr0";
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nvidia,function = "gp";
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nvidia,pin-group = "pwm8";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin15 {
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nvidia,pins = "soc_gpio39_pn1";
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nvidia,function = "gp";
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nvidia,pin-group = "pwm1";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin18 {
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nvidia,pins = "soc_gpio21_ph0";
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nvidia,function = "gp";
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nvidia,pin-group = "pwm5";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin19 {
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nvidia,pins = "spi1_mosi_pz5";
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nvidia,function = "spi1";
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nvidia,pin-label = "spi1_dout";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin21 {
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nvidia,pins = "spi1_miso_pz4";
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nvidia,function = "spi1";
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nvidia,pin-label = "spi1_din";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin23 {
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nvidia,pins = "spi1_sck_pz3";
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nvidia,function = "spi1";
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nvidia,pin-label = "spi1_sck";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin24 {
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nvidia,pins = "spi1_cs0_pz6";
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nvidia,function = "spi1";
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nvidia,pin-label = "spi1_cs0";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin26 {
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nvidia,pins = "spi1_cs1_pz7";
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nvidia,function = "spi1";
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nvidia,pin-label = "spi1_cs1";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin35 {
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nvidia,pins = "soc_gpio44_pi2";
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nvidia,function = "i2s2";
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nvidia,pin-label = "i2s2_fs";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin36 {
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nvidia,pins = "uart1_cts_pr5";
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nvidia,function = "uarta";
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nvidia,pin-group = "uarta-cts/rts";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin38 {
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nvidia,pins = "soc_gpio43_pi1";
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nvidia,function = "i2s2";
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nvidia,pin-label = "i2s2_din";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin40 {
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nvidia,pins = "soc_gpio42_pi0";
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nvidia,function = "i2s2";
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nvidia,pin-label = "i2s2_dout";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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};
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};
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};
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fragment@1 {
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target = <&pinmux_aon>;
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&jetson_io_pinmux_aon>;
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jetson_io_pinmux_aon: exp-header-pinmux {
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hdr40-pin3 {
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nvidia,pins = "gen8_i2c_scl_pdd1";
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nvidia,pin-label = "i2c8";
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nvidia,function = "i2c8";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin5 {
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nvidia,pins = "gen8_i2c_sda_pdd2";
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nvidia,pin-label = "i2c8";
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nvidia,function = "i2c8";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin16a {
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nvidia,pins = "can1_en_pbb1";
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nvidia,function = "dmic3";
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nvidia,pin-label = "dmic3_dat";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin16b {
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nvidia,pins = "can1_en_pbb1";
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nvidia,function = "dmic5";
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nvidia,pin-label = "dmic5_dat";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin27 {
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nvidia,pins = "gen2_i2c_sda_pdd0";
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nvidia,function = "i2c2";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin28 {
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nvidia,pins = "gen2_i2c_scl_pcc7";
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nvidia,function = "i2c2";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin29 {
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nvidia,pins = "can0_din_paa1";
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nvidia,function = "can0";
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nvidia,pin-label = "can0_din";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hdr40-pin31 {
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nvidia,pins = "can0_dout_paa0";
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nvidia,function = "can0";
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nvidia,pin-label = "can0_dout";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin32a {
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nvidia,pins = "can1_stb_pbb0";
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nvidia,function = "dmic3";
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nvidia,pin-label = "dmic3_clk";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin32b {
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nvidia,pins = "can1_stb_pbb0";
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nvidia,function = "dmic5";
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nvidia,pin-label = "dmic5_clk";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin33 {
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nvidia,pins = "can1_dout_paa2";
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nvidia,function = "can1";
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nvidia,pin-label = "can1_dout";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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hdr40-pin37 {
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nvidia,pins = "can1_din_paa3";
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nvidia,function = "can1";
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nvidia,pin-label = "can1_din";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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};
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};
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};
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};
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