mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
34a5de4f2c
Add IGX500 dts support to nv-public Bug 5018940 Change-Id: Ida4a7de3d060dc660acbbdbf9b5020ba198dc5d3 Signed-off-by: Hiteshkumar Patel <hiteshkumarg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3271404 Reviewed-by: svcacv <svcacv@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Dipen Patel <dipenp@nvidia.com> Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
67 lines
1.8 KiB
Devicetree
67 lines
1.8 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2017-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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#include <dt-bindings/clock/tegra234-clock.h>
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#include <dt-bindings/gpio/tegra234-gpio.h>
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#include "tegra234-camera-imx274-dual.dtsi"
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#define CAM0_RST_L TEGRA234_MAIN_GPIO(H, 3)
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#define CAM0_PWDN TEGRA234_MAIN_GPIO(E, 6)
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/* camera control gpio definitions */
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/ {
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fragment-camera-dual-imx274@0 {
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target-path = "/bus@0";
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__overlay__ {
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gpio@2200000 {
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camera-control-output-low {
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gpio-hog;
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output-low;
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gpios = <CAM0_RST_L GPIO_ACTIVE_HIGH CAM0_PWDN GPIO_ACTIVE_HIGH>;
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label = "cam0-rst", "cam0-pwdn";
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};
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};
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i2c@3180000 {
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tca9546@70 {
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compatible = "nxp,pca9546";
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reg = <0x70>;
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#address-cells = <1>;
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#size-cells = <0>;
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skip_mux_detect = "yes";
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vcc-supply = <&vdd_1v8_ls>;
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i2c@0 {
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reg = <0>;
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i2c-mux,deselect-on-exit;
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#address-cells = <1>;
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#size-cells = <0>;
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imx274_a@1a {
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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};
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};
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i2c@1 {
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reg = <1>;
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i2c-mux,deselect-on-exit;
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#address-cells = <1>;
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#size-cells = <0>;
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imx274_c@1a {
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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reset-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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};
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};
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};
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};
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};
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};
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};
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