mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
782ead6230
As part of the process to transitioning to a full featured
base dtb, we need the ability to include various files without
completely rewriting them. This will be an incremental step.
Eventually these preprocessor commands will be removed and
the indentation fixed.
This change is not intended to change any behavior. It is merely
adding the infrastructure for future patches. It will be possible
for a base dts file to define REMOVE_FRAGMENT_SYNTAX and directly
include these files.
Bug 4290389
Change-Id: I778bc25dcd7e4fa96f003882e34e38fe5aaf40e7
Signed-off-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2992336
(cherry picked from commit a011a22ad5)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3002425
Reviewed-by: Gautham Srinivasan <gauthams@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
233 lines
4.3 KiB
Devicetree
233 lines
4.3 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0
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// SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/dts-v1/;
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/plugin/;
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#include "tegra234-soc-safetyservice-fsicom.dtsi"
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/ {
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#ifndef REMOVE_FRAGMENT_SYNTAX
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fragment-t234-p3740-p3701-safety@0 {
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target-path = "/";
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__overlay__ {
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#endif
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compatible = "nvidia,p3740-0002+p3701-0008", "safety", "nvidia,p3701-0008", "nvidia,tegra234";
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bus@0 {
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i2c@3160000 {
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nvidia,epl-reporter-id = <0x8050>;
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};
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i2c@c240000 {
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nvidia,epl-reporter-id = <0x8051>;
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};
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i2c@3180000 {
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nvidia,epl-reporter-id = <0x8052>;
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};
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i2c@3190000 {
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nvidia,epl-reporter-id = <0x8053>;
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};
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i2c@31b0000 {
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nvidia,epl-reporter-id = <0x8054>;
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};
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i2c@31c0000 {
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nvidia,epl-reporter-id = <0x8056>;
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};
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i2c@c250000 {
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nvidia,epl-reporter-id = <0x8057>;
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};
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i2c@31e0000 {
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nvidia,epl-reporter-id = <0x8058>;
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};
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hsp_top2: hsp@1600000 {
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status = "okay";
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};
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spi@3230000 {
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compatible = "nvidia,tegra186-spi-slave";
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status = "okay";
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spi@0 {
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compatible = "nvidia,tegra-spidev";
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reg = <0>;
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spi-max-frequency = <50000000>;
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controller-data {
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nvidia,lsbyte-first;
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};
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};
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};
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};
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chosen {
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/*
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* The ideal approach for disabling rail-gating
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* for GPU should be deleting the power-domains
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* property in GPU node. But /delete-property/
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* is not a valid syntax in the device tree
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* overlay, the nvidia,tegra-joint_xpu_rail is
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* specified to achieve the same as an
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* alternative.
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*/
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nvidia,tegra-joint_xpu_rail;
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};
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cpus {
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idle-states {
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c7 {
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status = "disabled";
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};
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};
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};
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fsicom_client {
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status = "okay";
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};
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FsiComIvc {
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status = "okay";
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};
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/* FSI<->CCPLEX Communication through DRAM Carveout demo app */
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FsiComAppChConfApp1 {
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compatible = "nvidia,tegra-fsicom-sampleApp1";
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status = "okay";
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channelid_list = <3>;
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};
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hsierrrptinj {
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compatible = "nvidia,tegra23x-hsierrrptinj";
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mboxes = <&hsp_top0 (TEGRA_HSP_MBOX_TYPE_SM | TEGRA_HSP_MBOX_TYPE_SM_128BIT) TEGRA_HSP_SM_TX(1)>;
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mbox-names = "hsierrrptinj-tx";
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status = "okay";
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};
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safetyservices_epl_client {
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/* userspace app uses this driver to send error code */
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status = "okay";
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};
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thermal-zones {
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cpu-thermal {
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cooling-maps {
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map-cpufreq {
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cooling-device = <&cpu0_0 0 0>,
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<&cpu1_0 0 0>,
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<&cpu2_0 0 0>;
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};
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map-devfreq {
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cooling-device = <&ga10b 0 0>;
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};
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};
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};
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gpu-thermal {
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cooling-maps {
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map-cpufreq {
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cooling-device = <&cpu0_0 0 0>,
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<&cpu1_0 0 0>,
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<&cpu2_0 0 0>;
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};
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map-devfreq {
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cooling-device = <&ga10b 0 0>;
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};
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};
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};
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cv0-thermal {
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cooling-maps {
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map-cpufreq {
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cooling-device = <&cpu0_0 0 0>,
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<&cpu1_0 0 0>,
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<&cpu2_0 0 0>;
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};
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map-devfreq {
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cooling-device = <&ga10b 0 0>;
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};
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};
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};
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cv1-thermal {
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cooling-maps {
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map-cpufreq {
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cooling-device = <&cpu0_0 0 0>,
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<&cpu1_0 0 0>,
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<&cpu2_0 0 0>;
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};
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map-devfreq {
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cooling-device = <&ga10b 0 0>;
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};
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};
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};
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cv2-thermal {
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cooling-maps {
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map-cpufreq {
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cooling-device = <&cpu0_0 0 0>,
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<&cpu1_0 0 0>,
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<&cpu2_0 0 0>;
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};
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map-devfreq {
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cooling-device = <&ga10b 0 0>;
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};
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};
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};
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soc0-thermal {
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cooling-maps {
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map-cpufreq {
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cooling-device = <&cpu0_0 0 0>,
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<&cpu1_0 0 0>,
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<&cpu2_0 0 0>;
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};
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map-devfreq {
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cooling-device = <&ga10b 0 0>;
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};
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};
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};
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soc1-thermal {
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cooling-maps {
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map-cpufreq {
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cooling-device = <&cpu0_0 0 0>,
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<&cpu1_0 0 0>,
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<&cpu2_0 0 0>;
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};
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map-devfreq {
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cooling-device = <&ga10b 0 0>;
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};
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};
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};
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soc2-thermal {
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cooling-maps {
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map-cpufreq {
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cooling-device = <&cpu0_0 0 0>,
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<&cpu1_0 0 0>,
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<&cpu2_0 0 0>;
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};
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map-devfreq {
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cooling-device = <&ga10b 0 0>;
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};
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};
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};
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};
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#ifndef REMOVE_FRAGMENT_SYNTAX
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};
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};
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#endif
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};
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