mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/tegra-public-dts.git
synced 2025-12-22 17:28:39 +03:00
Merge common overlays from legacy DTS repo
Merge remote-tracking branch 'origin/dev/ldewangan/integrate-common-overlay' into merge-integrate-dev-main Change-Id: Ia040e750627927c6fd95fae9f925cffc3bf79a56
This commit is contained in:
Laxman Dewangan
49
overlay/jetson-adafruit-sph0645lm4h.dtsi
Normal file
49
overlay/jetson-adafruit-sph0645lm4h.dtsi
Normal file
@@ -0,0 +1,49 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Jetson Device-tree overlay for Adafruit I2S MEMS Microphone Breakout
|
||||
* (SPH0645LM4H).
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
|
||||
|
||||
/ {
|
||||
overlay-name = "Adafruit SPH0645LM4H";
|
||||
jetson-header-name = "Jetson 40pin Header";
|
||||
compatible = JETSON_COMPATIBLE;
|
||||
|
||||
fragment@0 {
|
||||
target = <&pinmux>;
|
||||
__overlay__ {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&jetson_io_pinmux>;
|
||||
|
||||
jetson_io_pinmux: exp-header-pinmux {
|
||||
hdr40-pin12 {
|
||||
nvidia,pins = HDR40_PIN12;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin35 {
|
||||
nvidia,pins = HDR40_PIN35;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin38 {
|
||||
nvidia,pins = HDR40_PIN38;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
49
overlay/jetson-adafruit-uda1334a.dtsi
Normal file
49
overlay/jetson-adafruit-uda1334a.dtsi
Normal file
@@ -0,0 +1,49 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2021-2023 NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Jetson Device-tree overlay for Adafruit I2S Stereo Decoder Breakout
|
||||
* (UDA1334A).
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
|
||||
|
||||
/ {
|
||||
overlay-name = "Adafruit UDA1334A";
|
||||
jetson-header-name = "Jetson 40pin Header";
|
||||
compatible = JETSON_COMPATIBLE;
|
||||
|
||||
fragment@0 {
|
||||
target = <&pinmux>;
|
||||
__overlay__ {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&jetson_io_pinmux>;
|
||||
|
||||
jetson_io_pinmux: exp-header-pinmux {
|
||||
hdr40-pin12 {
|
||||
nvidia,pins = HDR40_PIN12;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin35 {
|
||||
nvidia,pins = HDR40_PIN35;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin40 {
|
||||
nvidia,pins = HDR40_PIN40;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
157
overlay/jetson-fe-pi-audio.dtsi
Normal file
157
overlay/jetson-fe-pi-audio.dtsi
Normal file
@@ -0,0 +1,157 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Jetson Device-tree overlay for FE-PI Audio V1 and Z V2.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
|
||||
|
||||
/ {
|
||||
overlay-name = "FE-PI Audio V1 and Z V2";
|
||||
jetson-header-name = "Jetson 40pin Header";
|
||||
compatible = JETSON_COMPATIBLE;
|
||||
|
||||
fragment@0 {
|
||||
target-path = "/";
|
||||
__overlay__ {
|
||||
clocks {
|
||||
sgtl5000_mclk: sgtl5000_mclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <12288000>;
|
||||
clock-output-names = "sgtl5000-mclk";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&hdr40_i2c1>;
|
||||
__overlay__ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sgtl5000: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clocks = <&sgtl5000_mclk>;
|
||||
micbias-resistor-k-ohms = <2>;
|
||||
micbias-voltage-m-volts = <3000>;
|
||||
VDDA-supply = <&hdr40_vdd_3v3>;
|
||||
VDDIO-supply = <&hdr40_vdd_3v3>;
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
sound-name-prefix = "H40-SGTL";
|
||||
|
||||
port {
|
||||
sgtl5000_ep: endpoint {
|
||||
remote-endpoint = <&hdr40_snd_i2s_dap_ep>;
|
||||
link-name = "fe-pi-audio-z-v2";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@2 {
|
||||
target = <&tegra_sound>;
|
||||
__overlay__ {
|
||||
nvidia-audio-card,widgets =
|
||||
"Headphone", "H40-SGTL Headphone",
|
||||
"Microphone", "H40-SGTL Mic",
|
||||
"Line", "H40-SGTL Line In",
|
||||
"Line", "H40-SGTL Line Out";
|
||||
|
||||
nvidia-audio-card,routing =
|
||||
"H40-SGTL Headphone", "H40-SGTL HP_OUT",
|
||||
"H40-SGTL MIC_IN", "H40-SGTL Mic",
|
||||
"H40-SGTL ADC", "H40-SGTL Mic Bias",
|
||||
"H40-SGTL LINE_IN", "H40-SGTL Line In",
|
||||
"H40-SGTL Line Out", "H40-SGTL LINE_OUT";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@3 {
|
||||
target = <&hdr40_snd_link_i2s>;
|
||||
__overlay__ {
|
||||
link-name = "fe-pi-audio-z-v2";
|
||||
bitclock-master;
|
||||
frame-master;
|
||||
|
||||
codec {
|
||||
sound-dai = <&sgtl5000>;
|
||||
prefix = "H40-SGTL";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@4 {
|
||||
target = <&pinmux>;
|
||||
__overlay__ {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&jetson_io_pinmux>;
|
||||
|
||||
jetson_io_pinmux: exp-header-pinmux {
|
||||
hdr40-pin12 {
|
||||
nvidia,pins = HDR40_PIN12;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin35 {
|
||||
nvidia,pins = HDR40_PIN35;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin38 {
|
||||
nvidia,pins = HDR40_PIN38;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin40 {
|
||||
nvidia,pins = HDR40_PIN40;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@5 {
|
||||
target = <&tegra_sound_graph>;
|
||||
__overlay__ {
|
||||
widgets = "Headphone", "H40-SGTL Headphone",
|
||||
"Microphone", "H40-SGTL Mic",
|
||||
"Line", "H40-SGTL Line In",
|
||||
"Line", "H40-SGTL Line Out";
|
||||
|
||||
routing = "H40-SGTL Headphone", "H40-SGTL HP_OUT",
|
||||
"H40-SGTL MIC_IN", "H40-SGTL Mic",
|
||||
"H40-SGTL ADC", "H40-SGTL Mic Bias",
|
||||
"H40-SGTL LINE_IN", "H40-SGTL Line In",
|
||||
"H40-SGTL Line Out", "H40-SGTL LINE_OUT";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@6 {
|
||||
target = <&hdr40_snd_i2s_dap_ep>;
|
||||
__overlay__ {
|
||||
bitclock-master;
|
||||
frame-master;
|
||||
remote-endpoint = <&sgtl5000_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
96
overlay/jetson-mcp251x.dtsi
Normal file
96
overlay/jetson-mcp251x.dtsi
Normal file
@@ -0,0 +1,96 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Jetson Device-tree overlay for MCP251x CAN Controller.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
|
||||
|
||||
/ {
|
||||
overlay-name = "MCP251x CAN Controller";
|
||||
jetson-header-name = "Jetson 40pin Header";
|
||||
compatible = JETSON_COMPATIBLE;
|
||||
|
||||
fragment@0 {
|
||||
target-path = "/";
|
||||
__overlay__ {
|
||||
clocks {
|
||||
can_clock: can_clock {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <20000000>;
|
||||
clock-accuracy = <100>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&hdr40_spi1>;
|
||||
__overlay__ {
|
||||
spi@0 {
|
||||
compatible = "microchip,mcp2515";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
nvidia,enable-hw-based-cs;
|
||||
nvidia,rx-clk-tap-delay = <0x7>;
|
||||
clocks = <&can_clock>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <HDR40_PIN31_GPIO 0x1>;
|
||||
controller-data {
|
||||
nvidia,cs-setup-clk-count = <0x1e>;
|
||||
nvidia,cs-hold-clk-count = <0x1e>;
|
||||
nvidia,rx-clk-tap-delay = <0x1f>;
|
||||
nvidia,tx-clk-tap-delay = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@2 {
|
||||
target = <&pinmux>;
|
||||
__overlay__ {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&jetson_io_pinmux>;
|
||||
|
||||
jetson_io_pinmux: exp-header-pinmux {
|
||||
hdr40-pin19 {
|
||||
nvidia,pins = HDR40_PIN19;
|
||||
nvidia,function = HDR40_SPI;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||
};
|
||||
hdr40-pin21 {
|
||||
nvidia,pins = HDR40_PIN21;
|
||||
nvidia,function = HDR40_SPI;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
hdr40-pin23 {
|
||||
nvidia,pins = HDR40_PIN23;
|
||||
nvidia,function = HDR40_SPI;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
hdr40-pin24 {
|
||||
nvidia,pins = HDR40_PIN24;
|
||||
nvidia,function = HDR40_SPI;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||
};
|
||||
hdr40-pin26 {
|
||||
nvidia,pins = HDR40_PIN26;
|
||||
nvidia,function = HDR40_SPI;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
132
overlay/jetson-respeaker-4-mic-array.dtsi
Normal file
132
overlay/jetson-respeaker-4-mic-array.dtsi
Normal file
@@ -0,0 +1,132 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Jetson Device-tree overlay for ReSpeaker 4 Mic Array.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
|
||||
|
||||
/ {
|
||||
overlay-name = "ReSpeaker 4 Mic Array";
|
||||
jetson-header-name = "Jetson 40pin Header";
|
||||
compatible = JETSON_COMPATIBLE;
|
||||
|
||||
fragment@0 {
|
||||
target = <&hdr40_i2c1>;
|
||||
__overlay__ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ac108_a: ac108@3b{
|
||||
compatible = "x-power,ac108_0";
|
||||
reg = <0x3b>;
|
||||
#sound-dai-cells = <0>;
|
||||
data-protocol = <0>;
|
||||
status = "okay";
|
||||
|
||||
sound-name-prefix = "H40-AC";
|
||||
|
||||
port {
|
||||
ac108_ep: endpoint {
|
||||
remote-endpoint = <&hdr40_snd_i2s_dap_ep>;
|
||||
link-name = "respeaker-4-mic-array";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&tegra_sound>;
|
||||
__overlay__ {
|
||||
nvidia-audio-card,widgets =
|
||||
"Microphone", "H40-AC Mic";
|
||||
nvidia-audio-card,routing =
|
||||
"H40-AC MIC1N", "H40-AC Mic",
|
||||
"H40-AC MIC1P", "H40-AC Mic",
|
||||
"H40-AC MIC2N", "H40-AC Mic",
|
||||
"H40-AC MIC2P", "H40-AC Mic",
|
||||
"H40-AC MIC3N", "H40-AC Mic",
|
||||
"H40-AC MIC3P", "H40-AC Mic",
|
||||
"H40-AC MIC4N", "H40-AC Mic",
|
||||
"H40-AC MIC4P", "H40-AC Mic",
|
||||
"H40-AC Capture", "H40-AC Mic";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@2 {
|
||||
target = <&hdr40_snd_link_i2s>;
|
||||
__overlay__ {
|
||||
link-name = "respeaker-4-mic-array";
|
||||
format = "dsp_a";
|
||||
bitclock-master;
|
||||
frame-master;
|
||||
codec {
|
||||
sound-dai = <&ac108_a>;
|
||||
prefix = "H40-AC";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@3 {
|
||||
target = <&pinmux>;
|
||||
__overlay__ {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&jetson_io_pinmux>;
|
||||
|
||||
jetson_io_pinmux: exp-header-pinmux {
|
||||
hdr40-pin12 {
|
||||
nvidia,pins = HDR40_PIN12;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin35 {
|
||||
nvidia,pins = HDR40_PIN35;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin38 {
|
||||
nvidia,pins = HDR40_PIN38;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Audio graph fragments */
|
||||
fragment@4 {
|
||||
target = <&tegra_sound_graph>;
|
||||
__overlay__ {
|
||||
widgets = "Microphone", "H40-AC Mic";
|
||||
|
||||
routing = "H40-AC MIC1N", "H40-AC Mic",
|
||||
"H40-AC MIC1P", "H40-AC Mic",
|
||||
"H40-AC MIC2N", "H40-AC Mic",
|
||||
"H40-AC MIC2P", "H40-AC Mic",
|
||||
"H40-AC MIC3N", "H40-AC Mic",
|
||||
"H40-AC MIC3P", "H40-AC Mic",
|
||||
"H40-AC MIC4N", "H40-AC Mic",
|
||||
"H40-AC MIC4P", "H40-AC Mic",
|
||||
"H40-AC Capture", "H40-AC Mic";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@5 {
|
||||
target = <&hdr40_snd_i2s_dap_ep>;
|
||||
__overlay__ {
|
||||
dai-format = "dsp_a";
|
||||
bitclock-master;
|
||||
frame-master;
|
||||
remote-endpoint = <&ac108_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
133
overlay/jetson-respeaker-4-mic-lin-array.dtsi
Normal file
133
overlay/jetson-respeaker-4-mic-lin-array.dtsi
Normal file
@@ -0,0 +1,133 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Jetson Device-tree overlay for ReSpeaker 4 Mic Linear Array.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
|
||||
|
||||
/ {
|
||||
overlay-name = "ReSpeaker 4 Mic Linear Array";
|
||||
jetson-header-name = "Jetson 40pin Header";
|
||||
compatible = JETSON_COMPATIBLE;
|
||||
|
||||
fragment@0 {
|
||||
target = <&hdr40_i2c1>;
|
||||
__overlay__ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ac108_a: ac108@35{
|
||||
compatible = "x-power,ac108_0";
|
||||
reg = <0x35>;
|
||||
#sound-dai-cells = <0>;
|
||||
data-protocol = <0>;
|
||||
status = "okay";
|
||||
|
||||
sound-name-prefix = "H40-AC";
|
||||
|
||||
port {
|
||||
ac108_ep: endpoint {
|
||||
remote-endpoint = <&hdr40_snd_i2s_dap_ep>;
|
||||
link-name = "respeaker-4-mic-array";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&tegra_sound>;
|
||||
__overlay__ {
|
||||
nvidia-audio-card,widgets =
|
||||
"Microphone", "H40-AC Mic";
|
||||
nvidia-audio-card,routing =
|
||||
"H40-AC MIC1N", "H40-AC Mic",
|
||||
"H40-AC MIC1P", "H40-AC Mic",
|
||||
"H40-AC MIC2N", "H40-AC Mic",
|
||||
"H40-AC MIC2P", "H40-AC Mic",
|
||||
"H40-AC MIC3N", "H40-AC Mic",
|
||||
"H40-AC MIC3P", "H40-AC Mic",
|
||||
"H40-AC MIC4N", "H40-AC Mic",
|
||||
"H40-AC MIC4P", "H40-AC Mic",
|
||||
"H40-AC Capture", "H40-AC Mic";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@2 {
|
||||
target = <&hdr40_snd_link_i2s>;
|
||||
__overlay__ {
|
||||
link-name = "respeaker-4-mic-array";
|
||||
format = "dsp_a";
|
||||
fsync-width = <0>;
|
||||
bitclock-master;
|
||||
frame-master;
|
||||
codec {
|
||||
sound-dai = <&ac108_a>;
|
||||
prefix = "H40-AC";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@3 {
|
||||
target = <&pinmux>;
|
||||
__overlay__ {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&jetson_io_pinmux>;
|
||||
|
||||
jetson_io_pinmux: exp-header-pinmux {
|
||||
hdr40-pin12 {
|
||||
nvidia,pins = HDR40_PIN12;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin35 {
|
||||
nvidia,pins = HDR40_PIN35;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
|
||||
hdr40-pin38 {
|
||||
nvidia,pins = HDR40_PIN38;
|
||||
nvidia,function = HDR40_I2S;
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@4 {
|
||||
target = <&tegra_sound_graph>;
|
||||
__overlay__ {
|
||||
widgets = "Microphone", "H40-AC Mic";
|
||||
|
||||
routing = "H40-AC MIC1N", "H40-AC Mic",
|
||||
"H40-AC MIC1P", "H40-AC Mic",
|
||||
"H40-AC MIC2N", "H40-AC Mic",
|
||||
"H40-AC MIC2P", "H40-AC Mic",
|
||||
"H40-AC MIC3N", "H40-AC Mic",
|
||||
"H40-AC MIC3P", "H40-AC Mic",
|
||||
"H40-AC MIC4N", "H40-AC Mic",
|
||||
"H40-AC MIC4P", "H40-AC Mic",
|
||||
"H40-AC Capture", "H40-AC Mic";
|
||||
};
|
||||
};
|
||||
|
||||
fragment@5 {
|
||||
target = <&hdr40_snd_i2s_dap_ep>;
|
||||
__overlay__ {
|
||||
dai-format = "dsp_a";
|
||||
bitclock-master;
|
||||
frame-master;
|
||||
remote-endpoint = <&ac108_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user