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tegra: hwpm: add cpu_ext_* enums

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Add new CPU IP and resource enum in
kernel driver and userspace library.
This is to extend support for chips with
more than 32 CPU instances (up to 128).

JIRA MSST-893

Change-Id: I33142c7fc8f268f8c436cc3b7cd97385da31b558
Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3328654
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Yifei Wan <ywan@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
This commit is contained in:
Besar Wicaksono
2025-03-25 23:32:50 +00:00
committed by mobile promotions
parent a4b7ab4486
commit 106bc61f86
5 changed files with 53 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/tegra/hwpm/include/tegra_hwpm.h
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@@ -103,7 +103,10 @@ enum tegra_hwpm_ip_enum {
TEGRA_HWPM_IP_UCF_CSW,
TEGRA_HWPM_IP_UCF_HUB,
TEGRA_HWPM_IP_UCF_SCB,
TEGRA_HWPM_IP_CPU,
TEGRA_HWPM_IP_CPU, /* CPU instance 0-31 */
TEGRA_HWPM_IP_CPU_EXT_0, /* CPU (extended) instance 32-63 */
TEGRA_HWPM_IP_CPU_EXT_1, /* CPU (extended) instance 64-95 */
TEGRA_HWPM_IP_CPU_EXT_2, /* CPU (extended) instance 96-127 */
TEGRA_HWPM_IP_NVTHERM,
TEGRA_HWPM_IP_CSN, /* CSN instance 0-31 */
TEGRA_HWPM_IP_CSN_EXT_0, /* CSN (extended) instance 32-63 */
@@ -156,6 +159,9 @@ static inline const char *tegra_hwpm_ip_string(enum tegra_hwpm_ip_enum ip_enum)
[TEGRA_HWPM_IP_UCF_HUB] = "ucf_hub",
[TEGRA_HWPM_IP_UCF_SCB] = "ucf_scb",
[TEGRA_HWPM_IP_CPU] = "cpu",
[TEGRA_HWPM_IP_CPU_EXT_0] = "cpu_ext_0",
[TEGRA_HWPM_IP_CPU_EXT_1] = "cpu_ext_1",
[TEGRA_HWPM_IP_CPU_EXT_2] = "cpu_ext_2",
[TEGRA_HWPM_IP_NVTHERM] = "nvtherm",
[TEGRA_HWPM_IP_CSN] = "csn",
[TEGRA_HWPM_IP_CSN_EXT_0] = "csn_ext_0",
@@ -214,7 +220,10 @@ enum tegra_hwpm_resource_enum {
TEGRA_HWPM_RESOURCE_UCF_CSW,
TEGRA_HWPM_RESOURCE_UCF_HUB,
TEGRA_HWPM_RESOURCE_UCF_SCB,
TEGRA_HWPM_RESOURCE_CPU,
TEGRA_HWPM_RESOURCE_CPU, /* CPU instance 0 -31 */
TEGRA_HWPM_RESOURCE_CPU_EXT_0, /* CPU (extended) instance 32-63 */
TEGRA_HWPM_RESOURCE_CPU_EXT_1, /* CPU (extended) instance 64-95 */
TEGRA_HWPM_RESOURCE_CPU_EXT_2, /* CPU (extended) instance 96-127 */
TEGRA_HWPM_RESOURCE_NVTHERM,
TEGRA_HWPM_RESOURCE_CSN, /* CSN instance 0-31 */
TEGRA_HWPM_RESOURCE_CSN_EXT_0, /* CSN (extended) instance 32-63 */

18
drivers/tegra/hwpm/os/linux/ip_utils.c
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@@ -147,6 +147,15 @@ static u32 tegra_hwpm_translate_soc_hwpm_ip(struct tegra_soc_hwpm *hwpm,
case TEGRA_SOC_HWPM_IP_CPU:
ip_enum_idx = TEGRA_HWPM_IP_CPU;
break;
case TEGRA_SOC_HWPM_IP_CPU_EXT_0:
ip_enum_idx = TEGRA_HWPM_IP_CPU_EXT_0;
break;
case TEGRA_SOC_HWPM_IP_CPU_EXT_1:
ip_enum_idx = TEGRA_HWPM_IP_CPU_EXT_1;
break;
case TEGRA_SOC_HWPM_IP_CPU_EXT_2:
ip_enum_idx = TEGRA_HWPM_IP_CPU_EXT_2;
break;
case TEGRA_SOC_HWPM_IP_NVTHERM:
ip_enum_idx = TEGRA_HWPM_IP_NVTHERM;
break;
@@ -324,6 +333,15 @@ u32 tegra_hwpm_translate_soc_hwpm_resource(struct tegra_soc_hwpm *hwpm,
case TEGRA_SOC_HWPM_RESOURCE_CPU:
res_enum_idx = TEGRA_HWPM_RESOURCE_CPU;
break;
case TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_0:
res_enum_idx = TEGRA_HWPM_RESOURCE_CPU_EXT_0;
break;
case TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_1:
res_enum_idx = TEGRA_HWPM_RESOURCE_CPU_EXT_1;
break;
case TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_2:
res_enum_idx = TEGRA_HWPM_RESOURCE_CPU_EXT_2;
break;
case TEGRA_SOC_HWPM_RESOURCE_NVTHERM:
res_enum_idx = TEGRA_HWPM_RESOURCE_NVTHERM;
break;

10
include/uapi/linux/tegra-soc-hwpm-uapi.h
View File

@@ -61,7 +61,10 @@ enum tegra_soc_hwpm_ip {
TEGRA_SOC_HWPM_IP_UCF_CSW,
TEGRA_SOC_HWPM_IP_UCF_HUB,
TEGRA_SOC_HWPM_IP_UCF_SCB,
TEGRA_SOC_HWPM_IP_CPU,
TEGRA_SOC_HWPM_IP_CPU, /* CPU instance 0-31 */
TEGRA_SOC_HWPM_IP_CPU_EXT_0, /* CPU (extended) instance 32-63 */
TEGRA_SOC_HWPM_IP_CPU_EXT_1, /* CPU (extended) instance 64-95 */
TEGRA_SOC_HWPM_IP_CPU_EXT_2, /* CPU (extended) instance 96-127 */
TEGRA_SOC_HWPM_IP_NVTHERM,
TEGRA_SOC_HWPM_IP_CSN, /* CSN instance 0-31 */
TEGRA_SOC_HWPM_IP_CSN_EXT_0, /* CSN (extended) instance 32-63 */
@@ -152,7 +155,10 @@ enum tegra_soc_hwpm_resource {
TEGRA_SOC_HWPM_RESOURCE_UCF_CSW,
TEGRA_SOC_HWPM_RESOURCE_UCF_HUB,
TEGRA_SOC_HWPM_RESOURCE_UCF_SCB,
TEGRA_SOC_HWPM_RESOURCE_CPU,
TEGRA_SOC_HWPM_RESOURCE_CPU, /* CPU instance 0-31 */
TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_0, /* CPU (extended) instance 32-63 */
TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_1, /* CPU (extended) instance 64-95 */
TEGRA_SOC_HWPM_RESOURCE_CPU_EXT_2, /* CPU (extended) instance 96-127 */
TEGRA_SOC_HWPM_RESOURCE_NVTHERM,
TEGRA_SOC_HWPM_RESOURCE_CSN, /* CSN instance 0-31 */
TEGRA_SOC_HWPM_RESOURCE_CSN_EXT_0, /* CSN (extended) instance 32-63 */

10
libnvsochwpm/include/nv_soc_hwpm.h
View File

@@ -72,7 +72,10 @@ typedef enum {
NV_SOC_HWPM_IP_UCF_CSW,
NV_SOC_HWPM_IP_UCF_HUB,
NV_SOC_HWPM_IP_UCF_SCB,
NV_SOC_HWPM_IP_CPU,
NV_SOC_HWPM_IP_CPU, /* CPU instance 0-31 */
NV_SOC_HWPM_IP_CPU_EXT_0, /* CPU (extended) instance 32-63 */
NV_SOC_HWPM_IP_CPU_EXT_1, /* CPU (extended) instance 64-95 */
NV_SOC_HWPM_IP_CPU_EXT_2, /* CPU (extended) instance 96-127 */
NV_SOC_HWPM_IP_NVTHERM,
NV_SOC_HWPM_IP_CSN, /* CSN instance 0-31 */
NV_SOC_HWPM_IP_CSN_EXT_0, /* CSN (extended) instance 32-63 */
@@ -138,7 +141,10 @@ typedef enum {
NV_SOC_HWPM_RESOURCE_UCF_CSW,
NV_SOC_HWPM_RESOURCE_UCF_HUB,
NV_SOC_HWPM_RESOURCE_UCF_SCB,
NV_SOC_HWPM_RESOURCE_CPU,
NV_SOC_HWPM_RESOURCE_CPU, /* CPU instance 0-31 */
NV_SOC_HWPM_RESOURCE_CPU_EXT_0, /* CPU (extended) instance 32-63 */
NV_SOC_HWPM_RESOURCE_CPU_EXT_1, /* CPU (extended) instance 64-95 */
NV_SOC_HWPM_RESOURCE_CPU_EXT_2, /* CPU (extended) instance 96-127 */
NV_SOC_HWPM_RESOURCE_NVTHERM,
NV_SOC_HWPM_RESOURCE_CSN, /* CSN instance 0-31 */
NV_SOC_HWPM_RESOURCE_CSN_EXT_0, /* CSN (extended) instance 32-63 */

8
libnvsochwpm/os/lnx/nv_soc_hwpm_lnx.c
View File

@@ -122,6 +122,14 @@ static uint32_t get_ip_max_instances(
break;
case TEGRA_SOC_HWPM_CHIP_ID_T410:
switch (ip) {
case NV_SOC_HWPM_IP_CPU:
return 32;
case NV_SOC_HWPM_IP_CPU_EXT_0:
return 32;
case NV_SOC_HWPM_IP_CPU_EXT_1:
return 32;
case NV_SOC_HWPM_IP_CPU_EXT_2:
return 2;
case NV_SOC_HWPM_IP_NVTHERM:
return 1;
case NV_SOC_HWPM_IP_CSN: