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tegra: hwpm: update basic structure layout

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Introduced macros to define HWPM aperture types perfmon, perfmux and
broadcast.
Added new enum to define element type.
IP perfmux and IP broadcast are handled in similar way. Whereas, HWPM
perfmux should use HWPM perfmon functions.

Updated hwpm structures are as below
Parent HWPM structure
  -> Active chip structure
     -> Array of IPs
     -> HALs

IP structure
  -> Array of instances
  -> Array of instance info with respect to perfmon, perfmux, broadcast
  -> Instance mask : indicates available instances
  -> reserved status

Instance structure
  -> Array of element info with respect to perfmon, perfmux, broadcast
      -> Array of corresponding element structures
  -> Element mask : indicates available elements in the instance

Element structure
  -> Aperture address details
  -> DT node / MMIO details

Update all functions to use new HWPM structures.

Update hwpm_probe to include force IP enable step.

Jira THWPM-41

Change-Id: I9461063d2136b34e841322c4ddd77a20486424c6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2706489
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Vedashree Vidwans
2022-05-02 23:50:58 -07:00
committed by mobile promotions
parent 7dd5b5c956
commit 3b6a1b35b7
56 changed files with 5479 additions and 3217 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
os/linux/tegra_hwpm_io.c
View File

@@ -18,10 +18,10 @@
#include <uapi/linux/tegra-soc-hwpm-uapi.h>
#include <tegra_hwpm_log.h>
#include <tegra_hwpm_io.h>
#include <tegra_hwpm_static_analysis.h>
#include <tegra_hwpm.h>
#include <tegra_hwpm_io.h>
#include <tegra_hwpm_log.h>
#include <tegra_hwpm_static_analysis.h>
static u32 fake_readl(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 offset)
@@ -52,7 +52,7 @@ static void fake_writel(struct tegra_soc_hwpm *hwpm,
* Read IP domain registers
* IP(except PMA and RTR) perfmux fall in this category
*/
static u32 ip_readl(struct tegra_soc_hwpm *hwpm,
static u32 ip_readl(struct tegra_soc_hwpm *hwpm, struct hwpm_ip_inst *ip_inst,
struct hwpm_ip_aperture *aperture, u64 offset)
{
tegra_hwpm_dbg(hwpm, hwpm_register,
@@ -63,7 +63,7 @@ static u32 ip_readl(struct tegra_soc_hwpm *hwpm,
return fake_readl(hwpm, aperture, offset);
} else {
u32 reg_val = 0U;
struct tegra_hwpm_ip_ops *ip_ops_ptr = &aperture->ip_ops;
struct tegra_hwpm_ip_ops *ip_ops_ptr = &ip_inst->ip_ops;
if (ip_ops_ptr->hwpm_ip_reg_op != NULL) {
int err = 0;
@@ -107,7 +107,7 @@ static u32 ip_readl(struct tegra_soc_hwpm *hwpm,
* Write to IP domain registers
* IP(except PMA and RTR) perfmux fall in this category
*/
static void ip_writel(struct tegra_soc_hwpm *hwpm,
static void ip_writel(struct tegra_soc_hwpm *hwpm, struct hwpm_ip_inst *ip_inst,
struct hwpm_ip_aperture *aperture, u64 offset, u32 val)
{
tegra_hwpm_dbg(hwpm, hwpm_register,
@@ -117,7 +117,7 @@ static void ip_writel(struct tegra_soc_hwpm *hwpm,
if (hwpm->fake_registers_enabled) {
fake_writel(hwpm, aperture, offset, val);
} else {
struct tegra_hwpm_ip_ops *ip_ops_ptr = &aperture->ip_ops;
struct tegra_hwpm_ip_ops *ip_ops_ptr = &ip_inst->ip_ops;
if (ip_ops_ptr->hwpm_ip_reg_op != NULL) {
int err = 0;
@@ -216,7 +216,8 @@ u32 tegra_hwpm_readl(struct tegra_soc_hwpm *hwpm,
return 0;
}
if (aperture->is_hwpm_element) {
if ((aperture->element_type == HWPM_ELEMENT_PERFMON) ||
(aperture->element_type == HWPM_ELEMENT_PERFMUX)) {
u64 reg_offset = tegra_hwpm_safe_sub_u64(
addr, aperture->base_pa);
/* HWPM domain registers */
@@ -240,7 +241,8 @@ void tegra_hwpm_writel(struct tegra_soc_hwpm *hwpm,
return;
}
if (aperture->is_hwpm_element) {
if ((aperture->element_type == HWPM_ELEMENT_PERFMON) ||
(aperture->element_type == HWPM_ELEMENT_PERFMUX)) {
u64 reg_offset = tegra_hwpm_safe_sub_u64(
addr, aperture->base_pa);
/* HWPM domain internal registers */
@@ -256,7 +258,8 @@ void tegra_hwpm_writel(struct tegra_soc_hwpm *hwpm,
* check has been done before calling this function.
*/
u32 tegra_hwpm_regops_readl(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr)
u64 addr, struct hwpm_ip_inst *ip_inst,
struct hwpm_ip_aperture *aperture)
{
u32 reg_val = 0;
u64 reg_offset = 0ULL;
@@ -268,11 +271,11 @@ u32 tegra_hwpm_regops_readl(struct tegra_soc_hwpm *hwpm,
reg_offset = tegra_hwpm_safe_sub_u64(addr, aperture->start_abs_pa);
if (aperture->is_hwpm_element) {
/* HWPM unit internal registers */
if ((aperture->element_type == HWPM_ELEMENT_PERFMON) ||
(aperture->element_type == HWPM_ELEMENT_PERFMUX)) {
reg_val = hwpm_readl(hwpm, aperture, reg_offset);
} else {
reg_val = ip_readl(hwpm, aperture, reg_offset);
reg_val = ip_readl(hwpm, ip_inst, aperture, reg_offset);
}
return reg_val;
}
@@ -282,7 +285,8 @@ u32 tegra_hwpm_regops_readl(struct tegra_soc_hwpm *hwpm,
* allowlist check has been done before calling this function.
*/
void tegra_hwpm_regops_writel(struct tegra_soc_hwpm *hwpm,
struct hwpm_ip_aperture *aperture, u64 addr, u32 val)
u64 addr, u32 val, struct hwpm_ip_inst *ip_inst,
struct hwpm_ip_aperture *aperture)
{
u64 reg_offset = 0ULL;
@@ -293,10 +297,10 @@ void tegra_hwpm_regops_writel(struct tegra_soc_hwpm *hwpm,
reg_offset = tegra_hwpm_safe_sub_u64(addr, aperture->start_abs_pa);
if (aperture->is_hwpm_element) {
/* HWPM unit internal registers */
if ((aperture->element_type == HWPM_ELEMENT_PERFMON) ||
(aperture->element_type == HWPM_ELEMENT_PERFMUX)) {
hwpm_writel(hwpm, aperture, reg_offset, val);
} else {
ip_writel(hwpm, aperture, reg_offset, val);
ip_writel(hwpm, ip_inst, aperture, reg_offset, val);
}
}