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tegra: hwpm: Linux: Setup trigger IOCTL Infra

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Add IOCTL infra for Cross trigger programming in HWPM Driver.
Cross Triggering involves the access to secure register, which
cannot be issued by user space application. Hence, implement
cross trigger functionality in HWPM kernel driver.

Bug 4571175

Signed-off-by: vasukis <vasukis@nvidia.com>
Change-Id: Ia46227c4678d3ee282ebae8c58e116feaf4e59cb
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3147289
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
vasukis
2024-05-29 16:33:38 +00:00
committed by mobile promotions
parent f672287ded
commit 425b5f92ae
7 changed files with 75 additions and 0 deletions
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30
include/uapi/linux/tegra-soc-hwpm-uapi.h
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@@ -352,6 +352,24 @@ struct tegra_soc_hwpm_update_get_put {
__u8 b_overflowed;
};
/* Enum to indicate Periodic or Start Stop trigger session */
enum tegra_soc_hwpm_trigger_session_type {
TEGRA_SOC_HWPM_INVALID,
TEGRA_SOC_HWPM_START_STOP_SESSION,
TEGRA_SOC_HWPM_PERIODIC_SESSION
};
/* TEGRA_CTRL_CMD_SOC_HWPM_SETUP_TRIGGER */
struct tegra_soc_hwpm_setup_trigger {
/*
* Inputs
*/
__u8 cblock_idx; /* CBlockID Index */
__u8 pma_channel_idx; /* For multi-channel support */
__u8 enable_cross_trigger; /* To indicate range profiler or periodic sampler */
__u8 session_type; /* Enum type tegra_soc_hwpm_trigger_session_type */
};
/* IOCTL enum */
enum tegra_soc_hwpm_ioctl_num {
TEGRA_SOC_HWPM_IOCTL_DEVICE_INFO,
@@ -364,6 +382,7 @@ enum tegra_soc_hwpm_ioctl_num {
TEGRA_SOC_HWPM_IOCTL_EXEC_REG_OPS,
TEGRA_SOC_HWPM_IOCTL_UPDATE_GET_PUT,
TEGRA_SOC_HWPM_IOCTL_CREDIT_PROGRAM,
TEGRA_SOC_HWPM_IOCTL_SETUP_TRIGGER,
TERGA_SOC_HWPM_NUM_IOCTLS
};
@@ -479,6 +498,17 @@ enum tegra_soc_hwpm_ioctl_num {
TEGRA_SOC_HWPM_IOCTL_CREDIT_PROGRAM, \
struct tegra_soc_hwpm_exec_credit_program)
/*
* IOCTl for initiating Cross Trigger Setup Programming
*
* This IOCTL executes read-write access to SECURE REGISTERS
*
*/
#define TEGRA_CTRL_CMD_SOC_HWPM_SETUP_TRIGGER \
_IOWR(TEGRA_SOC_HWPM_IOC_MAGIC, \
TEGRA_SOC_HWPM_IOCTL_SETUP_TRIGGER, \
struct tegra_soc_hwpm_setup_trigger)
#define TEGRA_SOC_HWPM_MAX_ARG_SIZE \
sizeof(struct tegra_soc_hwpm_exec_reg_ops)