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tegra: hwpm: modify floorsweep info for MSS

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For MSS channel, hwpm client expects floorsweep info mask to indicate
available MSS chanenel perfmuxes.
HWPM driver would prefer to follow common fs_mask logic for IPs and is
being discussed.
Temporarily update floorsweep info logic for MSS channel, until
floorsweep info IOCTL modifications are finalized.

Bug 3477617

Change-Id: I75b51ccc60151e801dec50fa32b15b951db6e47e
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2672291
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2022-02-18 10:00:32 -08:00
committed by mobile promotions
parent afc8321841
commit aaf8e7f5e1
1 changed files with 13 additions and 1 deletions
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12
hal/t234/t234_hwpm_ip_utils.c
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@@ -635,6 +635,8 @@ int t234_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
u32 ip_index, u64 *fs_mask, u8 *ip_status)
{
u32 ip_idx = 0U;
u32 i = 0U;
u32 mcc_fs_mask = 0U;
struct tegra_soc_hwpm_chip *active_chip = NULL;
struct hwpm_ip *chip_ip = NULL;
@@ -657,7 +659,17 @@ int t234_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
} else {
active_chip = hwpm->active_chip;
chip_ip = active_chip->chip_ips[ip_idx];
/* TODO: Update after fS IOCTL discussion */
if (ip_idx == T234_HWPM_IP_MSS_CHANNEL) {
for (i = 0U; i < 4U; i++) {
if (((0x1U << i) & chip_ip->fs_mask) != 0U) {
mcc_fs_mask |= (0xFU << i);
}
}
*fs_mask = mcc_fs_mask;
} else {
*fs_mask = chip_ip->fs_mask;
}
*ip_status = TEGRA_SOC_HWPM_IP_STATUS_VALID;
}