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tegra: hwpm: update aperture mmio details
HWPM components (PMA, RTR, perfmon) have MMIO address space and a corresponding virtual address region. It is possible that both MMIO and virtual addresses are same for an aperture. MMIO address of an aperture is used in device node to enable the aperture and further to map HWPM component in the driver. Virtual addresses are used by the applications to execute regops on HWPM apertures. Virtual addresses are also used to fake aperture address space in simulation. This patch updates - HWPM aperture structures to include MMIO address. - aperture ioremap function to use MMIO address values. - fake register allocation to use virtual address values. Jira THWPM-41 Change-Id: I05acb68dcb278722cd333e1187b2355d1d739e93 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> (cherry picked from commit 1c0e8107b4cddad7532c10dddc22bb30cef2540b) Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2853213 Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -206,12 +206,6 @@ struct hwpm_ip_aperture {
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*/
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u32 element_index;
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/* MMIO device tree aperture - only populated for perfmon */
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void __iomem *dt_mmio;
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/* DT tree name */
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char name[64];
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/*
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* Device index corresponding to device node aperture address index
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* in Device tree or ACPI table.
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@@ -219,22 +213,44 @@ struct hwpm_ip_aperture {
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*/
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u32 device_index;
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/* Allowlist */
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struct allowlist *alist;
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u64 alist_size;
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/* MMIO device tree aperture - only populated for perfmon */
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void __iomem *dt_mmio;
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/* Physical aperture */
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u64 start_abs_pa;
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u64 end_abs_pa;
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/* DT tree name */
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char name[64];
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/* MMIO aperture */
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/*
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* MMIO address for the aperture. This address range is present
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* in the device node.
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* MMIO addresses can be same as virtual aperture addresses.
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*/
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u64 start_pa;
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u64 end_pa;
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/* Base address: used to calculate register offset */
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/*
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* Virtual aperture address
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* Regops addresses should be in this range.
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*/
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u64 start_abs_pa;
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u64 end_abs_pa;
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/*
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* Base address of Perfmon Block
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* All perfmon apertures have identical placement of registers
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* HWPM read/write logic for perfmons refers to registers in the first
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* perfmon block. Use this base address value to compute register
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* offset in HWPM read/write functions.
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*/
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u64 base_pa;
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/* Fake registers for VDK which doesn't have a SOC HWPM fmodel */
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/* Allowlist */
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u64 alist_size;
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struct allowlist *alist;
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/*
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* Fake registers for simulation where SOC HWPM is not implemented
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* Use virtual aperture address values for allocation.
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*/
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u32 *fake_registers;
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};
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