tegra: hwpm: move common hals to common path

Allowlist, get IP/resource info and perfmux disable HALs defined in t234
specific files do not require any chip specific details.
Move such functions to common files. This way common functions can be
reused by future chips, reducing maintainability of these functions.
Rename linux specific get_resource_info and get_floorsweep_info
functions to avoid multiple definitions.

Jira THPM-41

Change-Id: I0fc9eaf5b5d2591fa740939e1a43fe6911b5a378
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2780702
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>

Makefile.t234.sources

@@ -5,7 +5,6 @@
 # SPDX-License-Identifier: GPL-2.0
 
 ifeq ($(CONFIG_TEGRA_T234_HWPM),y)
-nvhwpm-t234-objs += hal/t234/t234_alist.o
 nvhwpm-t234-objs += hal/t234/t234_aperture.o
 nvhwpm-t234-objs += hal/t234/t234_interface.o
 nvhwpm-t234-objs += hal/t234/t234_ip.o

common/allowlist.c

@@ -12,6 +12,7 @@
  */
 
 #include <tegra_hwpm.h>
+#include <tegra_hwpm_io.h>
 #include <tegra_hwpm_log.h>
 #include <tegra_hwpm_kmem.h>
 #include <tegra_hwpm_common.h>
@@ -35,6 +36,11 @@ int tegra_hwpm_alloc_alist_map(struct tegra_soc_hwpm *hwpm)
 	return 0;
 }
 
+size_t tegra_hwpm_get_alist_buf_size(struct tegra_soc_hwpm *hwpm)
+{
+	return sizeof(struct allowlist);
+}
+
 int tegra_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm)
 {
 	int ret = 0;
@@ -54,6 +60,37 @@ int tegra_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm)
 	return 0;
 }
 
+int tegra_hwpm_copy_alist(struct tegra_soc_hwpm *hwpm,
+	struct hwpm_ip_aperture *aperture, u64 *full_alist,
+	u64 *full_alist_idx)
+{
+	u64 f_alist_idx = *full_alist_idx;
+	u64 alist_idx = 0ULL;
+
+	tegra_hwpm_fn(hwpm, " ");
+
+	if (aperture->alist == NULL) {
+		tegra_hwpm_err(hwpm, "NULL allowlist in aperture");
+		return -EINVAL;
+	}
+
+	for (alist_idx = 0ULL; alist_idx < aperture->alist_size; alist_idx++) {
+		if (f_alist_idx >= hwpm->alist_map->full_alist_size) {
+			tegra_hwpm_err(hwpm, "No space in full_alist");
+			return -ENOMEM;
+		}
+
+		full_alist[f_alist_idx++] = tegra_hwpm_safe_add_u64(
+			aperture->start_abs_pa,
+			aperture->alist[alist_idx].reg_offset);
+	}
+
+	/* Store next available index */
+	*full_alist_idx = f_alist_idx;
+
+	return 0;
+}
+
 int tegra_hwpm_combine_alist(struct tegra_soc_hwpm *hwpm, u64 *alist)
 {
 	struct tegra_hwpm_func_args func_args;
@@ -82,3 +119,53 @@ int tegra_hwpm_combine_alist(struct tegra_soc_hwpm *hwpm, u64 *alist)
 
 	return err;
 }
+
+int tegra_hwpm_zero_alist_regs(struct tegra_soc_hwpm *hwpm,
+	struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *aperture)
+{
+	u32 alist_idx = 0U;
+	int err = 0;
+
+	tegra_hwpm_fn(hwpm, " ");
+
+	for (alist_idx = 0; alist_idx < aperture->alist_size; alist_idx++) {
+		if (aperture->alist[alist_idx].zero_at_init) {
+			err = tegra_hwpm_regops_writel(hwpm, ip_inst, aperture,
+				tegra_hwpm_safe_add_u64(aperture->start_abs_pa,
+					aperture->alist[alist_idx].reg_offset),
+				0U);
+			if (err != 0) {
+				tegra_hwpm_err(hwpm, "zero alist regs failed");
+				return err;
+			}
+		}
+	}
+	return 0;
+}
+
+bool tegra_hwpm_check_alist(struct tegra_soc_hwpm *hwpm,
+	struct hwpm_ip_aperture *aperture, u64 phys_addr)
+{
+	u32 alist_idx;
+	u64 reg_offset;
+
+	tegra_hwpm_fn(hwpm, " ");
+
+	if (!aperture) {
+		tegra_hwpm_err(hwpm, "Aperture is NULL");
+		return false;
+	}
+	if (!aperture->alist) {
+		tegra_hwpm_err(hwpm, "NULL allowlist in aperture");
+		return false;
+	}
+
+	reg_offset = tegra_hwpm_safe_sub_u64(phys_addr, aperture->start_abs_pa);
+
+	for (alist_idx = 0; alist_idx < aperture->alist_size; alist_idx++) {
+		if (reg_offset == aperture->alist[alist_idx].reg_offset) {
+			return true;
+		}
+	}
+	return false;
+}

common/ip.c

@@ -186,6 +186,78 @@ fail:
 	return ret;
 }
 
+int tegra_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
+	u32 ip_enum, u64 *fs_mask, u8 *ip_status)
+{
+	u32 ip_idx = 0U, inst_idx = 0U, element_mask_shift = 0U;
+	u64 floorsweep = 0ULL;
+	struct tegra_soc_hwpm_chip *active_chip = NULL;
+	struct hwpm_ip *chip_ip = NULL;
+	struct hwpm_ip_inst *ip_inst = NULL;
+
+	tegra_hwpm_fn(hwpm, " ");
+
+	/* Convert tegra_soc_hwpm_ip enum to internal ip index */
+	if (hwpm->active_chip->is_ip_active(hwpm, ip_enum, &ip_idx)) {
+		active_chip = hwpm->active_chip;
+		chip_ip = active_chip->chip_ips[ip_idx];
+		if (!(chip_ip->override_enable) && chip_ip->inst_fs_mask) {
+			for (inst_idx = 0U; inst_idx < chip_ip->num_instances;
+				inst_idx++) {
+				ip_inst = &chip_ip->ip_inst_static_array[
+					inst_idx];
+				element_mask_shift = (inst_idx == 0U ? 0U :
+					ip_inst->num_core_elements_per_inst);
+
+				if (ip_inst->hw_inst_mask &
+					chip_ip->inst_fs_mask) {
+					floorsweep |= ((u64)
+						ip_inst->element_fs_mask <<
+							element_mask_shift);
+				}
+			}
+			*fs_mask = floorsweep;
+			*ip_status = TEGRA_HWPM_IP_STATUS_VALID;
+
+			return 0;
+		}
+	}
+
+	tegra_hwpm_dbg(hwpm, hwpm_dbg_floorsweep_info,
+		"SOC hwpm IP %d is unavailable", ip_enum);
+
+	*ip_status = TEGRA_HWPM_IP_STATUS_INVALID;
+	*fs_mask = 0ULL;
+
+	return 0;
+}
+
+int tegra_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
+	u32 resource_enum, u8 *status)
+{
+	u32 ip_idx = 0U;
+	struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
+	struct hwpm_ip *chip_ip = NULL;
+
+	tegra_hwpm_fn(hwpm, " ");
+
+	/* Convert tegra_soc_hwpm_resource to internal enum */
+	if (hwpm->active_chip->is_resource_active(hwpm, resource_enum, &ip_idx)) {
+		chip_ip = active_chip->chip_ips[ip_idx];
+
+		if (!(chip_ip->override_enable)) {
+			*status = tegra_hwpm_safe_cast_u32_to_u8(
+				chip_ip->resource_status);
+			return 0;
+		}
+	}
+
+	*status = tegra_hwpm_safe_cast_u32_to_u8(
+		TEGRA_HWPM_RESOURCE_STATUS_INVALID);
+
+	return 0;
+}
+
 /*
  * There are 3 ways to get info about available IPs
  * 1. IP register to HWPM driver

common/resource.c

@@ -16,6 +16,14 @@
 #include <tegra_hwpm_common.h>
 #include <tegra_hwpm_static_analysis.h>
 
+int tegra_hwpm_perfmux_disable(struct tegra_soc_hwpm *hwpm,
+	struct hwpm_ip_aperture *perfmux)
+{
+	tegra_hwpm_fn(hwpm, " ");
+
+	return 0;
+}
+
 int tegra_hwpm_reserve_rtr(struct tegra_soc_hwpm *hwpm)
 {
 	int err = 0;

hal/t234/t234_alist.c

@@ -1,106 +0,0 @@
-/*
- * Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- */
-
-#include <tegra_hwpm_static_analysis.h>
-#include <tegra_hwpm_mem_mgmt.h>
-#include <tegra_hwpm_log.h>
-#include <tegra_hwpm_io.h>
-#include <tegra_hwpm.h>
-#include <hal/t234/t234_internal.h>
-#include <hal/t234/t234_regops_allowlist.h>
-
-size_t t234_hwpm_get_alist_buf_size(struct tegra_soc_hwpm *hwpm)
-{
-	return sizeof(struct allowlist);
-}
-
-int t234_hwpm_zero_alist_regs(struct tegra_soc_hwpm *hwpm,
-	struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *aperture)
-{
-	u32 alist_idx = 0U;
-	int err = 0;
-
-	tegra_hwpm_fn(hwpm, " ");
-
-	for (alist_idx = 0; alist_idx < aperture->alist_size; alist_idx++) {
-		if (aperture->alist[alist_idx].zero_at_init) {
-			err = tegra_hwpm_regops_writel(hwpm, ip_inst, aperture,
-				tegra_hwpm_safe_add_u64(aperture->start_abs_pa,
-					aperture->alist[alist_idx].reg_offset),
-				0U);
-			if (err != 0) {
-				tegra_hwpm_err(hwpm, "zero alist regs failed");
-				return err;
-			}
-		}
-	}
-	return 0;
-}
-
-int t234_hwpm_copy_alist(struct tegra_soc_hwpm *hwpm,
-	struct hwpm_ip_aperture *aperture, u64 *full_alist,
-	u64 *full_alist_idx)
-{
-	u64 f_alist_idx = *full_alist_idx;
-	u64 alist_idx = 0ULL;
-
-	tegra_hwpm_fn(hwpm, " ");
-
-	if (aperture->alist == NULL) {
-		tegra_hwpm_err(hwpm, "NULL allowlist in aperture");
-		return -EINVAL;
-	}
-
-	for (alist_idx = 0ULL; alist_idx < aperture->alist_size; alist_idx++) {
-		if (f_alist_idx >= hwpm->alist_map->full_alist_size) {
-			tegra_hwpm_err(hwpm, "No space in full_alist");
-			return -ENOMEM;
-		}
-
-		full_alist[f_alist_idx++] = tegra_hwpm_safe_add_u64(
-			aperture->start_abs_pa,
-			aperture->alist[alist_idx].reg_offset);
-	}
-
-	/* Store next available index */
-	*full_alist_idx = f_alist_idx;
-
-	return 0;
-}
-
-bool t234_hwpm_check_alist(struct tegra_soc_hwpm *hwpm,
-	struct hwpm_ip_aperture *aperture, u64 phys_addr)
-{
-	u32 alist_idx;
-	u64 reg_offset;
-
-	tegra_hwpm_fn(hwpm, " ");
-
-	if (!aperture) {
-		tegra_hwpm_err(hwpm, "Aperture is NULL");
-		return false;
-	}
-	if (!aperture->alist) {
-		tegra_hwpm_err(hwpm, "NULL allowlist in aperture");
-		return false;
-	}
-
-	reg_offset = tegra_hwpm_safe_sub_u64(phys_addr, aperture->start_abs_pa);
-
-	for (alist_idx = 0; alist_idx < aperture->alist_size; alist_idx++) {
-		if (reg_offset == aperture->alist[alist_idx].reg_offset) {
-			return true;
-		}
-	}
-	return false;
-}

hal/t234/t234_interface.c

@@ -15,6 +15,7 @@
 #include <tegra_hwpm_kmem.h>
 #include <tegra_hwpm_log.h>
 #include <tegra_hwpm.h>
+
 #include <hal/t234/t234_init.h>
 #include <hal/t234/t234_internal.h>
 
@@ -31,8 +32,8 @@ static struct tegra_soc_hwpm_chip t234_chip_info = {
 	.extract_ip_ops = t234_hwpm_extract_ip_ops,
 	.force_enable_ips = t234_hwpm_force_enable_ips,
 	.validate_current_config = t234_hwpm_validate_current_config,
-	.get_fs_info = t234_hwpm_get_fs_info,
+	.get_fs_info = tegra_hwpm_get_fs_info,
-	.get_resource_info = t234_hwpm_get_resource_info,
+	.get_resource_info = tegra_hwpm_get_resource_info,
 
 	.init_prod_values = t234_hwpm_init_prod_values,
 	.disable_cg = t234_hwpm_disable_cg,
@@ -43,7 +44,7 @@ static struct tegra_soc_hwpm_chip t234_chip_info = {
 
 	.perfmon_enable = t234_hwpm_perfmon_enable,
 	.perfmon_disable = t234_hwpm_perfmon_disable,
-	.perfmux_disable = t234_hwpm_perfmux_disable,
+	.perfmux_disable = tegra_hwpm_perfmux_disable,
 	.disable_triggers = t234_hwpm_disable_triggers,
 
 	.disable_mem_mgmt = t234_hwpm_disable_mem_mgmt,
@@ -55,10 +56,10 @@ static struct tegra_soc_hwpm_chip t234_chip_info = {
 	.get_mem_bytes_put_ptr = t234_hwpm_get_mem_bytes_put_ptr,
 	.membuf_overflow_status = t234_hwpm_membuf_overflow_status,
 
-	.get_alist_buf_size = t234_hwpm_get_alist_buf_size,
+	.get_alist_buf_size = tegra_hwpm_get_alist_buf_size,
-	.zero_alist_regs = t234_hwpm_zero_alist_regs,
+	.zero_alist_regs = tegra_hwpm_zero_alist_regs,
-	.copy_alist = t234_hwpm_copy_alist,
+	.copy_alist = tegra_hwpm_copy_alist,
-	.check_alist = t234_hwpm_check_alist,
+	.check_alist = tegra_hwpm_check_alist,
 };
 
 static bool t234_hwpm_validate_hals(struct tegra_soc_hwpm *hwpm)

hal/t234/t234_internal.h

@@ -81,10 +81,6 @@ int t234_hwpm_extract_ip_ops(struct tegra_soc_hwpm *hwpm,
 	struct tegra_hwpm_ip_ops *ip_ops, bool available);
 int t234_hwpm_force_enable_ips(struct tegra_soc_hwpm *hwpm);
 int t234_hwpm_validate_current_config(struct tegra_soc_hwpm *hwpm);
-int t234_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
-	u32 ip_enum, u64 *fs_mask, u8 *ip_status);
-int t234_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
-	u32 resource_enum, u8 *status);
 
 int t234_hwpm_init_prod_values(struct tegra_soc_hwpm *hwpm);
 int t234_hwpm_disable_cg(struct tegra_soc_hwpm *hwpm);
@@ -93,8 +89,6 @@ int t234_hwpm_enable_cg(struct tegra_soc_hwpm *hwpm);
 int t234_hwpm_disable_triggers(struct tegra_soc_hwpm *hwpm);
 int t234_hwpm_perfmon_enable(struct tegra_soc_hwpm *hwpm,
 	struct hwpm_ip_aperture *perfmon);
-int t234_hwpm_perfmux_disable(struct tegra_soc_hwpm *hwpm,
-	struct hwpm_ip_aperture *perfmux);
 int t234_hwpm_perfmon_disable(struct tegra_soc_hwpm *hwpm,
 	struct hwpm_ip_aperture *perfmon);
 
@@ -108,13 +102,4 @@ int t234_hwpm_update_mem_bytes_get_ptr(struct tegra_soc_hwpm *hwpm,
 u64 t234_hwpm_get_mem_bytes_put_ptr(struct tegra_soc_hwpm *hwpm);
 bool t234_hwpm_membuf_overflow_status(struct tegra_soc_hwpm *hwpm);
 
-size_t t234_hwpm_get_alist_buf_size(struct tegra_soc_hwpm *hwpm);
-int t234_hwpm_zero_alist_regs(struct tegra_soc_hwpm *hwpm,
-	struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *aperture);
-int t234_hwpm_copy_alist(struct tegra_soc_hwpm *hwpm,
-	struct hwpm_ip_aperture *aperture, u64 *full_alist,
-	u64 *full_alist_idx);
-bool t234_hwpm_check_alist(struct tegra_soc_hwpm *hwpm,
-	struct hwpm_ip_aperture *aperture, u64 phys_addr);
-
 #endif /* T234_HWPM_INTERNAL_H */

hal/t234/t234_ip.c

@@ -445,75 +445,3 @@ int t234_hwpm_force_enable_ips(struct tegra_soc_hwpm *hwpm)
 
 	return ret;
 }
-
-int t234_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
-	u32 ip_enum, u64 *fs_mask, u8 *ip_status)
-{
-	u32 ip_idx = 0U, inst_idx = 0U, element_mask_shift = 0U;
-	u64 floorsweep = 0ULL;
-	struct tegra_soc_hwpm_chip *active_chip = NULL;
-	struct hwpm_ip *chip_ip = NULL;
-	struct hwpm_ip_inst *ip_inst = NULL;
-
-	tegra_hwpm_fn(hwpm, " ");
-
-	/* Convert tegra_soc_hwpm_ip enum to internal ip index */
-	if (hwpm->active_chip->is_ip_active(hwpm, ip_enum, &ip_idx)) {
-		active_chip = hwpm->active_chip;
-		chip_ip = active_chip->chip_ips[ip_idx];
-		if (!(chip_ip->override_enable) && chip_ip->inst_fs_mask) {
-			for (inst_idx = 0U; inst_idx < chip_ip->num_instances;
-				inst_idx++) {
-				ip_inst = &chip_ip->ip_inst_static_array[
-					inst_idx];
-				element_mask_shift = (inst_idx == 0U ? 0U :
-					ip_inst->num_core_elements_per_inst);
-
-				if (ip_inst->hw_inst_mask &
-					chip_ip->inst_fs_mask) {
-					floorsweep |= ((u64)
-						ip_inst->element_fs_mask <<
-							element_mask_shift);
-				}
-			}
-			*fs_mask = floorsweep;
-			*ip_status = TEGRA_HWPM_IP_STATUS_VALID;
-
-			return 0;
-		}
-	}
-
-	tegra_hwpm_dbg(hwpm, hwpm_dbg_floorsweep_info,
-		"SOC hwpm IP %d is unavailable", ip_enum);
-
-	*ip_status = TEGRA_HWPM_IP_STATUS_INVALID;
-	*fs_mask = 0ULL;
-
-	return 0;
-}
-
-int t234_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
-	u32 resource_enum, u8 *status)
-{
-	u32 ip_idx = 0U;
-	struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
-	struct hwpm_ip *chip_ip = NULL;
-
-	tegra_hwpm_fn(hwpm, " ");
-
-	/* Convert tegra_soc_hwpm_resource to internal enum */
-	if (hwpm->active_chip->is_resource_active(hwpm, resource_enum, &ip_idx)) {
-		chip_ip = active_chip->chip_ips[ip_idx];
-
-		if (!(chip_ip->override_enable)) {
-			*status = tegra_hwpm_safe_cast_u32_to_u8(
-				chip_ip->resource_status);
-			return 0;
-		}
-	}
-
-	*status = tegra_hwpm_safe_cast_u32_to_u8(
-		TEGRA_HWPM_RESOURCE_STATUS_INVALID);
-
-	return 0;
-}

hal/t234/t234_resource.c

@@ -51,14 +51,6 @@ int t234_hwpm_perfmon_enable(struct tegra_soc_hwpm *hwpm,
 	return 0;
 }
 
-int t234_hwpm_perfmux_disable(struct tegra_soc_hwpm *hwpm,
-	struct hwpm_ip_aperture *perfmux)
-{
-	tegra_hwpm_fn(hwpm, " ");
-
-	return 0;
-}
-
 int t234_hwpm_perfmon_disable(struct tegra_soc_hwpm *hwpm,
 	struct hwpm_ip_aperture *perfmon)
 {

include/tegra_hwpm_common.h

@@ -41,13 +41,14 @@ bool tegra_hwpm_aperture_for_address(struct tegra_soc_hwpm *hwpm,
 	u64 find_addr, u32 *ip_idx, u32 *inst_idx, u32 *element_idx,
 	enum tegra_hwpm_element_type *element_type);
 
+int tegra_hwpm_perfmux_disable(struct tegra_soc_hwpm *hwpm,
+	struct hwpm_ip_aperture *perfmux);
+int tegra_hwpm_reserve_rtr(struct tegra_soc_hwpm *hwpm);
+int tegra_hwpm_release_rtr(struct tegra_soc_hwpm *hwpm);
 int tegra_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource);
 int tegra_hwpm_release_resources(struct tegra_soc_hwpm *hwpm);
 int tegra_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm);
 
-int tegra_hwpm_reserve_rtr(struct tegra_soc_hwpm *hwpm);
-int tegra_hwpm_release_rtr(struct tegra_soc_hwpm *hwpm);
-
 int tegra_hwpm_element_reserve(struct tegra_soc_hwpm *hwpm,
 	struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *perfmon);
 int tegra_hwpm_element_release(struct tegra_soc_hwpm *hwpm,
@@ -56,6 +57,10 @@ int tegra_hwpm_element_release(struct tegra_soc_hwpm *hwpm,
 int tegra_hwpm_set_fs_info_ip_ops(struct tegra_soc_hwpm *hwpm,
 	struct tegra_hwpm_ip_ops *ip_ops,
 	u64 base_address, u32 ip_idx, bool available);
+int tegra_hwpm_get_fs_info(struct tegra_soc_hwpm *hwpm,
+	u32 ip_enum, u64 *fs_mask, u8 *ip_status);
+int tegra_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
+	u32 resource_enum, u8 *status);
 int tegra_hwpm_finalize_chip_info(struct tegra_soc_hwpm *hwpm);
 int tegra_hwpm_ip_handle_power_mgmt(struct tegra_soc_hwpm *hwpm,
 	struct hwpm_ip_inst *ip_inst, bool disable);
@@ -63,6 +68,14 @@ int tegra_hwpm_ip_handle_power_mgmt(struct tegra_soc_hwpm *hwpm,
 int tegra_hwpm_alloc_alist_map(struct tegra_soc_hwpm *hwpm);
 int tegra_hwpm_get_allowlist_size(struct tegra_soc_hwpm *hwpm);
 int tegra_hwpm_combine_alist(struct tegra_soc_hwpm *hwpm, u64 *alist);
+size_t tegra_hwpm_get_alist_buf_size(struct tegra_soc_hwpm *hwpm);
+int tegra_hwpm_zero_alist_regs(struct tegra_soc_hwpm *hwpm,
+	struct hwpm_ip_inst *ip_inst, struct hwpm_ip_aperture *aperture);
+int tegra_hwpm_copy_alist(struct tegra_soc_hwpm *hwpm,
+	struct hwpm_ip_aperture *aperture, u64 *full_alist,
+	u64 *full_alist_idx);
+bool tegra_hwpm_check_alist(struct tegra_soc_hwpm *hwpm,
+	struct hwpm_ip_aperture *aperture, u64 phys_addr);
 
 int tegra_hwpm_setup_hw(struct tegra_soc_hwpm *hwpm);
 int tegra_hwpm_setup_sw(struct tegra_soc_hwpm *hwpm);

os/linux/ioctl.c

@@ -76,7 +76,7 @@ static int tegra_hwpm_get_floorsweep_info_ioctl(struct tegra_soc_hwpm *hwpm,
 		return -EINVAL;
 	}
 
-	return tegra_hwpm_get_floorsweep_info(hwpm, fs_info);
+	return tegra_hwpm_obtain_floorsweep_info(hwpm, fs_info);
 }
 
 static int tegra_hwpm_get_resource_info_ioctl(struct tegra_soc_hwpm *hwpm,
@@ -90,7 +90,7 @@ static int tegra_hwpm_get_resource_info_ioctl(struct tegra_soc_hwpm *hwpm,
 		return -EINVAL;
 	}
 
-	return tegra_hwpm_get_resource_info(hwpm, rsrc_info);
+	return tegra_hwpm_obtain_resource_info(hwpm, rsrc_info);
 }
 
 static int tegra_hwpm_reserve_resource_ioctl(struct tegra_soc_hwpm *hwpm,

os/linux/ip_utils.c

@@ -94,7 +94,7 @@ static u32 tegra_hwpm_translate_soc_hwpm_ip(struct tegra_soc_hwpm *hwpm,
 	return ip_enum_idx;
 }
 
-int tegra_hwpm_get_floorsweep_info(struct tegra_soc_hwpm *hwpm,
+int tegra_hwpm_obtain_floorsweep_info(struct tegra_soc_hwpm *hwpm,
 	struct tegra_soc_hwpm_ip_floorsweep_info *fs_info)
 {
 	int ret = 0;
@@ -196,7 +196,7 @@ u32 tegra_hwpm_translate_soc_hwpm_resource(struct tegra_soc_hwpm *hwpm,
 	return res_enum_idx;
 }
 
-int tegra_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
+int tegra_hwpm_obtain_resource_info(struct tegra_soc_hwpm *hwpm,
 	struct tegra_soc_hwpm_resource_info *rsrc_info)
 {
 	int ret = 0;

os/linux/ip_utils.h

@@ -22,9 +22,9 @@ struct tegra_soc_hwpm_resource_info;
 int tegra_hwpm_complete_ip_register_impl(struct tegra_soc_hwpm *hwpm);
 u32 tegra_hwpm_translate_soc_hwpm_resource(struct tegra_soc_hwpm *hwpm,
 	enum tegra_soc_hwpm_resource res_enum);
-int tegra_hwpm_get_floorsweep_info(struct tegra_soc_hwpm *hwpm,
+int tegra_hwpm_obtain_floorsweep_info(struct tegra_soc_hwpm *hwpm,
 	struct tegra_soc_hwpm_ip_floorsweep_info *fs_info);
-int tegra_hwpm_get_resource_info(struct tegra_soc_hwpm *hwpm,
+int tegra_hwpm_obtain_resource_info(struct tegra_soc_hwpm *hwpm,
 	struct tegra_soc_hwpm_resource_info *rsrc_info);
 void tegra_hwpm_release_ip_register_node(struct tegra_soc_hwpm *hwpm);