Commit Graph

11 Commits

Author SHA1 Message Date
Vedashree Vidwans
4f1e352286 tegra: hwpm: rename source files
Shorten source file names by removing "tegra_hwpm" prefix. This will
make understanding the code more legible.

Jira THWPM-58

Change-Id: I39aac11c9f2a763a254b0605f9d96a7b0f372992
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2729469
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-08-12 15:50:20 -07:00
Vedashree Vidwans
1563712b77 tegra: hwpm: add multiple chip config
- Add support for HWPM on next chip. Update tegra_hwpm_init_chip_info to
include next chip init.
- Rename CONFIG_SOC_HWPM_IP_* flags defined in Makefile to use chip name

Jira THWPM-41

Change-Id: I6b1556eb8775fa795699241d5efb2d3370f93531
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
(cherry picked from commit 17bb2b25bcd147a15862b62f47d29d89fa5162df)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2671797
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-06-17 07:13:24 -07:00
Vedashree Vidwans
46e2ea58f1 tegra: hwpm: fix sparse semantic violations
Fix following violations reported by sparse tool
- warning: symbol 'tegra_hwpm_debugfs_*' was not declared. Should it
be static?
  Add missing header in tegra_hwpm_debugfs.c file to fix this issue

- warning: no newline at end of file
  Add new end line in tegra_hwpm_alist_utils.c to fix this issue.

- warning: symbol 't234_chip_info' was not declared. Should it be
static?
  Modify t234_chip_info structure to be static to fix this issue.

- warning: symbol '*_perfmon_element_static_array' was not declared.
Should it be static?
- warning: symbol '*_perfmux_element_static_array' was not declared.
Should it be static?
- warning: symbol '*_inst_static_array' was not declared. Should it
be static?
  Modify each *_perfmon_element_static_array,
*_perfmux_element_static_array and *_inst_static_array in all IPs to be
static to fix this issue.

Bug 3528414

Change-Id: I58e7a1c6e14988d7315fb8d160aa7f89a2eb4cf5
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2725821
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-06-09 14:24:48 -07:00
Vedashree Vidwans
5518c6ea4c tegra: hwpm: set IP config as per fuse setting
Performance monitoring of IPs is dependent on the build config.
Read SOC fuses and set IP override_enable accordingly.

Jira THWPM-41

Change-Id: Id289a3e6763d3f3a7852e098b8a12be2eeec8e62
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2677058
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-25 11:41:10 -07:00
Vedashree Vidwans
146211284c tegra: hwpm: Update IP config flags
Add IP config flag conditions missing from ip util functions.
Re-arrange config flags in Makefile along with ip object files.
Add Kconfig file to define chip specific configs.

Jira THWPM-8

Change-Id: Iebe4a6e5e3927a00deb4e2611bbc731eeb526f82
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2707317
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-18 22:57:23 -07:00
Vedashree Vidwans
6fa5d10ca0 tegra: hwpm: update floorsweep info IOCTL
- Update tegra_soc_hwpm_ip enum to hold only IPs which can be
floorswept.
- Update floorsweep_info IOCTL to return floorsweepable component
details of tegra_soc_hwpm_ip IPs.

Bug 3573882

Change-Id: Ia62222ba8afdf60b25d0f3701bfd2be215bb6071
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2713363
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-18 22:57:12 -07:00
Vedashree Vidwans
dd86a4afb2 tegra: hwpm: update and add IOCTLs in UAPI header
- Add resource_info IOCTL to return status of HWPM resources.
- Remove TEGRA_SOC_HWPM_RESOURCE_MSS_NVLINK which is duplicate of
MSS_GPU_HUB.
- Add logic for resource_info IOCTL in the driver code.
- Ptimer and TSC timer have 1:1 relation. Hence timer relation IOCTLs
are not required.

Bug 3573882

Change-Id: I937c6c72636f0c786391a74785673060038d385e
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2707447
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-18 22:57:07 -07:00
Vedashree Vidwans
3b6a1b35b7 tegra: hwpm: update basic structure layout
Introduced macros to define HWPM aperture types perfmon, perfmux and
broadcast.
Added new enum to define element type.
IP perfmux and IP broadcast are handled in similar way. Whereas, HWPM
perfmux should use HWPM perfmon functions.

Updated hwpm structures are as below
Parent HWPM structure
  -> Active chip structure
     -> Array of IPs
     -> HALs

IP structure
  -> Array of instances
  -> Array of instance info with respect to perfmon, perfmux, broadcast
  -> Instance mask : indicates available instances
  -> reserved status

Instance structure
  -> Array of element info with respect to perfmon, perfmux, broadcast
      -> Array of corresponding element structures
  -> Element mask : indicates available elements in the instance

Element structure
  -> Aperture address details
  -> DT node / MMIO details

Update all functions to use new HWPM structures.

Update hwpm_probe to include force IP enable step.

Jira THWPM-41

Change-Id: I9461063d2136b34e841322c4ddd77a20486424c6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2706489
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-05-17 08:43:01 -07:00
Vedashree Vidwans
53f8d0799c tegra: hwpm: update IP registration logic
HWPM supports various IPs which initialize at different times in boot
flow. Some IPs such as MSS, NVLINK initialize before HWPM device and
some IPs (VIC, OFA, NVDEC, NVDLA) are initialized after HWPM device.
Modify IP register function to store registration requests in a
linked list for IPs initialized before HWPM device is probed.
The linked list will be traversed to complete pending IP register
requests after HWPM device is initialized.
- Add struct tegra_hwpm_ip_ops internal to HWPM driver to include only
required ip_ops details.
- Replace init_fs_info HAL with finalize_chip_info to register ip_ops,
force enable IPs (if any).

Jira THWPM-41

Change-Id: I916b4fa50679e79025a941a9c1fc113bdfe92b41
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2675472
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-20 13:26:26 -07:00
Vedashree Vidwans
bc59377a8f tegra: hwpm: rewrite active ip enum macros
- Update active ip enum flag macros to make it more legible.

Jira THWPM-41

Change-Id: Ic23f39c85080a931128592fef173c2257aa6cf9c
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2675470
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-03-15 17:33:00 -07:00
Vedashree Vidwans
92be6f7a00 tegra: hwpm: restructure HWPM driver
- Update HWPM driver to add HAL layer. This will allow support for multiple chips.
- Add below data structure hierarchy for HWPM driver
HWPM driver structure -> chip info struct -> ip info array -> perfmux/perfmon info array
NOTE: To make commit message more legible, using "aperture" instead of "perfmux and/or perfmon"
- Chip info structure contains
  - Array of IP info
  - HAL function pointers
- IP info structure contains IP specific info
  - Number of instances
  - Number of apertures per instance
  - Aperture ranges, strides, static info array
  - Aperture dynamic arrays
- Aperture info structure contains
  - Hw index
  - Physical address info
  - MMIO address info
- Add separate IP info files
- Create separate files that include logic for allowlist, memory buffer, resources, ip, regops to make functions more legible.
- Move probe, ioctl and io functions to os/linux path.
- Add fn, info, register and verbose debug log levels to controls debug messages
  - add debugfs node to update dbg_mask
- Correct MGBE perfmux base address

Jira THWPM-41

Change-Id: I8ffdaa657789e2a187cbb98502d0359bb57f9c54
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2651377
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-09 09:46:25 -08:00