mirror of
git://nv-tegra.nvidia.com/linux-hwpm.git
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492dd01e04
Enable clock/reset/unpowergate sequence for silicon. THWPM-2 Change-Id: I5a9ad97b053b8b8b2409077e99cb206dcc4b544f Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2556233 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
107 lines
2.9 KiB
C
107 lines
2.9 KiB
C
/*
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* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* tegra-soc-hwpm.h:
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* This is the header for the Tegra SOC HWPM driver.
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*/
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#ifndef TEGRA_SOC_HWPM_H
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#define TEGRA_SOC_HWPM_H
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#include <linux/reset.h>
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/dma-buf.h>
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#include <linux/scatterlist.h>
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#include <linux/cdev.h>
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#include <linux/delay.h>
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#include "tegra-soc-hwpm-log.h"
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#include "tegra-soc-hwpm-hw.h"
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#include <uapi/linux/tegra-soc-hwpm-uapi.h>
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/* FIXME: Default timeout is 1 sec. Is this sufficient for pre-si? */
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#define HWPM_TIMEOUT(timeout_check, expiry_msg) ({ \
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bool timeout_expired = false; \
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s32 timeout_msecs = 1000; \
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u32 sleep_msecs = 100; \
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while(!(timeout_check)) { \
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msleep(sleep_msecs); \
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timeout_msecs -= sleep_msecs; \
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if (timeout_msecs <= 0) { \
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tegra_soc_hwpm_err("Timeout expired for %s!", \
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expiry_msg); \
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timeout_expired = true; \
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break; \
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} \
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} \
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timeout_expired; \
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})
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/* Driver struct */
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struct tegra_soc_hwpm {
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/* Device */
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struct platform_device *pdev;
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struct device *dev;
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struct device_node *np;
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struct class class;
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dev_t dev_t;
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struct cdev cdev;
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/* MMIO apertures in device tree */
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void __iomem *dt_apertures[TEGRA_SOC_HWPM_NUM_DT_APERTURES];
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/* Clocks and resets */
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struct clk *la_clk;
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struct reset_control *la_rst;
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struct reset_control *hwpm_rst;
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/* Memory Management */
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struct dma_buf *stream_dma_buf;
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struct dma_buf_attachment *stream_attach;
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struct sg_table *stream_sgt;
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struct dma_buf *mem_bytes_dma_buf;
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struct dma_buf_attachment *mem_bytes_attach;
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struct sg_table *mem_bytes_sgt;
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void *mem_bytes_kernel;
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/* SW State */
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bool bind_completed;
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s32 full_wlist_size;
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/* Debugging */
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#ifdef CONFIG_DEBUG_FS
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struct dentry *debugfs_root;
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#endif
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bool fake_registers_enabled;
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};
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extern const struct file_operations tegra_soc_hwpm_ops;
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#ifdef CONFIG_DEBUG_FS
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void tegra_soc_hwpm_debugfs_init(struct tegra_soc_hwpm *hwpm);
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void tegra_soc_hwpm_debugfs_deinit(struct tegra_soc_hwpm *hwpm);
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#else
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static inline void tegra_soc_hwpm_debugfs_init(struct tegra_soc_hwpm *hwpm)
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{
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hwpm->debugfs_root = NULL;
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}
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static inline void tegra_soc_hwpm_debugfs_deinit(struct tegra_soc_hwpm *hwpm) {}
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#endif /* CONFIG_DEBUG_FS */
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#endif /* TEGRA_SOC_HWPM_H */
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