Vedashree Vidwans 92be6f7a00 tegra: hwpm: restructure HWPM driver ...

- Update HWPM driver to add HAL layer. This will allow support for multiple chips.
- Add below data structure hierarchy for HWPM driver
HWPM driver structure -> chip info struct -> ip info array -> perfmux/perfmon info array
NOTE: To make commit message more legible, using "aperture" instead of "perfmux and/or perfmon"
- Chip info structure contains
  - Array of IP info
  - HAL function pointers
- IP info structure contains IP specific info
  - Number of instances
  - Number of apertures per instance
  - Aperture ranges, strides, static info array
  - Aperture dynamic arrays
- Aperture info structure contains
  - Hw index
  - Physical address info
  - MMIO address info
- Add separate IP info files
- Create separate files that include logic for allowlist, memory buffer, resources, ip, regops to make functions more legible.
- Move probe, ioctl and io functions to os/linux path.
- Add fn, info, register and verbose debug log levels to controls debug messages
  - add debugfs node to update dbg_mask
- Correct MGBE perfmux base address

Jira THWPM-41

Change-Id: I8ffdaa657789e2a187cbb98502d0359bb57f9c54
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2651377
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit

2022-02-09 09:46:25 -08:00

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