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Allowlist, get IP/resource info and perfmux disable HALs defined in t234 specific files do not require any chip specific details. Move such functions to common files. This way common functions can be reused by future chips, reducing maintainability of these functions. Rename linux specific get_resource_info and get_floorsweep_info functions to avoid multiple definitions. Jira THPM-41 Change-Id: I0fc9eaf5b5d2591fa740939e1a43fe6911b5a378 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2780702 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
121 lines
2.8 KiB
C
121 lines
2.8 KiB
C
/*
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* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <tegra_hwpm_log.h>
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#include <tegra_hwpm.h>
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#include <tegra_hwpm_common.h>
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#include <tegra_hwpm_static_analysis.h>
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int tegra_hwpm_perfmux_disable(struct tegra_soc_hwpm *hwpm,
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struct hwpm_ip_aperture *perfmux)
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{
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tegra_hwpm_fn(hwpm, " ");
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return 0;
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}
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int tegra_hwpm_reserve_rtr(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_func_single_ip(hwpm, NULL,
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TEGRA_HWPM_RESERVE_GIVEN_RESOURCE,
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active_chip->get_rtr_int_idx(hwpm));
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed to reserve IP %d",
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active_chip->get_rtr_int_idx(hwpm));
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return err;
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}
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return err;
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}
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int tegra_hwpm_release_rtr(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_func_single_ip(hwpm, NULL,
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TEGRA_HWPM_RELEASE_ROUTER,
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active_chip->get_rtr_int_idx(hwpm));
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed to release IP %d",
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active_chip->get_rtr_int_idx(hwpm));
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return err;
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}
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return err;
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}
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int tegra_hwpm_reserve_resource(struct tegra_soc_hwpm *hwpm, u32 resource)
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{
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struct tegra_soc_hwpm_chip *active_chip = hwpm->active_chip;
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u32 ip_idx = TEGRA_HWPM_IP_INACTIVE;
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int err = 0;
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tegra_hwpm_fn(hwpm, " ");
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tegra_hwpm_dbg(hwpm, hwpm_info,
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"User requesting to reserve resource %d", resource);
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/* Translate resource to ip_idx */
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if (!active_chip->is_resource_active(hwpm, resource, &ip_idx)) {
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tegra_hwpm_err(hwpm, "Requested resource %d is unavailable",
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resource);
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return -EINVAL;
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}
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err = tegra_hwpm_func_single_ip(hwpm, NULL,
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TEGRA_HWPM_RESERVE_GIVEN_RESOURCE, ip_idx);
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed to reserve IP %d", ip_idx);
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return err;
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}
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return 0;
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}
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int tegra_hwpm_bind_resources(struct tegra_soc_hwpm *hwpm)
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{
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int err = 0;
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tegra_hwpm_fn(hwpm, " ");
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err = tegra_hwpm_func_all_ip(hwpm, NULL, TEGRA_HWPM_BIND_RESOURCES);
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if (err != 0) {
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tegra_hwpm_err(hwpm, "failed to bind resources");
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return err;
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}
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return err;
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}
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int tegra_hwpm_release_resources(struct tegra_soc_hwpm *hwpm)
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{
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int ret = 0;
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tegra_hwpm_fn(hwpm, " ");
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ret = tegra_hwpm_func_all_ip(hwpm, NULL, TEGRA_HWPM_RELEASE_RESOURCES);
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if (ret != 0) {
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tegra_hwpm_err(hwpm, "failed to release resources");
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return ret;
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}
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return 0;
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}
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