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t26x: update phys address size in vs_config_info

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Bug 5083802

Change-Id: I33eb20e45292f0b71ba5df70ae2f1fc5471c5b17
Signed-off-by: Sakar Arora <sakara@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3341746
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vipin Kumar <vipink@nvidia.com>
Reviewed-by: Sanjith T D <std@nvidia.com>
This commit is contained in:
Sakar Arora
2025-04-16 05:54:13 +00:00
committed by Jon Hunter
parent 9bf1a3723f
commit 0ac4068c89
3 changed files with 5 additions and 5 deletions
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2
drivers/block/tegra_virt_storage/tegra_hv_vblk.c
View File

@@ -989,7 +989,7 @@ vblk_phys_base_show(struct device *dev, struct device_attribute *attr,
struct gendisk *disk = dev_to_disk(dev); struct gendisk *disk = dev_to_disk(dev);
struct vblk_dev *vblk = disk->private_data; struct vblk_dev *vblk = disk->private_data;
return snprintf(buf, 16, "0x%x\n", vblk->config.phys_base); return snprintf(buf, 16, "0x%llx\n", vblk->config.phys_base);
} }
static ssize_t static ssize_t

4
drivers/mtd/devices/tegra_hv_mtd.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/* /*
* SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/ */
#include <nvidia/conftest.h> #include <nvidia/conftest.h>
@@ -468,7 +468,7 @@ static ssize_t vmtd_phys_base_show(struct device *dev,
{ {
struct vmtd_dev *vmtddev = dev_get_drvdata(dev); struct vmtd_dev *vmtddev = dev_get_drvdata(dev);
return snprintf(buf, 16, "0x%x\n", vmtddev->config.phys_base); return snprintf(buf, 16, "0x%llx\n", vmtddev->config.phys_base);
} }
static DEVICE_ATTR(phys_base, 0444, vmtd_phys_base_show, NULL); static DEVICE_ATTR(phys_base, 0444, vmtd_phys_base_show, NULL);

4
include/tegra_virt_storage_spec.h
View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. * Copyright (c) 2022-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/ */
#ifndef _TEGRA_VIRT_STORAGE_SPEC_H_ #ifndef _TEGRA_VIRT_STORAGE_SPEC_H_
@@ -270,7 +270,7 @@ struct vs_config_info {
struct vs_mtd_dev_config mtd_config; struct vs_mtd_dev_config mtd_config;
}; };
uint32_t phys_dev; uint32_t phys_dev;
uint32_t phys_base; uint64_t phys_base;
uint32_t storage_type; uint32_t storage_type;
uint32_t priority; uint32_t priority;
uint8_t speed_mode[SPEED_MODE_MAX_LEN]; uint8_t speed_mode[SPEED_MODE_MAX_LEN];