mirror of
git://nv-tegra.nvidia.com/linux-nv-oot.git
synced 2025-12-24 02:01:36 +03:00
crypto: tegra: Remove nvhost_module*() functions
Add alternative function to initialize clocks instead of
nvhost_module_init() to fix "failed to get reset" issue.
Also, remove other failing nvhost functions as the nvhost driver
exists only for backward compatibility.
Bug 3583641
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Fixes: 198a0ba027 ("crypto: tegra: Add support for SE on host1x to OOT")
Change-Id: Id6a5ecf7900643b13518e1c9cf657aac99a6bd5d
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2782949
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -1319,14 +1319,6 @@ static int tegra_se_channel_submit_gather(struct tegra_se_dev *se_dev,
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return -ENOMEM;
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}
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err = nvhost_module_busy(se_dev->pdev);
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if (err) {
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dev_err(se_dev->dev, "nvhost_module_busy failed for se_dev\n");
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if (priv)
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devm_kfree(se_dev->dev, priv);
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return err;
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}
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if (!se_dev->channel) {
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se_dev->channel = host1x_channel_request(&se_dev->client);
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if (err) {
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@@ -1358,6 +1350,10 @@ static int tegra_se_channel_submit_gather(struct tegra_se_dev *se_dev,
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syncpt_id = se_dev->syncpt_id;
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/* initialize job data */
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/* FIXME: Remove 'pdata' dependency here. Since 'pdata' is a static
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* variable this causes failure when multiple instances of driver
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* with same compatible is run.
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* */
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job->syncpt = host1x_syncpt_get_by_id(pdata->host1x, syncpt_id);
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job->syncpt_incrs = 1;
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job->client = &se_dev->client;
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@@ -1478,7 +1474,6 @@ static int tegra_se_channel_submit_gather(struct tegra_se_dev *se_dev,
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error:
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host1x_job_put(job);
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exit:
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nvhost_module_idle(se_dev->pdev);
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if (err)
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devm_kfree(se_dev->dev, priv);
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@@ -1904,23 +1899,6 @@ static u32 tegra_se_get_crypto_config(struct tegra_se_dev *se_dev,
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val |= SE_CRYPTO_HASH(HASH_ENABLE);
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if (mode == SE_AES_OP_MODE_RNG_DRBG) {
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/* Make sure engine is powered ON*/
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err = nvhost_module_busy(se_dev->pdev);
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if (err < 0) {
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dev_err(se_dev->dev,
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"nvhost_module_busy failed for se with err: %d\n",
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err);
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/*
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* Do not program force reseed if nvhost_module_busy
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* failed. This can result in a crash as clocks might
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* be disabled.
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*
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* Return val if unable to power on SE
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*/
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return val;
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}
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if (force_reseed_count <= 0) {
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se_writel(se_dev,
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SE_RNG_CONFIG_MODE(DRBG_MODE_FORCE_RESEED) |
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@@ -1937,9 +1915,6 @@ static u32 tegra_se_get_crypto_config(struct tegra_se_dev *se_dev,
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se_writel(se_dev, RNG_RESEED_INTERVAL,
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SE_RNG_RESEED_INTERVAL_REG_OFFSET);
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/* Power off device after register access done */
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nvhost_module_idle(se_dev->pdev);
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}
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pr_debug("%s:%d crypto_config val = 0x%x\n", __func__, __LINE__, val);
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@@ -2100,15 +2075,6 @@ static int tegra_se_read_cmac_result(struct tegra_se_dev *se_dev, u8 *pdata,
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u32 i;
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int err = 0;
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/* Make SE engine is powered ON */
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err = nvhost_module_busy(se_dev->pdev);
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if (err < 0) {
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dev_err(se_dev->dev,
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"nvhost_module_busy failed for se with err: %d\n",
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err);
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return err;
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}
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for (i = 0; i < nbytes / 4; i++) {
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if (se_dev->chipdata->kac_type == SE_KAC_T23X) {
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result[i] = se_readl(se_dev,
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@@ -2123,8 +2089,6 @@ static int tegra_se_read_cmac_result(struct tegra_se_dev *se_dev, u8 *pdata,
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result[i] = be32_to_cpu(result[i]);
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}
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nvhost_module_idle(se_dev->pdev);
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return 0;
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}
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@@ -2133,14 +2097,6 @@ static int tegra_se_clear_cmac_result(struct tegra_se_dev *se_dev, u32 nbytes)
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u32 i;
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int err = 0;
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err = nvhost_module_busy(se_dev->pdev);
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if (err < 0) {
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dev_err(se_dev->dev,
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"nvhost_module_busy failed for se with err: %d\n",
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err);
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return err;
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}
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for (i = 0; i < nbytes / 4; i++) {
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if (se_dev->chipdata->kac_type == SE_KAC_T23X) {
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se_writel(se_dev, 0x0, se_dev->opcode_addr +
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@@ -2153,8 +2109,6 @@ static int tegra_se_clear_cmac_result(struct tegra_se_dev *se_dev, u32 nbytes)
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}
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}
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nvhost_module_idle(se_dev->pdev);
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return 0;
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}
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@@ -7420,6 +7374,36 @@ reg_fail:
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}
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static int tegra_se_clk_init(struct platform_device *pdev)
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{
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struct nvhost_device_data *pdata = platform_get_drvdata(pdev);
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unsigned int i;
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int err;
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err = devm_clk_bulk_get_all(&pdev->dev, &pdata->clks);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to get clocks %d\n", err);
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return err;
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}
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pdata->num_clks = err;
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for (i = 0; i < pdata->num_clks; i++) {
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err = clk_set_rate(pdata->clks[i].clk, ULONG_MAX);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to set clock rate!\n");
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return err;
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}
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}
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err = clk_bulk_prepare_enable(pdata->num_clks, pdata->clks);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to enabled clocks: %d\n", err);
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return err;
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}
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return 0;
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}
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static int tegra_se_client_init(struct host1x_client *client)
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{
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@@ -7507,10 +7491,11 @@ static int tegra_se_probe(struct platform_device *pdev)
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return err;
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}
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err = nvhost_module_init(pdev);
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err = tegra_se_clk_init(pdev);
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if (err) {
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dev_err(se_dev->dev,
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"nvhost_module_init failed for SE(%s)\n", pdev->name);
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"Enabling clocks failed for SE(%s)\n",
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pdev->name);
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return err;
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}
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@@ -7646,20 +7631,11 @@ static int tegra_se_probe(struct platform_device *pdev)
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sizeof(rsa_alg.base.cra_name) - 1);
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if (is_algo_supported(node, "drbg")) {
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/* Make sure engine is powered ON with clk enabled */
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err = nvhost_module_busy(pdev);
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if (err) {
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dev_err(se_dev->dev,
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"nvhost_module_busy failed for se_dev\n");
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goto reg_fail;
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}
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se_writel(se_dev,
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SE_RNG_SRC_CONFIG_RO_ENT_SRC(DRBG_RO_ENT_SRC_ENABLE) |
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SE_RNG_SRC_CONFIG_RO_ENT_SRC_LOCK(
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DRBG_RO_ENT_SRC_LOCK_ENABLE),
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SE_RNG_SRC_CONFIG_REG_OFFSET);
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/* Power OFF after SE register update */
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nvhost_module_idle(pdev);
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}
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tegra_se_crypto_register(se_dev);
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@@ -7765,7 +7741,6 @@ static struct platform_driver tegra_se_driver = {
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.name = "tegra-se-nvhost",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(tegra_se_of_match),
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.pm = &nvhost_module_pm_ops,
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.suppress_bind_attrs = true,
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},
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};
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