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nvadsp: Set shared_mem_hwmbox in resume flow

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Platforms that implement suspend-resume as clean firmware
restart need to latch the shared mem address in every
suspend-resume cycle, but mbox value may be lost due to
module reset, so ensure that shared_mem_hwmbox is written
unconditionally in os_start flow.

Bug 3916054

Change-Id: I649d70871401475d66e0e50abeeaf4c347040119
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3180285
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Asha T <atalambedu@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
This commit is contained in:
Viswanath L
2024-07-23 19:05:33 +00:00
committed by mobile promotions
parent cba663d0db
commit 13814dc9f7
1 changed files with 16 additions and 16 deletions
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32
drivers/platform/tegra/nvadsp/os.c
View File

@@ -1738,26 +1738,26 @@ static int _nvadsp_os_start(struct nvadsp_handle *nvadsp_handle)
if (ret < 0)
goto unlock;
if (priv->cold_start) {
if (drv_data->chip_data->adsp_shared_mem_hwmbox != 0) {
if (drv_data->chip_data->adsp_shared_mem_hwmbox != 0) {
#ifdef CONFIG_TEGRA_ADSP_MULTIPLE_FW
int i;
for (i = 0; i < MFW_MAX_OTHER_CORES; i++) {
if (mfw_hsp_va[i]) {
writel((uint32_t)mfw_smem_iova[i],
mfw_hsp_va[i] +
drv_data->chip_data->
adsp_shared_mem_hwmbox
);
}
int i;
for (i = 0; i < MFW_MAX_OTHER_CORES; i++) {
if (mfw_hsp_va[i]) {
writel((uint32_t)mfw_smem_iova[i],
mfw_hsp_va[i] +
drv_data->chip_data->
adsp_shared_mem_hwmbox
);
}
}
#endif // CONFIG_TEGRA_ADSP_MULTIPLE_FW
hwmbox_writel(drv_data,
(uint32_t)drv_data->shared_adsp_os_data_iova,
drv_data->chip_data->adsp_shared_mem_hwmbox);
}
hwmbox_writel(drv_data,
(uint32_t)drv_data->shared_adsp_os_data_iova,
drv_data->chip_data->adsp_shared_mem_hwmbox);
}
if (priv->cold_start) {
if (!is_tegra_hypervisor_mode() &&
drv_data->chip_data->adsp_os_config_hwmbox != 0) {
/* Set ADSP to do decompression */
@@ -1769,7 +1769,7 @@ static int _nvadsp_os_start(struct nvadsp_handle *nvadsp_handle)
drv_data->chip_data->adsp_os_config_hwmbox);
}
/* Write ACSR base address and decompr enable flag only once */
/* Write decompr enable flag only once */
priv->cold_start = false;
}