DCE-KMD: Move IPC region alloc/free calls to OS

- Move IPC region alloc/free calls to OS layer because
  they mean different for different OSs.

- For Linux it will allocate/dma map memory for IVC comm.

- For HVRTOS it will simply fetch pre-allocated memory details
  since the memory allocation is only allowed in hypervisor module.

- Accordingly, rename the API dce_ipc_allocate_region() ->
  dce_ipc_init_region_info(). Similarly for free as well.

JIRA TDS-16052

Change-Id: I201cb5b1bc7384a9b0ccdbf5bc72bbd78d6b1506
Signed-off-by: anupamg <anupamg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3180405
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
anupamg
2024-07-23 21:51:14 +00:00
committed by Jon Hunter
parent f5d25922eb
commit 1b6b1c620b
4 changed files with 90 additions and 66 deletions

View File

@@ -234,7 +234,7 @@ int dce_admin_init(struct tegra_dce *d)
int ret = 0;
d->boot_status |= DCE_EARLY_INIT_START;
ret = dce_ipc_allocate_region(d);
ret = dce_ipc_init_region_info(d);
if (ret) {
dce_err(d, "IPC region allocation failed");
goto err_ipc_reg_alloc;
@@ -250,7 +250,7 @@ int dce_admin_init(struct tegra_dce *d)
return 0;
err_channel_init:
dce_ipc_free_region(d);
dce_ipc_deinit_region_info(d);
err_ipc_reg_alloc:
d->boot_status |= DCE_EARLY_INIT_FAILED;
return ret;
@@ -268,7 +268,7 @@ void dce_admin_deinit(struct tegra_dce *d)
{
dce_admin_channel_deinit(d);
dce_ipc_free_region(d);
dce_ipc_deinit_region_info(d);
dce_mailbox_deinit_interface(d,
DCE_MAILBOX_ADMIN_INTERFACE);

View File

@@ -131,67 +131,6 @@ static struct dce_ipc_channel ivc_channels[DCE_IPC_CH_KMD_TYPE_MAX] = {
},
};
/**
* dce_ipc_allocate_region - Allocates IPC region for IVC
*
* @ch : Pointer to the pertinent dce_ipc_channel.
* @q_size : IVC queue size.
*
* Return : 0 if successful
*/
int dce_ipc_allocate_region(struct tegra_dce *d)
{
unsigned long tot_q_sz;
unsigned long tot_ivc_q_sz;
struct device *dev;
struct dce_ipc_region *region;
dev = dev_from_dce(d);
region = &d->d_ipc.region;
tot_q_sz = ((DCE_ADMIN_CMD_MAX_NFRAMES *
tegra_ivc_align(DCE_ADMIN_CMD_MAX_FSIZE) * 2) +
(DCE_DISPRM_CMD_MAX_NFRAMES *
tegra_ivc_align(DCE_DISPRM_CMD_MAX_FSIZE) * 2) +
(DCE_ADMIN_CMD_MAX_NFRAMES *
tegra_ivc_align(DCE_ADMIN_CMD_CHAN_FSIZE) * 2) +
(DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_NFRAMES *
tegra_ivc_align(DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_FSIZE) * 2)
);
tot_ivc_q_sz = tegra_ivc_total_queue_size(tot_q_sz);
region->size = dce_get_nxt_pow_of_2(&tot_ivc_q_sz, 32);
region->base = dma_alloc_coherent(dev, region->size,
&region->iova, GFP_KERNEL | __GFP_ZERO);
if (!region->base)
return -ENOMEM;
region->s_offset = 0;
return 0;
}
/**
* dce_ipc_free_region - Frees up the IPC region for IVC
*
* @d : Pointer to the tegra_dce struct.
*
* Return : Void
*/
void dce_ipc_free_region(struct tegra_dce *d)
{
struct device *dev;
struct dce_ipc_region *region;
dev = dev_from_dce(d);
region = &d->d_ipc.region;
dma_free_coherent(dev, region->size,
(void *)region->base, region->iova);
region->s_offset = 0;
}
/**
* dce_ipc_signal_target - Generic function to signal target.
*

View File

@@ -666,3 +666,88 @@ int dce_init_work(struct tegra_dce *d,
return 0;
}
/**
* ipc_allocate_region [Private] - Allocates IPC region
*
* @d : Pointer to tegra_dce structure.
*
* Return : 0 if successful
*/
static int ipc_allocate_region(struct tegra_dce *d)
{
unsigned long tot_q_sz;
unsigned long tot_ivc_q_sz;
struct device *dev;
struct dce_ipc_region *region;
dev = dev_from_dce(d);
region = &d->d_ipc.region;
tot_q_sz = ((DCE_ADMIN_CMD_MAX_NFRAMES *
tegra_ivc_align(DCE_ADMIN_CMD_MAX_FSIZE) * 2) +
(DCE_DISPRM_CMD_MAX_NFRAMES *
tegra_ivc_align(DCE_DISPRM_CMD_MAX_FSIZE) * 2) +
(DCE_ADMIN_CMD_MAX_NFRAMES *
tegra_ivc_align(DCE_ADMIN_CMD_CHAN_FSIZE) * 2) +
(DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_NFRAMES *
tegra_ivc_align(DCE_DISPRM_EVENT_NOTIFY_CMD_MAX_FSIZE) * 2)
);
tot_ivc_q_sz = tegra_ivc_total_queue_size(tot_q_sz);
region->size = dce_get_nxt_pow_of_2(&tot_ivc_q_sz, 32);
region->base = dma_alloc_coherent(dev, region->size,
&region->iova, GFP_KERNEL | __GFP_ZERO);
if (!region->base)
return -ENOMEM;
region->s_offset = 0;
return 0;
}
/**
* ipc_free_region [Private] - Frees up the IPC region
*
* @d : Pointer to the tegra_dce struct.
*
* Return : Void
*/
static void ipc_free_region(struct tegra_dce *d)
{
struct device *dev;
struct dce_ipc_region *region;
dev = dev_from_dce(d);
region = &d->d_ipc.region;
dma_free_coherent(dev, region->size,
(void *)region->base, region->iova);
region->s_offset = 0;
}
/**
* dce_ipc_init_region_info - Initialize IPC region information.
*
* @d : Pointer to tegra_dce structure.
*
* Return : 0 if successful
*/
int dce_ipc_init_region_info(struct tegra_dce *d)
{
return ipc_allocate_region(d);
}
/**
* dce_os_ipc_deinit_region_info - De-initialize the IPC region
*
* @d : Pointer to the tegra_dce struct.
*
* Return : Void
*/
void dce_ipc_deinit_region_info(struct tegra_dce *d)
{
return ipc_free_region(d);
}

View File

@@ -159,9 +159,9 @@ int dce_ipc_send_message_sync(struct tegra_dce *d,
int dce_ipc_get_channel_info(struct tegra_dce *d,
struct dce_ipc_queue_info *q_info, u32 ch_index);
void dce_ipc_free_region(struct tegra_dce *d);
void dce_ipc_deinit_region_info(struct tegra_dce *d);
int dce_ipc_allocate_region(struct tegra_dce *d);
int dce_ipc_init_region_info(struct tegra_dce *d);
struct tegra_dce *dce_ipc_get_dce_from_ch(u32 ch_type);