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devicetree:bindings:nvpps: Add ptp_tsc_sync_trig_interval param to doc.
Add ptp_tsc_sync_trig_interval param to nvpps doc. This is used to define the sync trigger interval Bug 5042311 Bug 4899241 Signed-off-by: Sheetal Tigadoli <stigadoli@nvidia.com> Change-Id: I881d4a57af857345adfc3e854ea06bb00e3d3a6f Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3294330 (cherry picked from commit 9c14041a4f394a203f0b8f4a8afdf9053011c14a) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3293843 Reviewed-by: Amlan Kundu <akundu@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
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Jon Hunter
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@@ -39,6 +39,12 @@ Optional properties:
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Max value(16777215) correspond to approx 16.77ms
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- ptp_tsc_sync_dis: boolean flag to indicate if nvpps should disable PTP TSC sync logic.
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The default behaviour is to keep PTP TSC sync logic enabled.
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- ptp_tsc_sync_trig_interval: Defines interval(in terms of PPS edge count) at which PTP-TSC sync
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alignment should be triggered eg: if value 3 is provided, then an attempt is
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made to sync TSC with PTP(if not synchronized) on every 3rd PPS edge.
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Supported min & max values are 1 & 8 respectively and by default, value
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of 1 is used to trigger TSC sync on every PPS edge.
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- reg: specifies start address and registers count details of TSC module. It is only applicable for Orin.
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- nvpps-gpios: specifies GPIO number for PPS input signal.
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- timestamps: specifies timestamp for the GPIO provided by HTE.
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