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media: add imx390 sensor driver

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Add imx390 camera sensor driver code,
mode tables and makefile changes.

Bug 3583587
Bug 4058151

Change-Id: I2b67d355d2684ccb6ab12881ac0d0d5b30447cc4
Signed-off-by: Ankur Pawar <ankurp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2879227
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Ankur Pawar
2023-03-29 11:59:17 +00:00
committed by mobile promotions
parent d7d941e745
commit 2ceba857fd
5 changed files with 5660 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/media/i2c/Makefile
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@@ -3,9 +3,12 @@
subdir-ccflags-y += -Werror
obj-m += max9295.o
obj-m += max9296.o
obj-m += nv_imx185.o
obj-m += nv_imx274.o
obj-m += nv_imx318.o
obj-m += nv_imx390.o
obj-m += nv_ov5693.o
obj-m += max96712.o
obj-m += nv_ar0234.o

3269
drivers/media/i2c/imx390_mode_tbls.h Normal file
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File diff suppressed because it is too large Load Diff

556
drivers/media/i2c/max9295.c Normal file
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@@ -0,0 +1,556 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/*
* max9295.c - max9295 GMSL Serializer driver
*/
#include <media/camera_common.h>
#include <linux/module.h>
#include <media/max9295.h>
/* register specifics */
#define MAX9295_MIPI_RX0_ADDR 0x330
#define MAX9295_MIPI_RX1_ADDR 0x331
#define MAX9295_MIPI_RX2_ADDR 0x332
#define MAX9295_MIPI_RX3_ADDR 0x333
#define MAX9295_PIPE_X_DT_ADDR 0x314
#define MAX9295_PIPE_Y_DT_ADDR 0x316
#define MAX9295_PIPE_Z_DT_ADDR 0x318
#define MAX9295_PIPE_U_DT_ADDR 0x31A
#define MAX9295_CTRL0_ADDR 0x10
#define MAX9295_SRC_CTRL_ADDR 0x2BF
#define MAX9295_SRC_PWDN_ADDR 0x02BE
#define MAX9295_SRC_OUT_RCLK_ADDR 0x3F1
#define MAX9295_START_PIPE_ADDR 0x311
#define MAX9295_PIPE_EN_ADDR 0x2
#define MAX9295_CSI_PORT_SEL_ADDR 0x308
#define MAX9295_I2C4_ADDR 0x44
#define MAX9295_I2C5_ADDR 0x45
#define MAX9295_DEV_ADDR 0x00
#define MAX9295_STREAM_PIPE_UNUSED 0x22
#define MAX9295_CSI_MODE_1X4 0x00
#define MAX9295_CSI_MODE_2X2 0x03
#define MAX9295_CSI_MODE_2X4 0x06
#define MAX9295_CSI_PORT_B(num_lanes) (((num_lanes) << 4) & 0xF0)
#define MAX9295_CSI_PORT_A(num_lanes) ((num_lanes) & 0x0F)
#define MAX9295_CSI_1X4_MODE_LANE_MAP1 0xE0
#define MAX9295_CSI_1X4_MODE_LANE_MAP2 0x04
#define MAX9295_CSI_2X4_MODE_LANE_MAP1 0xEE
#define MAX9295_CSI_2X4_MODE_LANE_MAP2 0xE4
#define MAX9295_CSI_2X2_MODE_LANE_MAP1 MAX9295_CSI_2X4_MODE_LANE_MAP1
#define MAX9295_CSI_2X2_MODE_LANE_MAP2 MAX9295_CSI_2X4_MODE_LANE_MAP2
#define MAX9295_ST_ID_0 0x0
#define MAX9295_ST_ID_1 0x1
#define MAX9295_ST_ID_2 0x2
#define MAX9295_ST_ID_3 0x3
#define MAX9295_PIPE_X_START_B 0x80
#define MAX9295_PIPE_Y_START_B 0x40
#define MAX9295_PIPE_Z_START_B 0x20
#define MAX9295_PIPE_U_START_B 0x10
#define MAX9295_PIPE_X_START_A 0x1
#define MAX9295_PIPE_Y_START_A 0x2
#define MAX9295_PIPE_Z_START_A 0x4
#define MAX9295_PIPE_U_START_A 0x8
#define MAX9295_START_PORT_A 0x10
#define MAX9295_START_PORT_B 0x20
#define MAX9295_CSI_LN2 0x1
#define MAX9295_CSI_LN4 0x3
#define MAX9295_EN_LINE_INFO 0x40
#define MAX9295_VID_TX_EN_X 0x10
#define MAX9295_VID_TX_EN_Y 0x20
#define MAX9295_VID_TX_EN_Z 0x40
#define MAX9295_VID_TX_EN_U 0x80
#define MAX9295_VID_INIT 0x3
#define MAX9295_SRC_RCLK 0x89
#define MAX9295_RESET_ALL 0x80
#define MAX9295_RESET_SRC 0x60
#define MAX9295_PWDN_GPIO 0x90
#define MAX9295_MAX_PIPES 0x4
struct max9295_client_ctx {
struct gmsl_link_ctx *g_ctx;
bool st_done;
};
struct max9295 {
struct i2c_client *i2c_client;
struct regmap *regmap;
struct max9295_client_ctx g_client;
struct mutex lock;
/* primary serializer properties */
__u32 def_addr;
__u32 pst2_ref;
};
static struct max9295 *prim_priv__;
struct map_ctx {
u8 dt;
u16 addr;
u8 val;
u8 st_id;
};
static int max9295_write_reg(struct device *dev, u16 addr, u8 val)
{
struct max9295 *priv = dev_get_drvdata(dev);
int err;
err = regmap_write(priv->regmap, addr, val);
if (err)
dev_err(dev, "%s:i2c write failed, 0x%x = %x\n",
__func__, addr, val);
/* delay before next i2c command as required for SERDES link */
usleep_range(100, 110);
return err;
}
int max9295_setup_streaming(struct device *dev)
{
struct max9295 *priv = dev_get_drvdata(dev);
int err = 0;
u32 csi_mode;
u32 lane_map1;
u32 lane_map2;
u32 port;
u32 rx1_lanes;
u32 st_pipe;
u32 pipe_en;
u32 port_sel = 0;
struct gmsl_link_ctx *g_ctx;
u32 i;
u32 j;
u32 st_en;
struct map_ctx map_pipe_dtype[] = {
{GMSL_CSI_DT_RAW_12, MAX9295_PIPE_Z_DT_ADDR, 0x2C,
MAX9295_ST_ID_2},
{GMSL_CSI_DT_UED_U1, MAX9295_PIPE_X_DT_ADDR, 0x30,
MAX9295_ST_ID_0},
{GMSL_CSI_DT_EMBED, MAX9295_PIPE_Y_DT_ADDR, 0x12,
MAX9295_ST_ID_1},
};
mutex_lock(&priv->lock);
if (!priv->g_client.g_ctx) {
dev_err(dev, "%s: no sdev client found\n", __func__);
err = -EINVAL;
goto error;
}
if (priv->g_client.st_done) {
dev_dbg(dev, "%s: stream setup is already done\n", __func__);
goto error;
}
g_ctx = priv->g_client.g_ctx;
switch (g_ctx->csi_mode) {
case GMSL_CSI_1X4_MODE:
csi_mode = MAX9295_CSI_MODE_1X4;
lane_map1 = MAX9295_CSI_1X4_MODE_LANE_MAP1;
lane_map2 = MAX9295_CSI_1X4_MODE_LANE_MAP2;
rx1_lanes = MAX9295_CSI_LN4;
break;
case GMSL_CSI_2X2_MODE:
csi_mode = MAX9295_CSI_MODE_2X2;
lane_map1 = MAX9295_CSI_2X2_MODE_LANE_MAP1;
lane_map2 = MAX9295_CSI_2X2_MODE_LANE_MAP2;
rx1_lanes = MAX9295_CSI_LN2;
break;
case GMSL_CSI_2X4_MODE:
csi_mode = MAX9295_CSI_MODE_2X4;
lane_map1 = MAX9295_CSI_2X4_MODE_LANE_MAP1;
lane_map2 = MAX9295_CSI_2X4_MODE_LANE_MAP2;
rx1_lanes = MAX9295_CSI_LN4;
break;
default:
dev_err(dev, "%s: invalid csi mode\n", __func__);
err = -EINVAL;
goto error;
}
port = (g_ctx->src_csi_port == GMSL_CSI_PORT_B) ?
MAX9295_CSI_PORT_B(rx1_lanes) :
MAX9295_CSI_PORT_A(rx1_lanes);
max9295_write_reg(dev, MAX9295_MIPI_RX0_ADDR, csi_mode);
max9295_write_reg(dev, MAX9295_MIPI_RX1_ADDR, port);
max9295_write_reg(dev, MAX9295_MIPI_RX2_ADDR, lane_map1);
max9295_write_reg(dev, MAX9295_MIPI_RX3_ADDR, lane_map2);
for (i = 0; i < g_ctx->num_streams; i++) {
struct gmsl_stream *g_stream = &g_ctx->streams[i];
g_stream->st_id_sel = GMSL_ST_ID_UNUSED;
for (j = 0; j < ARRAY_SIZE(map_pipe_dtype); j++) {
if (map_pipe_dtype[j].dt == g_stream->st_data_type) {
/*
* TODO:
* 1) Remove link specific overrides, depends
* on #2.
* 2) Add support for vc id based stream sel
* overrides TX_SRC_SEL. would be useful in
* using same mappings in all ser devs.
*/
if (g_ctx->serdes_csi_link ==
GMSL_SERDES_CSI_LINK_B) {
map_pipe_dtype[j].addr += 2;
map_pipe_dtype[j].st_id += 1;
}
g_stream->st_id_sel = map_pipe_dtype[j].st_id;
st_en = (map_pipe_dtype[j].addr ==
MAX9295_PIPE_X_DT_ADDR) ?
0xC0 : 0x40;
max9295_write_reg(dev, map_pipe_dtype[j].addr,
(st_en | map_pipe_dtype[j].val));
}
}
}
for (i = 0; i < g_ctx->num_streams; i++)
if (g_ctx->streams[i].st_id_sel != GMSL_ST_ID_UNUSED)
port_sel |= (1 << g_ctx->streams[i].st_id_sel);
if (g_ctx->src_csi_port == GMSL_CSI_PORT_B) {
st_pipe = (MAX9295_PIPE_X_START_B | MAX9295_PIPE_Y_START_B |
MAX9295_PIPE_Z_START_B | MAX9295_PIPE_U_START_B);
port_sel |= (MAX9295_EN_LINE_INFO | MAX9295_START_PORT_B);
} else {
st_pipe = MAX9295_PIPE_X_START_A | MAX9295_PIPE_Y_START_A |
MAX9295_PIPE_Z_START_A | MAX9295_PIPE_U_START_A;
port_sel |= (MAX9295_EN_LINE_INFO | MAX9295_START_PORT_A);
}
pipe_en = (MAX9295_VID_TX_EN_X | MAX9295_VID_TX_EN_Y |
MAX9295_VID_TX_EN_Z | MAX9295_VID_TX_EN_U | MAX9295_VID_INIT);
max9295_write_reg(dev, MAX9295_START_PIPE_ADDR, st_pipe);
max9295_write_reg(dev, MAX9295_CSI_PORT_SEL_ADDR, port_sel);
max9295_write_reg(dev, MAX9295_PIPE_EN_ADDR, pipe_en);
priv->g_client.st_done = true;
error:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9295_setup_streaming);
int max9295_setup_control(struct device *dev)
{
struct max9295 *priv = dev_get_drvdata(dev);
int err = 0;
struct gmsl_link_ctx *g_ctx;
u32 offset1 = 0;
u32 offset2 = 0;
u32 i;
u8 i2c_ovrd[] = {
0x6B, 0x10,
0x73, 0x11,
0x7B, 0x30,
0x83, 0x30,
0x93, 0x30,
0x9B, 0x30,
0xA3, 0x30,
0xAB, 0x30,
0x8B, 0x30,
};
u8 addr_offset[] = {
0x80, 0x00, 0x00,
0x84, 0x00, 0x01,
0xC0, 0x02, 0x02,
0xC4, 0x02, 0x03,
};
mutex_lock(&priv->lock);
if (!priv->g_client.g_ctx) {
dev_err(dev, "%s: no sensor dev client found\n", __func__);
err = -EINVAL;
goto error;
}
g_ctx = priv->g_client.g_ctx;
if (prim_priv__) {
/* update address reassingment */
max9295_write_reg(&prim_priv__->i2c_client->dev,
MAX9295_DEV_ADDR, (g_ctx->ser_reg << 1));
}
if (g_ctx->serdes_csi_link == GMSL_SERDES_CSI_LINK_A)
err = max9295_write_reg(dev, MAX9295_CTRL0_ADDR, 0x21);
else
err = max9295_write_reg(dev, MAX9295_CTRL0_ADDR, 0x22);
/* check if serializer device exists */
if (err) {
dev_err(dev, "%s: ERROR: ser device not found\n", __func__);
goto error;
}
/* delay to settle link */
msleep(100);
for (i = 0; i < ARRAY_SIZE(addr_offset); i += 3) {
if ((g_ctx->ser_reg << 1) == addr_offset[i]) {
offset1 = addr_offset[i+1];
offset2 = addr_offset[i+2];
break;
}
}
if (i == ARRAY_SIZE(addr_offset)) {
dev_err(dev, "%s: invalid ser slave address\n", __func__);
err = -EINVAL;
goto error;
}
for (i = 0; i < ARRAY_SIZE(i2c_ovrd); i += 2) {
/* update address overrides */
i2c_ovrd[i+1] += (i < 4) ? offset1 : offset2;
/* i2c passthrough2 must be configured once for all devices */
if ((i2c_ovrd[i] == 0x8B) && prim_priv__ &&
prim_priv__->pst2_ref)
continue;
max9295_write_reg(dev, i2c_ovrd[i], i2c_ovrd[i+1]);
}
/* dev addr pass-through2 ref */
if (prim_priv__)
prim_priv__->pst2_ref++;
max9295_write_reg(dev, MAX9295_I2C4_ADDR, (g_ctx->sdev_reg << 1));
max9295_write_reg(dev, MAX9295_I2C5_ADDR, (g_ctx->sdev_def << 1));
max9295_write_reg(dev, MAX9295_SRC_PWDN_ADDR, MAX9295_PWDN_GPIO);
max9295_write_reg(dev, MAX9295_SRC_CTRL_ADDR, MAX9295_RESET_SRC);
max9295_write_reg(dev, MAX9295_SRC_OUT_RCLK_ADDR, MAX9295_SRC_RCLK);
g_ctx->serdev_found = true;
error:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9295_setup_control);
int max9295_reset_control(struct device *dev)
{
struct max9295 *priv = dev_get_drvdata(dev);
int err = 0;
mutex_lock(&priv->lock);
if (!priv->g_client.g_ctx) {
dev_err(dev, "%s: no sdev client found\n", __func__);
err = -EINVAL;
goto error;
}
priv->g_client.st_done = false;
if (prim_priv__) {
prim_priv__->pst2_ref--;
max9295_write_reg(dev, MAX9295_DEV_ADDR,
(prim_priv__->def_addr << 1));
max9295_write_reg(&prim_priv__->i2c_client->dev,
MAX9295_CTRL0_ADDR, MAX9295_RESET_ALL);
}
error:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9295_reset_control);
int max9295_sdev_pair(struct device *dev, struct gmsl_link_ctx *g_ctx)
{
struct max9295 *priv;
int err = 0;
if (!dev || !g_ctx || !g_ctx->s_dev) {
dev_err(dev, "%s: invalid input params\n", __func__);
return -EINVAL;
}
priv = dev_get_drvdata(dev);
mutex_lock(&priv->lock);
if (priv->g_client.g_ctx) {
dev_err(dev, "%s: device already paired\n", __func__);
err = -EINVAL;
goto error;
}
priv->g_client.st_done = false;
priv->g_client.g_ctx = g_ctx;
error:
mutex_unlock(&priv->lock);
return 0;
}
EXPORT_SYMBOL(max9295_sdev_pair);
int max9295_sdev_unpair(struct device *dev, struct device *s_dev)
{
struct max9295 *priv = NULL;
int err = 0;
if (!dev || !s_dev) {
dev_err(dev, "%s: invalid input params\n", __func__);
return -EINVAL;
}
priv = dev_get_drvdata(dev);
mutex_lock(&priv->lock);
if (!priv->g_client.g_ctx) {
dev_err(dev, "%s: device is not paired\n", __func__);
err = -ENOMEM;
goto error;
}
if (priv->g_client.g_ctx->s_dev != s_dev) {
dev_err(dev, "%s: invalid device\n", __func__);
err = -EINVAL;
goto error;
}
priv->g_client.g_ctx = NULL;
priv->g_client.st_done = false;
error:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9295_sdev_unpair);
static struct regmap_config max9295_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
};
static int max9295_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct max9295 *priv;
int err = 0;
struct device_node *node = client->dev.of_node;
dev_info(&client->dev, "[MAX9295]: probing GMSL Serializer\n");
priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
priv->i2c_client = client;
priv->regmap = devm_regmap_init_i2c(priv->i2c_client,
&max9295_regmap_config);
if (IS_ERR(priv->regmap)) {
dev_err(&client->dev,
"regmap init failed: %ld\n", PTR_ERR(priv->regmap));
return -ENODEV;
}
mutex_init(&priv->lock);
if (of_get_property(node, "is-prim-ser", NULL)) {
if (prim_priv__) {
dev_err(&client->dev,
"prim-ser already exists\n");
return -EEXIST;
}
err = of_property_read_u32(node, "reg", &priv->def_addr);
if (err < 0) {
dev_err(&client->dev, "reg not found\n");
return -EINVAL;
}
prim_priv__ = priv;
}
dev_set_drvdata(&client->dev, priv);
/* dev communication gets validated when GMSL link setup is done */
dev_info(&client->dev, "%s: success\n", __func__);
return err;
}
#if (KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE)
static int max9295_remove(struct i2c_client *client)
#else
static void max9295_remove(struct i2c_client *client)
#endif
{
struct max9295 *priv;
if (client != NULL) {
priv = dev_get_drvdata(&client->dev);
mutex_destroy(&priv->lock);
i2c_unregister_device(client);
client = NULL;
}
#if (KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE)
return 0;
#endif
}
static const struct i2c_device_id max9295_id[] = {
{ "max9295", 0 },
{ },
};
static const struct of_device_id max9295_of_match[] = {
{ .compatible = "maxim,max9295", },
{ },
};
MODULE_DEVICE_TABLE(of, max9295_of_match);
MODULE_DEVICE_TABLE(i2c, max9295_id);
static struct i2c_driver max9295_i2c_driver = {
.driver = {
.name = "max9295",
.owner = THIS_MODULE,
},
.probe = max9295_probe,
.remove = max9295_remove,
.id_table = max9295_id,
};
module_i2c_driver(max9295_i2c_driver);
MODULE_DESCRIPTION("GMSL Serializer driver max9295");
MODULE_AUTHOR("Sudhir Vyas <svyas@nvidia.com>");
MODULE_LICENSE("GPL v2");

932
drivers/media/i2c/max9296.c Normal file
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@@ -0,0 +1,932 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/*
* max9296.c - max9296 GMSL Deserializer driver
*/
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <media/camera_common.h>
#include <linux/module.h>
#include <media/max9296.h>
/* register specifics */
#define MAX9296_DST_CSI_MODE_ADDR 0x330
#define MAX9296_LANE_MAP1_ADDR 0x333
#define MAX9296_LANE_MAP2_ADDR 0x334
#define MAX9296_LANE_CTRL0_ADDR 0x40A
#define MAX9296_LANE_CTRL1_ADDR 0x44A
#define MAX9296_LANE_CTRL2_ADDR 0x48A
#define MAX9296_LANE_CTRL3_ADDR 0x4CA
#define MAX9296_TX11_PIPE_X_EN_ADDR 0x40B
#define MAX9296_TX45_PIPE_X_DST_CTRL_ADDR 0x42D
#define MAX9296_PIPE_X_SRC_0_MAP_ADDR 0x40D
#define MAX9296_PIPE_X_DST_0_MAP_ADDR 0x40E
#define MAX9296_PIPE_X_SRC_1_MAP_ADDR 0x40F
#define MAX9296_PIPE_X_DST_1_MAP_ADDR 0x410
#define MAX9296_PIPE_X_SRC_2_MAP_ADDR 0x411
#define MAX9296_PIPE_X_DST_2_MAP_ADDR 0x412
#define MAX9296_PIPE_X_ST_SEL_ADDR 0x50
#define MAX9296_PWDN_PHYS_ADDR 0x332
#define MAX9296_PHY1_CLK_ADDR 0x320
#define MAX9296_CTRL0_ADDR 0x10
/* data defines */
#define MAX9296_CSI_MODE_4X2 0x1
#define MAX9296_CSI_MODE_2X4 0x4
#define MAX9296_LANE_MAP1_4X2 0x44
#define MAX9296_LANE_MAP2_4X2 0x44
#define MAX9296_LANE_MAP1_2X4 0x4E
#define MAX9296_LANE_MAP2_2X4 0xE4
#define MAX9296_LANE_CTRL_MAP(num_lanes) \
(((num_lanes) << 6) & 0xF0)
#define MAX9296_ALLPHYS_NOSTDBY 0xF0
#define MAX9296_ST_ID_SEL_INVALID 0xF
#define MAX9296_PHY1_CLK 0x2C
#define MAX9296_RESET_ALL 0x80
/* Dual GMSL MAX9296A/B */
#define MAX9296_MAX_SOURCES 2
#define MAX9296_MAX_PIPES 4
#define MAX9296_PIPE_X 0
#define MAX9296_PIPE_Y 1
#define MAX9296_PIPE_Z 2
#define MAX9296_PIPE_U 3
#define MAX9296_PIPE_INVALID 0xF
#define MAX9296_CSI_CTRL_0 0
#define MAX9296_CSI_CTRL_1 1
#define MAX9296_CSI_CTRL_2 2
#define MAX9296_CSI_CTRL_3 3
#define MAX9296_INVAL_ST_ID 0xFF
/* Use reset value as per spec, confirm with vendor */
#define MAX9296_RESET_ST_ID 0x00
struct max9296_source_ctx {
struct gmsl_link_ctx *g_ctx;
bool st_enabled;
};
struct pipe_ctx {
u32 id;
u32 dt_type;
u32 dst_csi_ctrl;
u32 st_count;
u32 st_id_sel;
};
struct max9296 {
struct i2c_client *i2c_client;
struct regmap *regmap;
u32 num_src;
u32 max_src;
u32 num_src_found;
u32 src_link;
bool splitter_enabled;
struct max9296_source_ctx sources[MAX9296_MAX_SOURCES];
struct mutex lock;
u32 sdev_ref;
bool lane_setup;
bool link_setup;
struct pipe_ctx pipe[MAX9296_MAX_PIPES];
u8 csi_mode;
u8 lane_mp1;
u8 lane_mp2;
int reset_gpio;
int pw_ref;
struct regulator *vdd_cam_1v2;
};
static int max9296_write_reg(struct device *dev,
u16 addr, u8 val)
{
struct max9296 *priv;
int err;
priv = dev_get_drvdata(dev);
err = regmap_write(priv->regmap, addr, val);
if (err)
dev_err(dev,
"%s:i2c write failed, 0x%x = %x\n",
__func__, addr, val);
/* delay before next i2c command as required for SERDES link */
usleep_range(100, 110);
return err;
}
static int max9296_get_sdev_idx(struct device *dev,
struct device *s_dev, unsigned int *idx)
{
struct max9296 *priv = dev_get_drvdata(dev);
unsigned int i;
int err = 0;
mutex_lock(&priv->lock);
for (i = 0; i < priv->max_src; i++) {
if (priv->sources[i].g_ctx->s_dev == s_dev)
break;
}
if (i == priv->max_src) {
dev_err(dev, "no sdev found\n");
err = -EINVAL;
goto ret;
}
if (idx)
*idx = i;
ret:
mutex_unlock(&priv->lock);
return err;
}
static void max9296_pipes_reset(struct max9296 *priv)
{
/*
* This is default pipes combination. add more mappings
* for other combinations and requirements.
*/
struct pipe_ctx pipe_defaults[] = {
{MAX9296_PIPE_X, GMSL_CSI_DT_RAW_12,
MAX9296_CSI_CTRL_1, 0, MAX9296_INVAL_ST_ID},
{MAX9296_PIPE_Y, GMSL_CSI_DT_RAW_12,
MAX9296_CSI_CTRL_1, 0, MAX9296_INVAL_ST_ID},
{MAX9296_PIPE_Z, GMSL_CSI_DT_EMBED,
MAX9296_CSI_CTRL_1, 0, MAX9296_INVAL_ST_ID},
{MAX9296_PIPE_U, GMSL_CSI_DT_EMBED,
MAX9296_CSI_CTRL_1, 0, MAX9296_INVAL_ST_ID}
};
/*
* Add DT props for num-streams and stream sequence, and based on that
* set the appropriate pipes defaults.
* For now default it supports "2 RAW12 and 2 EMBED" 1:1 mappings.
*/
memcpy(priv->pipe, pipe_defaults, sizeof(pipe_defaults));
}
static void max9296_reset_ctx(struct max9296 *priv)
{
unsigned int i;
priv->link_setup = false;
priv->lane_setup = false;
priv->num_src_found = 0;
priv->src_link = 0;
priv->splitter_enabled = false;
max9296_pipes_reset(priv);
for (i = 0; i < priv->num_src; i++)
priv->sources[i].st_enabled = false;
}
int max9296_power_on(struct device *dev)
{
struct max9296 *priv = dev_get_drvdata(dev);
int err = 0;
mutex_lock(&priv->lock);
if (priv->pw_ref == 0) {
usleep_range(1, 2);
if (priv->reset_gpio)
gpio_set_value(priv->reset_gpio, 0);
usleep_range(30, 50);
if (priv->vdd_cam_1v2) {
err = regulator_enable(priv->vdd_cam_1v2);
if (unlikely(err))
goto ret;
}
usleep_range(30, 50);
/*exit reset mode: XCLR */
if (priv->reset_gpio) {
gpio_set_value(priv->reset_gpio, 0);
usleep_range(30, 50);
gpio_set_value(priv->reset_gpio, 1);
usleep_range(30, 50);
}
/* delay to settle reset */
msleep(20);
}
priv->pw_ref++;
ret:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9296_power_on);
void max9296_power_off(struct device *dev)
{
struct max9296 *priv = dev_get_drvdata(dev);
mutex_lock(&priv->lock);
priv->pw_ref--;
if (priv->pw_ref == 0) {
/* enter reset mode: XCLR */
usleep_range(1, 2);
if (priv->reset_gpio)
gpio_set_value(priv->reset_gpio, 0);
if (priv->vdd_cam_1v2)
regulator_disable(priv->vdd_cam_1v2);
}
mutex_unlock(&priv->lock);
}
EXPORT_SYMBOL(max9296_power_off);
static int max9296_write_link(struct device *dev, u32 link)
{
if (link == GMSL_SERDES_CSI_LINK_A) {
max9296_write_reg(dev, MAX9296_CTRL0_ADDR, 0x01);
max9296_write_reg(dev, MAX9296_CTRL0_ADDR, 0x21);
} else if (link == GMSL_SERDES_CSI_LINK_B) {
max9296_write_reg(dev, MAX9296_CTRL0_ADDR, 0x02);
max9296_write_reg(dev, MAX9296_CTRL0_ADDR, 0x22);
} else {
dev_err(dev, "%s: invalid gmsl link\n", __func__);
return -EINVAL;
}
/* delay to settle link */
msleep(100);
return 0;
}
int max9296_setup_link(struct device *dev, struct device *s_dev)
{
struct max9296 *priv = dev_get_drvdata(dev);
int err = 0;
unsigned int i = 0;
err = max9296_get_sdev_idx(dev, s_dev, &i);
if (err)
return err;
mutex_lock(&priv->lock);
if (!priv->splitter_enabled) {
err = max9296_write_link(dev,
priv->sources[i].g_ctx->serdes_csi_link);
if (err)
goto ret;
priv->link_setup = true;
}
ret:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9296_setup_link);
int max9296_setup_control(struct device *dev, struct device *s_dev)
{
struct max9296 *priv = dev_get_drvdata(dev);
int err = 0;
unsigned int i = 0;
err = max9296_get_sdev_idx(dev, s_dev, &i);
if (err)
return err;
mutex_lock(&priv->lock);
if (!priv->link_setup) {
dev_err(dev, "%s: invalid state\n", __func__);
err = -EINVAL;
goto error;
}
if (priv->sources[i].g_ctx->serdev_found) {
priv->num_src_found++;
priv->src_link = priv->sources[i].g_ctx->serdes_csi_link;
}
/* Enable splitter mode */
if ((priv->max_src > 1U) &&
(priv->num_src_found > 0U) &&
(priv->splitter_enabled == false)) {
max9296_write_reg(dev, MAX9296_CTRL0_ADDR, 0x03);
max9296_write_reg(dev, MAX9296_CTRL0_ADDR, 0x23);
priv->splitter_enabled = true;
/* delay to settle link */
msleep(100);
}
max9296_write_reg(dev,
MAX9296_PWDN_PHYS_ADDR, MAX9296_ALLPHYS_NOSTDBY);
priv->sdev_ref++;
/* Reset splitter mode if all devices are not found */
if ((priv->sdev_ref == priv->max_src) &&
(priv->splitter_enabled == true) &&
(priv->num_src_found > 0U) &&
(priv->num_src_found < priv->max_src)) {
err = max9296_write_link(dev, priv->src_link);
if (err)
goto error;
priv->splitter_enabled = false;
}
error:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9296_setup_control);
int max9296_reset_control(struct device *dev, struct device *s_dev)
{
struct max9296 *priv = dev_get_drvdata(dev);
mutex_lock(&priv->lock);
if (!priv->sdev_ref) {
dev_info(dev, "%s: dev is already in reset state\n", __func__);
goto ret;
}
priv->sdev_ref--;
if (priv->sdev_ref == 0) {
max9296_reset_ctx(priv);
max9296_write_reg(dev, MAX9296_CTRL0_ADDR, MAX9296_RESET_ALL);
/* delay to settle reset */
msleep(100);
}
ret:
mutex_unlock(&priv->lock);
return 0;
}
EXPORT_SYMBOL(max9296_reset_control);
int max9296_sdev_register(struct device *dev, struct gmsl_link_ctx *g_ctx)
{
struct max9296 *priv = NULL;
unsigned int i;
int err = 0;
if (!dev || !g_ctx || !g_ctx->s_dev) {
dev_err(dev, "%s: invalid input params\n", __func__);
return -EINVAL;
}
priv = dev_get_drvdata(dev);
mutex_lock(&priv->lock);
if (priv->num_src > priv->max_src) {
dev_err(dev,
"%s: MAX9296 inputs size exhausted\n", __func__);
err = -ENOMEM;
goto error;
}
/* Check csi mode compatibility */
if (!((priv->csi_mode == MAX9296_CSI_MODE_2X4) ?
((g_ctx->csi_mode == GMSL_CSI_1X4_MODE) ||
(g_ctx->csi_mode == GMSL_CSI_2X4_MODE)) :
((g_ctx->csi_mode == GMSL_CSI_2X2_MODE) ||
(g_ctx->csi_mode == GMSL_CSI_4X2_MODE)))) {
dev_err(dev,
"%s: csi mode not supported\n", __func__);
err = -EINVAL;
goto error;
}
for (i = 0; i < priv->num_src; i++) {
if (g_ctx->serdes_csi_link ==
priv->sources[i].g_ctx->serdes_csi_link) {
dev_err(dev,
"%s: serdes csi link is in use\n", __func__);
err = -EINVAL;
goto error;
}
/*
* All sdevs should have same num-csi-lanes regardless of
* dst csi port selected.
* Later if there is any usecase which requires each port
* to be configured with different num-csi-lanes, then this
* check should be performed per port.
*/
if (g_ctx->num_csi_lanes !=
priv->sources[i].g_ctx->num_csi_lanes) {
dev_err(dev,
"%s: csi num lanes mismatch\n", __func__);
err = -EINVAL;
goto error;
}
}
priv->sources[priv->num_src].g_ctx = g_ctx;
priv->sources[priv->num_src].st_enabled = false;
priv->num_src++;
error:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9296_sdev_register);
int max9296_sdev_unregister(struct device *dev, struct device *s_dev)
{
struct max9296 *priv = NULL;
int err = 0;
unsigned int i = 0;
if (!dev || !s_dev) {
dev_err(dev, "%s: invalid input params\n", __func__);
return -EINVAL;
}
priv = dev_get_drvdata(dev);
mutex_lock(&priv->lock);
if (priv->num_src == 0) {
dev_err(dev, "%s: no source found\n", __func__);
err = -ENODATA;
goto error;
}
for (i = 0; i < priv->num_src; i++) {
if (s_dev == priv->sources[i].g_ctx->s_dev) {
priv->sources[i].g_ctx = NULL;
break;
}
}
if (i == priv->num_src) {
dev_err(dev,
"%s: requested device not found\n", __func__);
err = -EINVAL;
goto error;
}
priv->num_src--;
error:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9296_sdev_unregister);
static int max9296_get_available_pipe(struct device *dev,
u32 st_data_type, u32 dst_csi_port)
{
struct max9296 *priv = dev_get_drvdata(dev);
int i;
for (i = 0; i < MAX9296_MAX_PIPES; i++) {
/*
* TODO: Enable a pipe for multi stream configuration having
* similar stream data type. For now use st_count as a flag
* for 1 to 1 mapping in pipe and stream data type, same can
* be extended as count for many to 1 mapping. Would also need
* few more checks such as input stream id select, dst port etc.
*/
if ((priv->pipe[i].dt_type == st_data_type) &&
((dst_csi_port == GMSL_CSI_PORT_A) ?
(priv->pipe[i].dst_csi_ctrl ==
MAX9296_CSI_CTRL_0) ||
(priv->pipe[i].dst_csi_ctrl ==
MAX9296_CSI_CTRL_1) :
(priv->pipe[i].dst_csi_ctrl ==
MAX9296_CSI_CTRL_2) ||
(priv->pipe[i].dst_csi_ctrl ==
MAX9296_CSI_CTRL_3)) &&
(!priv->pipe[i].st_count))
break;
}
if (i == MAX9296_MAX_PIPES) {
dev_err(dev, "%s: all pipes are busy\n", __func__);
return -ENOMEM;
}
return i;
}
struct reg_pair {
u16 addr;
u8 val;
};
static int max9296_setup_pipeline(struct device *dev,
struct gmsl_link_ctx *g_ctx)
{
struct max9296 *priv = dev_get_drvdata(dev);
struct gmsl_stream *g_stream;
struct reg_pair *map_list;
u32 arr_sz = 0;
int pipe_id = 0;
u32 i = 0;
u32 j = 0;
u32 vc_idx = 0;
for (i = 0; i < g_ctx->num_streams; i++) {
/* Base data type mapping: pipeX/RAW12/CSICNTR1 */
struct reg_pair map_pipe_raw12[] = {
/* addr, val */
{MAX9296_TX11_PIPE_X_EN_ADDR, 0x7},
{MAX9296_TX45_PIPE_X_DST_CTRL_ADDR, 0x15},
{MAX9296_PIPE_X_SRC_0_MAP_ADDR, 0x2C},
{MAX9296_PIPE_X_DST_0_MAP_ADDR, 0x2C},
{MAX9296_PIPE_X_SRC_1_MAP_ADDR, 0x00},
{MAX9296_PIPE_X_DST_1_MAP_ADDR, 0x00},
{MAX9296_PIPE_X_SRC_2_MAP_ADDR, 0x01},
{MAX9296_PIPE_X_DST_2_MAP_ADDR, 0x01},
};
/* Base data type mapping: pipeX/EMBED/CSICNTR1 */
struct reg_pair map_pipe_embed[] = {
/* addr, val */
{MAX9296_TX11_PIPE_X_EN_ADDR, 0x7},
{MAX9296_TX45_PIPE_X_DST_CTRL_ADDR, 0x15},
{MAX9296_PIPE_X_SRC_0_MAP_ADDR, 0x12},
{MAX9296_PIPE_X_DST_0_MAP_ADDR, 0x12},
{MAX9296_PIPE_X_SRC_1_MAP_ADDR, 0x00},
{MAX9296_PIPE_X_DST_1_MAP_ADDR, 0x00},
{MAX9296_PIPE_X_SRC_2_MAP_ADDR, 0x01},
{MAX9296_PIPE_X_DST_2_MAP_ADDR, 0x01},
};
g_stream = &g_ctx->streams[i];
g_stream->des_pipe = MAX9296_PIPE_INVALID;
if (g_stream->st_data_type == GMSL_CSI_DT_RAW_12) {
map_list = map_pipe_raw12;
arr_sz = ARRAY_SIZE(map_pipe_raw12);
} else if (g_stream->st_data_type == GMSL_CSI_DT_EMBED) {
map_list = map_pipe_embed;
arr_sz = ARRAY_SIZE(map_pipe_embed);
} else if (g_stream->st_data_type == GMSL_CSI_DT_UED_U1) {
dev_dbg(dev,
"%s: No mapping for GMSL_CSI_DT_UED_U1\n",
__func__);
continue;
} else {
dev_err(dev, "%s: Invalid data type\n", __func__);
return -EINVAL;
}
pipe_id = max9296_get_available_pipe(dev,
g_stream->st_data_type, g_ctx->dst_csi_port);
if (pipe_id < 0)
return pipe_id;
for (j = 0, vc_idx = 3; j < arr_sz; j++, vc_idx += 2) {
/* update pipe configuration */
map_list[j].addr += (0x40 * pipe_id);
/* update vc id configuration */
if (vc_idx < arr_sz)
map_list[vc_idx].val |=
(g_ctx->dst_vc << 6);
max9296_write_reg(dev, map_list[j].addr,
map_list[j].val);
}
/* Set stream id select input */
if (g_stream->st_id_sel == GMSL_ST_ID_UNUSED) {
dev_err(dev, "%s: Invalid stream st_id_sel\n",
__func__);
return -EINVAL;
}
g_stream->des_pipe = MAX9296_PIPE_X_ST_SEL_ADDR + pipe_id;
/* Update pipe internals */
priv->pipe[pipe_id].st_count++;
priv->pipe[pipe_id].st_id_sel = g_stream->st_id_sel;
}
return 0;
}
int max9296_start_streaming(struct device *dev, struct device *s_dev)
{
struct max9296 *priv = dev_get_drvdata(dev);
struct gmsl_link_ctx *g_ctx;
struct gmsl_stream *g_stream;
int err = 0;
unsigned int i = 0;
err = max9296_get_sdev_idx(dev, s_dev, &i);
if (err)
return err;
mutex_lock(&priv->lock);
g_ctx = priv->sources[i].g_ctx;
for (i = 0; i < g_ctx->num_streams; i++) {
g_stream = &g_ctx->streams[i];
if (g_stream->des_pipe != MAX9296_PIPE_INVALID)
max9296_write_reg(dev, g_stream->des_pipe,
g_stream->st_id_sel);
}
mutex_unlock(&priv->lock);
return 0;
}
EXPORT_SYMBOL(max9296_start_streaming);
int max9296_stop_streaming(struct device *dev, struct device *s_dev)
{
struct max9296 *priv = dev_get_drvdata(dev);
struct gmsl_link_ctx *g_ctx;
struct gmsl_stream *g_stream;
int err = 0;
unsigned int i = 0;
err = max9296_get_sdev_idx(dev, s_dev, &i);
if (err)
return err;
mutex_lock(&priv->lock);
g_ctx = priv->sources[i].g_ctx;
for (i = 0; i < g_ctx->num_streams; i++) {
g_stream = &g_ctx->streams[i];
if (g_stream->des_pipe != MAX9296_PIPE_INVALID)
max9296_write_reg(dev, g_stream->des_pipe,
MAX9296_RESET_ST_ID);
}
mutex_unlock(&priv->lock);
return 0;
}
EXPORT_SYMBOL(max9296_stop_streaming);
int max9296_setup_streaming(struct device *dev, struct device *s_dev)
{
struct max9296 *priv = dev_get_drvdata(dev);
struct gmsl_link_ctx *g_ctx;
int err = 0;
unsigned int i = 0;
u16 lane_ctrl_addr;
err = max9296_get_sdev_idx(dev, s_dev, &i);
if (err)
return err;
mutex_lock(&priv->lock);
if (priv->sources[i].st_enabled)
goto ret;
g_ctx = priv->sources[i].g_ctx;
err = max9296_setup_pipeline(dev, g_ctx);
if (err)
goto ret;
/* Derive CSI lane map register */
switch (g_ctx->dst_csi_port) {
case GMSL_CSI_PORT_A:
case GMSL_CSI_PORT_D:
lane_ctrl_addr = MAX9296_LANE_CTRL1_ADDR;
break;
case GMSL_CSI_PORT_B:
case GMSL_CSI_PORT_E:
lane_ctrl_addr = MAX9296_LANE_CTRL2_ADDR;
break;
case GMSL_CSI_PORT_C:
lane_ctrl_addr = MAX9296_LANE_CTRL0_ADDR;
break;
case GMSL_CSI_PORT_F:
lane_ctrl_addr = MAX9296_LANE_CTRL3_ADDR;
break;
default:
dev_err(dev, "%s: invalid gmsl csi port!\n", __func__);
err = -EINVAL;
goto ret;
};
/*
* rewrite num_lanes to same dst port should not be an issue,
* as the device compatibility is already
* checked during sdev registration against the des properties.
*/
max9296_write_reg(dev, lane_ctrl_addr,
MAX9296_LANE_CTRL_MAP(g_ctx->num_csi_lanes-1));
if (!priv->lane_setup) {
max9296_write_reg(dev,
MAX9296_DST_CSI_MODE_ADDR, priv->csi_mode);
max9296_write_reg(dev,
MAX9296_LANE_MAP1_ADDR, priv->lane_mp1);
max9296_write_reg(dev,
MAX9296_LANE_MAP2_ADDR, priv->lane_mp2);
max9296_write_reg(dev,
MAX9296_PHY1_CLK_ADDR, MAX9296_PHY1_CLK);
priv->lane_setup = true;
}
priv->sources[i].st_enabled = true;
ret:
mutex_unlock(&priv->lock);
return err;
}
EXPORT_SYMBOL(max9296_setup_streaming);
static const struct of_device_id max9296_of_match[] = {
{ .compatible = "maxim,max9296", },
{ },
};
MODULE_DEVICE_TABLE(of, max9296_of_match);
static int max9296_parse_dt(struct max9296 *priv,
struct i2c_client *client)
{
struct device_node *node = client->dev.of_node;
int err = 0;
const char *str_value;
int value;
const struct of_device_id *match;
if (!node)
return -EINVAL;
match = of_match_device(max9296_of_match, &client->dev);
if (!match) {
dev_err(&client->dev, "Failed to find matching dt id\n");
return -EFAULT;
}
err = of_property_read_string(node, "csi-mode", &str_value);
if (err < 0) {
dev_err(&client->dev, "csi-mode property not found\n");
return err;
}
if (!strcmp(str_value, "2x4")) {
priv->csi_mode = MAX9296_CSI_MODE_2X4;
priv->lane_mp1 = MAX9296_LANE_MAP1_2X4;
priv->lane_mp2 = MAX9296_LANE_MAP2_2X4;
} else if (!strcmp(str_value, "4x2")) {
priv->csi_mode = MAX9296_CSI_MODE_4X2;
priv->lane_mp1 = MAX9296_LANE_MAP1_4X2;
priv->lane_mp2 = MAX9296_LANE_MAP2_4X2;
} else {
dev_err(&client->dev, "invalid csi mode\n");
return -EINVAL;
}
err = of_property_read_u32(node, "max-src", &value);
if (err < 0) {
dev_err(&client->dev, "No max-src info\n");
return err;
}
priv->max_src = value;
priv->reset_gpio = of_get_named_gpio(node, "reset-gpios", 0);
if (priv->reset_gpio < 0) {
dev_err(&client->dev, "reset-gpios not found %d\n", err);
return err;
}
/* digital 1.2v */
if (of_get_property(node, "vdd_cam_1v2-supply", NULL)) {
priv->vdd_cam_1v2 = regulator_get(&client->dev, "vdd_cam_1v2");
if (IS_ERR(priv->vdd_cam_1v2)) {
dev_err(&client->dev,
"vdd_cam_1v2 regulator get failed\n");
err = PTR_ERR(priv->vdd_cam_1v2);
priv->vdd_cam_1v2 = NULL;
return err;
}
} else {
priv->vdd_cam_1v2 = NULL;
}
return 0;
}
static struct regmap_config max9296_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
};
static int max9296_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct max9296 *priv;
int err = 0;
dev_info(&client->dev, "[MAX9296]: probing GMSL Deserializer\n");
priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
priv->i2c_client = client;
priv->regmap = devm_regmap_init_i2c(priv->i2c_client,
&max9296_regmap_config);
if (IS_ERR(priv->regmap)) {
dev_err(&client->dev,
"regmap init failed: %ld\n", PTR_ERR(priv->regmap));
return -ENODEV;
}
err = max9296_parse_dt(priv, client);
if (err) {
dev_err(&client->dev, "unable to parse dt\n");
return -EFAULT;
}
max9296_pipes_reset(priv);
if (priv->max_src > MAX9296_MAX_SOURCES) {
dev_err(&client->dev,
"max sources more than currently supported\n");
return -EINVAL;
}
mutex_init(&priv->lock);
dev_set_drvdata(&client->dev, priv);
/* dev communication gets validated when GMSL link setup is done */
dev_info(&client->dev, "%s: success\n", __func__);
return 0;
}
#if (KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE)
static int max9296_remove(struct i2c_client *client)
#else
static void max9296_remove(struct i2c_client *client)
#endif
{
struct max9296 *priv;
if (client != NULL) {
priv = dev_get_drvdata(&client->dev);
mutex_destroy(&priv->lock);
i2c_unregister_device(client);
client = NULL;
}
#if (KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE)
return 0;
#endif
}
static const struct i2c_device_id max9296_id[] = {
{ "max9296", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, max9296_id);
static struct i2c_driver max9296_i2c_driver = {
.driver = {
.name = "max9296",
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(max9296_of_match),
},
.probe = max9296_probe,
.remove = max9296_remove,
.id_table = max9296_id,
};
module_i2c_driver(max9296_i2c_driver);
MODULE_DESCRIPTION("Dual GMSL Deserializer driver max9296");
MODULE_AUTHOR("Sudhir Vyas <svyas@nvidia.com");
MODULE_LICENSE("GPL v2");

900
drivers/media/i2c/nv_imx390.c Normal file
View File

@@ -0,0 +1,900 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/seq_file.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <media/max9295.h>
#include <media/max9296.h>
#include <media/tegracam_core.h>
#include "imx390_mode_tbls.h"
#define IMX390_MIN_GAIN (0)
#define IMX390_MAX_GAIN (30)
#define IMX390_MAX_GAIN_REG ((IMX390_MAX_GAIN - IMX390_MIN_GAIN) * 10 / 3)
#define IMX390_DEFAULT_FRAME_LENGTH (1125)
#define IMX390_FRAME_LENGTH_ADDR_MSB 0x200A
#define IMX390_FRAME_LENGTH_ADDR_MID 0x2009
#define IMX390_FRAME_LENGTH_ADDR_LSB 0x2008
#define IMX390_COARSE_TIME_SHS1_ADDR_MSB 0x000E
#define IMX390_COARSE_TIME_SHS1_ADDR_MID 0x000D
#define IMX390_COARSE_TIME_SHS1_ADDR_LSB 0x000C
#define IMX390_COARSE_TIME_SHS2_ADDR_MSB 0x0012
#define IMX390_COARSE_TIME_SHS2_ADDR_MID 0x0011
#define IMX390_COARSE_TIME_SHS2_ADDR_LSB 0x0010
#define IMX390_GROUP_HOLD_ADDR 0x0008
#define IMX390_ANALOG_GAIN_SP1H_ADDR 0x0018
#define IMX390_ANALOG_GAIN_SP1L_ADDR 0x001A
static const struct of_device_id imx390_of_match[] = {
{ .compatible = "sony,imx390",},
{ },
};
MODULE_DEVICE_TABLE(of, imx390_of_match);
static const u32 ctrl_cid_list[] = {
TEGRA_CAMERA_CID_GAIN,
TEGRA_CAMERA_CID_EXPOSURE,
TEGRA_CAMERA_CID_EXPOSURE_SHORT,
TEGRA_CAMERA_CID_FRAME_RATE,
TEGRA_CAMERA_CID_HDR_EN,
};
struct imx390 {
struct i2c_client *i2c_client;
const struct i2c_device_id *id;
struct v4l2_subdev *subdev;
struct device *ser_dev;
struct device *dser_dev;
struct gmsl_link_ctx g_ctx;
u32 frame_length;
struct camera_common_data *s_data;
struct tegracam_device *tc_dev;
};
static const struct regmap_config sensor_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
};
static inline void imx390_get_frame_length_regs(imx390_reg *regs,
u32 frame_length)
{
regs->addr = IMX390_FRAME_LENGTH_ADDR_MSB;
regs->val = (frame_length >> 16) & 0x01;
(regs + 1)->addr = IMX390_FRAME_LENGTH_ADDR_MID;
(regs + 1)->val = (frame_length >> 8) & 0xff;
(regs + 2)->addr = IMX390_FRAME_LENGTH_ADDR_LSB;
(regs + 2)->val = (frame_length) & 0xff;
}
static inline void imx390_get_coarse_time_regs_shs1(imx390_reg *regs,
u32 coarse_time)
{
regs->addr = IMX390_COARSE_TIME_SHS1_ADDR_MSB;
regs->val = (coarse_time >> 16) & 0x0f;
(regs + 1)->addr = IMX390_COARSE_TIME_SHS1_ADDR_MID;
(regs + 1)->val = (coarse_time >> 8) & 0xff;
(regs + 2)->addr = IMX390_COARSE_TIME_SHS1_ADDR_LSB;
(regs + 2)->val = (coarse_time) & 0xff;
}
static inline void imx390_get_coarse_time_regs_shs2(imx390_reg *regs,
u32 coarse_time)
{
regs->addr = IMX390_COARSE_TIME_SHS2_ADDR_MSB;
regs->val = (coarse_time >> 16) & 0x0f;
(regs + 1)->addr = IMX390_COARSE_TIME_SHS2_ADDR_MID;
(regs + 1)->val = (coarse_time >> 8) & 0xff;
(regs + 2)->addr = IMX390_COARSE_TIME_SHS2_ADDR_LSB;
(regs + 2)->val = (coarse_time) & 0xff;
}
static inline void imx390_get_gain_reg(imx390_reg *regs,
u16 gain)
{
regs->addr = IMX390_ANALOG_GAIN_SP1H_ADDR;
regs->val = (gain) & 0xff;
(regs + 1)->addr = IMX390_ANALOG_GAIN_SP1H_ADDR + 1;
(regs + 1)->val = (gain >> 8) & 0xff;
(regs + 2)->addr = IMX390_ANALOG_GAIN_SP1L_ADDR;
(regs + 2)->val = (gain) & 0xff;
(regs + 3)->addr = IMX390_ANALOG_GAIN_SP1L_ADDR + 1;
(regs + 3)->val = (gain >> 8) & 0xff;
}
static int test_mode;
module_param(test_mode, int, 0644);
static inline int imx390_read_reg(struct camera_common_data *s_data,
u16 addr, u8 *val)
{
int err = 0;
u32 reg_val = 0;
err = regmap_read(s_data->regmap, addr, &reg_val);
*val = reg_val & 0xFF;
return err;
}
static int imx390_write_reg(struct camera_common_data *s_data,
u16 addr, u8 val)
{
int err;
struct device *dev = s_data->dev;
err = regmap_write(s_data->regmap, addr, val);
if (err)
dev_err(dev, "%s:i2c write failed, 0x%x = %x\n",
__func__, addr, val);
return err;
}
static int imx390_write_table(struct imx390 *priv,
const imx390_reg table[])
{
struct camera_common_data *s_data = priv->s_data;
return regmap_util_write_table_8(s_data->regmap,
table,
NULL, 0,
IMX390_TABLE_WAIT_MS,
IMX390_TABLE_END);
}
static struct mutex serdes_lock__;
static int imx390_gmsl_serdes_setup(struct imx390 *priv)
{
int err = 0;
int des_err = 0;
struct device *dev;
if (!priv || !priv->ser_dev || !priv->dser_dev || !priv->i2c_client)
return -EINVAL;
dev = &priv->i2c_client->dev;
mutex_lock(&serdes_lock__);
/* For now no separate power on required for serializer device */
max9296_power_on(priv->dser_dev);
/* setup serdes addressing and control pipeline */
err = max9296_setup_link(priv->dser_dev, &priv->i2c_client->dev);
if (err) {
dev_err(dev, "gmsl deserializer link config failed\n");
goto error;
}
err = max9295_setup_control(priv->ser_dev);
/* proceed even if ser setup failed, to setup deser correctly */
if (err)
dev_err(dev, "gmsl serializer setup failed\n");
des_err = max9296_setup_control(priv->dser_dev, &priv->i2c_client->dev);
if (des_err) {
dev_err(dev, "gmsl deserializer setup failed\n");
/* overwrite err only if deser setup also failed */
err = des_err;
}
error:
mutex_unlock(&serdes_lock__);
return err;
}
static void imx390_gmsl_serdes_reset(struct imx390 *priv)
{
mutex_lock(&serdes_lock__);
/* reset serdes addressing and control pipeline */
max9295_reset_control(priv->ser_dev);
max9296_reset_control(priv->dser_dev, &priv->i2c_client->dev);
max9296_power_off(priv->dser_dev);
mutex_unlock(&serdes_lock__);
}
static int imx390_power_on(struct camera_common_data *s_data)
{
int err = 0;
struct camera_common_power_rail *pw = s_data->power;
struct camera_common_pdata *pdata = s_data->pdata;
struct device *dev = s_data->dev;
dev_dbg(dev, "%s: power on\n", __func__);
if (pdata && pdata->power_on) {
err = pdata->power_on(pw);
if (err)
dev_err(dev, "%s failed.\n", __func__);
else
pw->state = SWITCH_ON;
return err;
}
pw->state = SWITCH_ON;
return 0;
}
static int imx390_power_off(struct camera_common_data *s_data)
{
int err = 0;
struct camera_common_power_rail *pw = s_data->power;
struct camera_common_pdata *pdata = s_data->pdata;
struct device *dev = s_data->dev;
dev_dbg(dev, "%s:\n", __func__);
if (pdata && pdata->power_off) {
err = pdata->power_off(pw);
if (!err)
goto power_off_done;
else
dev_err(dev, "%s failed.\n", __func__);
return err;
}
power_off_done:
pw->state = SWITCH_OFF;
return 0;
}
static int imx390_power_get(struct tegracam_device *tc_dev)
{
struct device *dev = tc_dev->dev;
struct camera_common_data *s_data = tc_dev->s_data;
struct camera_common_power_rail *pw = s_data->power;
struct camera_common_pdata *pdata = s_data->pdata;
const char *mclk_name;
const char *parentclk_name;
struct clk *parent;
int err = 0;
mclk_name = pdata->mclk_name ?
pdata->mclk_name : "cam_mclk1";
pw->mclk = devm_clk_get(dev, mclk_name);
if (IS_ERR(pw->mclk)) {
dev_err(dev, "unable to get clock %s\n", mclk_name);
return PTR_ERR(pw->mclk);
}
parentclk_name = pdata->parentclk_name;
if (parentclk_name) {
parent = devm_clk_get(dev, parentclk_name);
if (IS_ERR(parent)) {
dev_err(dev, "unable to get parent clcok %s",
parentclk_name);
} else {
err = clk_set_parent(pw->mclk, parent);
if (err < 0)
dev_dbg(dev,
"%s failed to set parent clock %d\n",
__func__, err);
}
}
pw->state = SWITCH_OFF;
return err;
}
static int imx390_power_put(struct tegracam_device *tc_dev)
{
struct camera_common_data *s_data = tc_dev->s_data;
struct camera_common_power_rail *pw = s_data->power;
if (unlikely(!pw))
return -EFAULT;
return 0;
}
static int imx390_set_group_hold(struct tegracam_device *tc_dev, bool val)
{
struct camera_common_data *s_data = tc_dev->s_data;
struct device *dev = tc_dev->dev;
int err;
err = imx390_write_reg(s_data,
IMX390_GROUP_HOLD_ADDR, val);
if (err) {
dev_dbg(dev,
"%s: Group hold control error\n", __func__);
return err;
}
return 0;
}
static int imx390_set_gain(struct tegracam_device *tc_dev, s64 val)
{
struct camera_common_data *s_data = tc_dev->s_data;
struct device *dev = tc_dev->dev;
const struct sensor_mode_properties *mode =
&s_data->sensor_props.sensor_modes[s_data->mode_prop_idx];
imx390_reg reg_list[4];
int err, i;
u16 gain;
gain = (u16)(val / mode->control_properties.step_gain_val);
dev_dbg(dev, "%s: db: %d\n", __func__, gain);
if (gain > IMX390_MAX_GAIN_REG)
gain = IMX390_MAX_GAIN_REG;
imx390_get_gain_reg(reg_list, gain);
for (i = 0; i < 4; i++) {
err = imx390_write_reg(s_data, reg_list[i].addr,
reg_list[i].val);
if (err)
goto fail;
}
return 0;
fail:
dev_info(dev, "%s: GAIN control error\n", __func__);
return err;
}
static int imx390_set_frame_rate(struct tegracam_device *tc_dev, s64 val)
{
struct imx390 *priv = (struct imx390 *)tegracam_get_privdata(tc_dev);
/* fixed 30fps */
priv->frame_length = IMX390_DEFAULT_FRAME_LENGTH;
return 0;
}
static int imx390_set_exposure(struct tegracam_device *tc_dev, s64 val)
{
struct imx390 *priv = (struct imx390 *)tegracam_get_privdata(tc_dev);
struct camera_common_data *s_data = tc_dev->s_data;
const struct sensor_mode_properties *mode =
&s_data->sensor_props.sensor_modes[s_data->mode];
imx390_reg reg_list[3];
int err;
u32 coarse_time;
u32 shs1;
int i = 0;
if (priv->frame_length == 0)
priv->frame_length = IMX390_DEFAULT_FRAME_LENGTH;
/* coarse time in lines */
coarse_time = (u32) (val * s_data->frmfmt[s_data->mode].framerates[0] *
priv->frame_length / mode->control_properties.exposure_factor);
shs1 = priv->frame_length - coarse_time;
/* 0 and 1 are prohibited */
if (shs1 < 2)
shs1 = 2;
imx390_get_coarse_time_regs_shs1(reg_list, shs1);
for (i = 0; i < 3; i++) {
err = imx390_write_reg(priv->s_data, reg_list[i].addr,
reg_list[i].val);
if (err)
goto fail;
}
imx390_get_coarse_time_regs_shs2(reg_list, shs1);
for (i = 0; i < 3; i++) {
err = imx390_write_reg(priv->s_data, reg_list[i].addr,
reg_list[i].val);
if (err)
goto fail;
}
return 0;
fail:
dev_dbg(&priv->i2c_client->dev,
"%s: set coarse time error\n", __func__);
return err;
}
static struct tegracam_ctrl_ops imx390_ctrl_ops = {
.numctrls = ARRAY_SIZE(ctrl_cid_list),
.ctrl_cid_list = ctrl_cid_list,
.set_gain = imx390_set_gain,
.set_exposure = imx390_set_exposure,
.set_exposure_short = imx390_set_exposure,
.set_frame_rate = imx390_set_frame_rate,
.set_group_hold = imx390_set_group_hold,
};
static struct camera_common_pdata
*imx390_parse_dt(struct tegracam_device *tc_dev)
{
struct device *dev = tc_dev->dev;
struct device_node *node = dev->of_node;
struct camera_common_pdata *board_priv_pdata;
const struct of_device_id *match;
int err;
if (!node)
return NULL;
match = of_match_device(imx390_of_match, dev);
if (!match) {
dev_err(dev, "Failed to find matching dt id\n");
return NULL;
}
board_priv_pdata = devm_kzalloc(dev,
sizeof(*board_priv_pdata), GFP_KERNEL);
err = of_property_read_string(node, "mclk",
&board_priv_pdata->mclk_name);
if (err)
dev_err(dev, "mclk not in DT\n");
return board_priv_pdata;
}
static int imx390_set_mode(struct tegracam_device *tc_dev)
{
struct imx390 *priv = (struct imx390 *)tegracam_get_privdata(tc_dev);
struct camera_common_data *s_data = tc_dev->s_data;
struct device *dev = tc_dev->dev;
const struct of_device_id *match;
match = of_match_device(imx390_of_match, dev);
if (!match) {
dev_err(dev, "Failed to find matching dt id\n");
return -EINVAL;
}
if (s_data->mode_prop_idx < 0)
return -EINVAL;
return imx390_write_table(priv, mode_table[s_data->mode_prop_idx]);
}
static int imx390_start_streaming(struct tegracam_device *tc_dev)
{
struct imx390 *priv = (struct imx390 *)tegracam_get_privdata(tc_dev);
struct device *dev = tc_dev->dev;
int err;
/* enable serdes streaming */
err = max9295_setup_streaming(priv->ser_dev);
if (err)
goto exit;
err = max9296_setup_streaming(priv->dser_dev, dev);
if (err)
goto exit;
err = max9296_start_streaming(priv->dser_dev, dev);
if (err)
goto exit;
err = imx390_write_table(priv,
mode_table[IMX390_MODE_START_STREAM]);
if (err)
return err;
msleep(20);
return 0;
exit:
dev_err(dev, "%s: error setting stream\n", __func__);
return err;
}
static int imx390_stop_streaming(struct tegracam_device *tc_dev)
{
struct device *dev = tc_dev->dev;
struct imx390 *priv = (struct imx390 *)tegracam_get_privdata(tc_dev);
/* disable serdes streaming */
max9296_stop_streaming(priv->dser_dev, dev);
return imx390_write_table(priv, mode_table[IMX390_MODE_STOP_STREAM]);
}
static struct camera_common_sensor_ops imx390_common_ops = {
.numfrmfmts = ARRAY_SIZE(imx390_frmfmt),
.frmfmt_table = imx390_frmfmt,
.power_on = imx390_power_on,
.power_off = imx390_power_off,
.write_reg = imx390_write_reg,
.read_reg = imx390_read_reg,
.parse_dt = imx390_parse_dt,
.power_get = imx390_power_get,
.power_put = imx390_power_put,
.set_mode = imx390_set_mode,
.start_streaming = imx390_start_streaming,
.stop_streaming = imx390_stop_streaming,
};
static int imx390_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
dev_dbg(&client->dev, "%s:\n", __func__);
return 0;
}
static const struct v4l2_subdev_internal_ops imx390_subdev_internal_ops = {
.open = imx390_open,
};
static int imx390_board_setup(struct imx390 *priv)
{
struct tegracam_device *tc_dev = priv->tc_dev;
struct device *dev = tc_dev->dev;
struct device_node *node = dev->of_node;
struct device_node *ser_node;
struct i2c_client *ser_i2c = NULL;
struct device_node *dser_node;
struct i2c_client *dser_i2c = NULL;
struct device_node *gmsl;
int value = 0xFFFF;
const char *str_value;
const char *str_value1[2];
int i;
int err;
err = of_property_read_u32(node, "reg", &priv->g_ctx.sdev_reg);
if (err < 0) {
dev_err(dev, "reg not found\n");
goto error;
}
err = of_property_read_u32(node, "def-addr",
&priv->g_ctx.sdev_def);
if (err < 0) {
dev_err(dev, "def-addr not found\n");
goto error;
}
ser_node = of_parse_phandle(node, "nvidia,gmsl-ser-device", 0);
if (ser_node == NULL) {
dev_err(dev,
"missing %s handle\n",
"nvidia,gmsl-ser-device");
err = -EINVAL;
goto error;
}
err = of_property_read_u32(ser_node, "reg", &priv->g_ctx.ser_reg);
if (err < 0) {
dev_err(dev, "serializer reg not found\n");
goto error;
}
ser_i2c = of_find_i2c_device_by_node(ser_node);
of_node_put(ser_node);
if (ser_i2c == NULL) {
err = -EPROBE_DEFER;
goto error;
}
if (ser_i2c->dev.driver == NULL) {
dev_err(dev, "missing serializer driver\n");
err = -EINVAL;
goto error;
}
priv->ser_dev = &ser_i2c->dev;
dser_node = of_parse_phandle(node, "nvidia,gmsl-dser-device", 0);
if (dser_node == NULL) {
dev_err(dev,
"missing %s handle\n",
"nvidia,gmsl-dser-device");
err = -EINVAL;
goto error;
}
dser_i2c = of_find_i2c_device_by_node(dser_node);
of_node_put(dser_node);
if (dser_i2c == NULL) {
err = -EPROBE_DEFER;
goto error;
}
if (dser_i2c->dev.driver == NULL) {
dev_err(dev, "missing deserializer driver\n");
err = -EINVAL;
goto error;
}
priv->dser_dev = &dser_i2c->dev;
/* populate g_ctx from DT */
gmsl = of_get_child_by_name(node, "gmsl-link");
if (gmsl == NULL) {
dev_err(dev, "missing gmsl-link device node\n");
err = -EINVAL;
goto error;
}
err = of_property_read_string(gmsl, "dst-csi-port", &str_value);
if (err < 0) {
dev_err(dev, "No dst-csi-port found\n");
goto error;
}
priv->g_ctx.dst_csi_port =
(!strcmp(str_value, "a")) ? GMSL_CSI_PORT_A : GMSL_CSI_PORT_B;
err = of_property_read_string(gmsl, "src-csi-port", &str_value);
if (err < 0) {
dev_err(dev, "No src-csi-port found\n");
goto error;
}
priv->g_ctx.src_csi_port =
(!strcmp(str_value, "a")) ? GMSL_CSI_PORT_A : GMSL_CSI_PORT_B;
err = of_property_read_string(gmsl, "csi-mode", &str_value);
if (err < 0) {
dev_err(dev, "No csi-mode found\n");
goto error;
}
if (!strcmp(str_value, "1x4")) {
priv->g_ctx.csi_mode = GMSL_CSI_1X4_MODE;
} else if (!strcmp(str_value, "2x4")) {
priv->g_ctx.csi_mode = GMSL_CSI_2X4_MODE;
} else if (!strcmp(str_value, "4x2")) {
priv->g_ctx.csi_mode = GMSL_CSI_4X2_MODE;
} else if (!strcmp(str_value, "2x2")) {
priv->g_ctx.csi_mode = GMSL_CSI_2X2_MODE;
} else {
dev_err(dev, "invalid csi mode\n");
err = -EINVAL;
goto error;
}
err = of_property_read_string(gmsl, "serdes-csi-link", &str_value);
if (err < 0) {
dev_err(dev, "No serdes-csi-link found\n");
goto error;
}
priv->g_ctx.serdes_csi_link =
(!strcmp(str_value, "a")) ?
GMSL_SERDES_CSI_LINK_A : GMSL_SERDES_CSI_LINK_B;
err = of_property_read_u32(gmsl, "st-vc", &value);
if (err < 0) {
dev_err(dev, "No st-vc info\n");
goto error;
}
priv->g_ctx.st_vc = value;
err = of_property_read_u32(gmsl, "vc-id", &value);
if (err < 0) {
dev_err(dev, "No vc-id info\n");
goto error;
}
priv->g_ctx.dst_vc = value;
err = of_property_read_u32(gmsl, "num-lanes", &value);
if (err < 0) {
dev_err(dev, "No num-lanes info\n");
goto error;
}
priv->g_ctx.num_csi_lanes = value;
priv->g_ctx.num_streams =
of_property_count_strings(gmsl, "streams");
if (priv->g_ctx.num_streams <= 0) {
dev_err(dev, "No streams found\n");
err = -EINVAL;
goto error;
}
for (i = 0; i < priv->g_ctx.num_streams; i++) {
of_property_read_string_index(gmsl, "streams", i,
&str_value1[i]);
if (!str_value1[i]) {
dev_err(dev, "invalid stream info\n");
err = -EINVAL;
goto error;
}
if (!strcmp(str_value1[i], "raw12")) {
priv->g_ctx.streams[i].st_data_type =
GMSL_CSI_DT_RAW_12;
} else if (!strcmp(str_value1[i], "embed")) {
priv->g_ctx.streams[i].st_data_type =
GMSL_CSI_DT_EMBED;
} else if (!strcmp(str_value1[i], "ued-u1")) {
priv->g_ctx.streams[i].st_data_type =
GMSL_CSI_DT_UED_U1;
} else {
dev_err(dev, "invalid stream data type\n");
err = -EINVAL;
goto error;
}
}
priv->g_ctx.s_dev = dev;
return 0;
error:
return err;
}
static int imx390_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct device *dev = &client->dev;
struct device_node *node = dev->of_node;
struct tegracam_device *tc_dev;
struct imx390 *priv;
int err;
dev_info(dev, "probing v4l2 sensor.\n");
if (!IS_ENABLED(CONFIG_OF) || !node)
return -EINVAL;
priv = devm_kzalloc(dev, sizeof(struct imx390), GFP_KERNEL);
if (!priv)
return -ENOMEM;
tc_dev = devm_kzalloc(dev,
sizeof(struct tegracam_device), GFP_KERNEL);
if (!tc_dev)
return -ENOMEM;
priv->i2c_client = tc_dev->client = client;
tc_dev->dev = dev;
strscpy(tc_dev->name, "imx390", sizeof(tc_dev->name));
tc_dev->dev_regmap_config = &sensor_regmap_config;
tc_dev->sensor_ops = &imx390_common_ops;
tc_dev->v4l2sd_internal_ops = &imx390_subdev_internal_ops;
tc_dev->tcctrl_ops = &imx390_ctrl_ops;
err = tegracam_device_register(tc_dev);
if (err) {
dev_err(dev, "tegra camera driver registration failed\n");
return err;
}
priv->tc_dev = tc_dev;
priv->s_data = tc_dev->s_data;
priv->subdev = &tc_dev->s_data->subdev;
tegracam_set_privdata(tc_dev, (void *)priv);
err = imx390_board_setup(priv);
if (err) {
tegracam_device_unregister(tc_dev);
dev_err(dev, "board setup failed\n");
return err;
}
mutex_init(&serdes_lock__);
/* Pair sensor to serializer dev */
err = max9295_sdev_pair(priv->ser_dev, &priv->g_ctx);
if (err) {
dev_err(&client->dev, "gmsl ser pairing failed\n");
return err;
}
/* Register sensor to deserializer dev */
err = max9296_sdev_register(priv->dser_dev, &priv->g_ctx);
if (err) {
dev_err(&client->dev, "gmsl deserializer register failed\n");
return err;
}
/*
* gmsl serdes setup
*
* Sensor power on/off should be the right place for serdes
* setup/reset. But the problem is, the total required delay
* in serdes setup/reset exceeds the frame wait timeout, looks to
* be related to multiple channel open and close sequence
* issue (#BUG 200477330).
* Once this bug is fixed, these may be moved to power on/off.
* The delays in serdes is as per guidelines and can't be reduced,
* so it is placed in probe/remove, though for that, deserializer
* would be powered on always post boot, until 1.2v is supplied
* to deserializer from CVB.
*/
err = imx390_gmsl_serdes_setup(priv);
if (err) {
dev_err(&client->dev,
"%s gmsl serdes setup failed\n", __func__);
return err;
}
err = tegracam_v4l2subdev_register(tc_dev, true);
if (err) {
dev_err(dev, "tegra camera subdev registration failed\n");
return err;
}
dev_info(&client->dev, "Detected IMX390 sensor\n");
return 0;
}
#if (KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE)
static int imx390_remove(struct i2c_client *client)
#else
static void imx390_remove(struct i2c_client *client)
#endif
{
struct camera_common_data *s_data = to_camera_common_data(&client->dev);
struct imx390 *priv;
if (!s_data)
#if (KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE)
return -EINVAL;
#else
return;
#endif
priv = (struct imx390 *)s_data->priv;
imx390_gmsl_serdes_reset(priv);
mutex_destroy(&serdes_lock__);
tegracam_v4l2subdev_unregister(priv->tc_dev);
tegracam_device_unregister(priv->tc_dev);
#if (KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE)
return 0;
#endif
}
static const struct i2c_device_id imx390_id[] = {
{ "imx390", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, imx390_id);
static struct i2c_driver imx390_i2c_driver = {
.driver = {
.name = "imx390",
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(imx390_of_match),
},
.probe = imx390_probe,
.remove = imx390_remove,
.id_table = imx390_id,
};
module_i2c_driver(imx390_i2c_driver);
MODULE_DESCRIPTION("Media Controller driver for Sony IMX390");
MODULE_AUTHOR("NVIDIA Corporation");
MODULE_AUTHOR("Sudhir Vyas <svyas@nvidia.com");
MODULE_LICENSE("GPL v2");