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ufs: Add support for VSP

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Added support for VSP

Bug 3977186

Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Change-Id: If59dc2e0512b08f40a8b6dd3eef02c1bcf2004cb
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3078740
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Mallikarjun Kasoju
2024-02-16 18:02:34 +00:00
committed by mobile promotions
parent f0538cd58d
commit 3c36bb896e
2 changed files with 28 additions and 1 deletions
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21
drivers/scsi/ufs/ufs-tegra-common.c
View File

@@ -59,6 +59,9 @@ static void ufs_tegra_init_debugfs(struct ufs_hba *hba)
static void ufs_tegra_set_clk_div(struct ufs_hba *hba)
{
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
return;
if (tegra_sku_info.platform == TEGRA_PLATFORM_SYSTEM_FPGA)
ufshcd_writel(hba, UFS_VNDR_HCLKDIV_1US_TICK_FPGA, REG_UFS_VNDR_HCLKDIV);
else
@@ -69,6 +72,9 @@ static void ufs_tegra_ufs_mmio_axi(struct ufs_hba *hba)
{
u32 mask = GENMASK(15, 13);
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
return;
ufshcd_rmwl(hba, mask, VS_BURSTMBLCONFIG, VS_BURSTMBLREGISTER);
}
@@ -79,6 +85,9 @@ static int ufs_tegra_host_clk_get(struct device *dev,
struct clk *clk;
int err = 0;
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
return 0;
clk = devm_clk_get(dev, name);
if (IS_ERR(clk)) {
err = PTR_ERR(clk);
@@ -155,6 +164,9 @@ static int ufs_tegra_mphy_receiver_calibration(struct ufs_tegra_host *ufs_tegra,
if (tegra_sku_info.platform == TEGRA_PLATFORM_SYSTEM_FPGA)
return 0;
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
return 0;
if (ufs_tegra->enable_mphy_rx_calib)
return 0;
@@ -608,6 +620,9 @@ static int ufs_tegra_ufs_reset_init(struct ufs_tegra_host *ufs_tegra)
struct device *dev = ufs_tegra->hba->dev;
int ret = 0;
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
return 0;
ufs_tegra->ufs_rst = devm_reset_control_get(dev, "ufs-rst");
if (IS_ERR(ufs_tegra->ufs_rst)) {
ret = PTR_ERR(ufs_tegra->ufs_rst);
@@ -1044,6 +1059,9 @@ static int ufs_tegra_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
if (tegra_sku_info.platform == TEGRA_PLATFORM_VDK)
goto end;
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
goto end;
/*
* Disable ufs, mphy tx/rx lane clocks if they are on
* and assert the reset
@@ -1795,6 +1813,9 @@ static int ufs_tegra_init(struct ufs_hba *hba)
if (tegra_sku_info.platform == TEGRA_PLATFORM_VDK)
goto aux_init;
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
goto out;
err = ufs_tegra_init_ufs_clks(ufs_tegra);
if (err)
goto out_host_free;

8
drivers/scsi/ufs/ufs-tegra.h
View File

@@ -1,11 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only
*/
// Copyright (c) 2015-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
// Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#ifndef _UFS_TEGRA_H
#define _UFS_TEGRA_H
#include <linux/io.h>
#include <soc/tegra/fuse.h>
#define NV_ADDRESS_MAP_MPHY_L0_BASE 0x02470000
#define NV_ADDRESS_MAP_MPHY_L1_BASE 0x02480000
@@ -412,12 +413,17 @@ static inline u32 mphy_readl(void __iomem *mphy_base, u32 offset)
{
u32 val;
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
return 0;
val = readl(mphy_base + offset);
return val;
}
static inline void mphy_writel(void __iomem *mphy_base, u32 val, u32 offset)
{
if (tegra_sku_info.platform == TEGRA_PLATFORM_VSP)
return;
writel(val, mphy_base + offset);
}