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platform: nvadsp: adsp_cpu_abus to set freq on t21x

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Using adsp_cpu_abus which is a virtual clk (ADSP_CPU_ABUS clock) to set
frequency on t21x platform. Earlier the physical ADSP clk was used which
only provides a constant frequency.

Bug 1955157

Change-Id: Ifcf42b50a543a95e934e651e68056cb1c8d6c654
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1520261
(cherry picked from commit c1c8d713cd723b20f890cfbd205e38a90007e847)
Reviewed-on: https://git-master.nvidia.com/r/1542708
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
This commit is contained in:
Ajay Nandakumar
2017-07-14 11:06:44 +05:30
committed by Laxman Dewangan
parent 9b73ee3d3e
commit 3fbe739b6f
4 changed files with 39 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
drivers/platform/tegra/nvadsp/adsp_dfs.c
View File

@@ -99,6 +99,7 @@ struct adsp_dfs_policy {
struct clk *adsp_clk;
struct clk *aclk_clk;
struct clk *adsp_cpu_abus_clk;
struct notifier_block rate_change_nb;
struct nvadsp_mbox mbox;
@@ -153,11 +154,7 @@ static int adsp_clk_get(struct adsp_dfs_policy *policy)
struct device_node *node = device->of_node;
int ret = 0;
if (IS_ENABLED(CONFIG_COMMON_CLK))
policy->adsp_clk = devm_clk_get(device, "adsp");
else
policy->adsp_clk = clk_get_sys(NULL, policy->clk_name);
policy->adsp_clk = devm_clk_get(device, "adsp");
if (IS_ERR_OR_NULL(policy->adsp_clk)) {
dev_err(device, "unable to find adsp clock\n");
ret = PTR_ERR(policy->adsp_clk);
@@ -170,6 +167,14 @@ static int adsp_clk_get(struct adsp_dfs_policy *policy)
dev_err(device, "unable to find aclk clock\n");
ret = PTR_ERR(policy->aclk_clk);
}
} else {
policy->adsp_cpu_abus_clk =
devm_clk_get(device, "adsp_cpu_abus");
if (IS_ERR_OR_NULL(policy->adsp_cpu_abus_clk)) {
dev_err(device, "unable to find adsp cpu abus clock\n");
ret = PTR_ERR(policy->adsp_cpu_abus_clk);
}
}
return ret;
@@ -177,12 +182,11 @@ static int adsp_clk_get(struct adsp_dfs_policy *policy)
static void adsp_clk_put(struct adsp_dfs_policy *policy)
{
if (policy->adsp_clk) {
if (IS_ENABLED(CONFIG_COMMON_CLK))
devm_clk_put(device, policy->adsp_clk);
else
clk_put(policy->adsp_clk);
}
if (policy->adsp_cpu_abus_clk)
devm_clk_put(device, policy->adsp_cpu_abus_clk);
if (policy->adsp_clk)
devm_clk_put(device, policy->adsp_clk);
if (policy->aclk_clk)
devm_clk_put(device, policy->aclk_clk);
@@ -195,7 +199,7 @@ static int adsp_clk_set_rate(struct adsp_dfs_policy *policy,
int ret;
if (of_device_is_compatible(node, "nvidia,tegra210-adsp"))
ret = clk_set_rate(policy->adsp_clk, freq_hz);
ret = clk_set_rate(policy->adsp_cpu_abus_clk, freq_hz);
else
ret = clk_set_rate(policy->aclk_clk, freq_hz);

20
drivers/platform/tegra/nvadsp/dev-t21x.c
View File

@@ -37,7 +37,12 @@ static void nvadsp_clocks_disable(struct platform_device *pdev)
clk_disable_unprepare(drv_data->adsp_clk);
dev_dbg(dev, "adsp clocks disabled\n");
drv_data->adsp_clk = NULL;
drv_data->adsp_cpu_clk = NULL;
}
if (drv_data->adsp_cpu_abus_clk) {
clk_disable_unprepare(drv_data->adsp_cpu_abus_clk);
dev_dbg(dev, "adsp cpu abus clock disabled\n");
drv_data->adsp_cpu_abus_clk = NULL;
}
if (drv_data->adsp_neon_clk) {
@@ -95,7 +100,18 @@ static int nvadsp_clocks_enable(struct platform_device *pdev)
dev_err(dev, "unable to enable adsp clock\n");
goto end;
}
drv_data->adsp_cpu_clk = drv_data->adsp_clk;
drv_data->adsp_cpu_abus_clk = devm_clk_get(dev, "adsp_cpu_abus");
if (IS_ERR_OR_NULL(drv_data->adsp_cpu_abus_clk)) {
dev_err(dev, "unable to find adsp cpu abus clock\n");
ret = PTR_ERR(drv_data->adsp_cpu_abus_clk);
goto end;
}
ret = clk_prepare_enable(drv_data->adsp_cpu_abus_clk);
if (ret) {
dev_err(dev, "unable to enable adsp cpu abus clock\n");
goto end;
}
drv_data->adsp_neon_clk = devm_clk_get(dev, "adspneon");
if (IS_ERR_OR_NULL(drv_data->adsp_neon_clk)) {

2
drivers/platform/tegra/nvadsp/dev.h
View File

@@ -161,7 +161,7 @@ struct nvadsp_drv_data {
struct clk *apb2ape_clk;
struct clk *adsp_clk;
struct clk *aclk_clk;
struct clk *adsp_cpu_clk;
struct clk *adsp_cpu_abus_clk;
struct clk *adsp_neon_clk;
struct clk *ape_emc_clk;
struct clk *uartape_clk;

8
drivers/platform/tegra/nvadsp/os.c
View File

@@ -828,7 +828,7 @@ static int nvadsp_t210_set_clks_and_prescalar(struct nvadsp_drv_data *drv_data)
adsp_freq = drv_data->adsp_freq * 1000; /* in Hz*/
max_adsp_freq = clk_round_rate(drv_data->adsp_cpu_clk,
max_adsp_freq = clk_round_rate(drv_data->adsp_cpu_abus_clk,
ULONG_MAX);
max_index = max_adsp_freq / MIN_ADSP_FREQ;
cur_index = adsp_freq / MIN_ADSP_FREQ;
@@ -856,7 +856,7 @@ static int nvadsp_t210_set_clks_and_prescalar(struct nvadsp_drv_data *drv_data)
adsp_freq = cur_index * MIN_ADSP_FREQ;
ret = clk_set_rate(drv_data->adsp_cpu_clk, adsp_freq);
ret = clk_set_rate(drv_data->adsp_cpu_abus_clk, adsp_freq);
if (ret)
goto end;
@@ -868,7 +868,7 @@ static int nvadsp_t210_set_clks_and_prescalar(struct nvadsp_drv_data *drv_data)
end:
dev_dbg(dev, "adsp cpu freq %luKHz\n",
clk_get_rate(drv_data->adsp_cpu_clk) / 1000);
clk_get_rate(drv_data->adsp_cpu_abus_clk) / 1000);
dev_dbg(dev, "timer prescalar %x\n", os_args->timer_prescalar);
return ret;
@@ -983,7 +983,7 @@ static int nvadsp_set_boot_freqs(struct nvadsp_drv_data *drv_data)
return 0;
if (of_device_is_compatible(node, "nvidia,tegra210-adsp")) {
if (drv_data->adsp_cpu_clk) {
if (drv_data->adsp_cpu_abus_clk) {
ret = nvadsp_t210_set_clks_and_prescalar(drv_data);
if (ret)
goto end;