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nvethernet: Don't stop PHY RXC in LPI

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Issue:
To save more power PHY RXC will be disabled when PHY in LPI state by
setting 10th bit in below register. This is standard PHY register.
- PCS Control 1 register (MMD device 3, Address 0x00)

When EEE enabled above register being programmed (10th bit got set) and
it created issue while accessing the MAC registers through indirect
addressing since RXC stopped from PHY.

Fix:
Don't stop RXC in LPI for Orin EQOS

Bug 200776300
Bug 200765092

Change-Id: I4150eebe8e2a5ab79ad5b7180232adad2331e315
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2599137
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Bhadram Varka
2021-09-23 08:44:54 +05:30
committed by Revanth Kumar Uppala
parent 40c8f17f0f
commit 44b74a383b
1 changed files with 4 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
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@@ -738,6 +738,7 @@ static int ether_enable_clks(struct ether_priv_data *pdata)
*/
int ether_conf_eee(struct ether_priv_data *pdata, unsigned int tx_lpi_enable)
{
struct osi_core_priv_data *osi_core = pdata->osi_core;
int ret = 0;
struct phy_device *phydev = pdata->phydev;
unsigned int enable = tx_lpi_enable;
@@ -745,7 +746,9 @@ int ether_conf_eee(struct ether_priv_data *pdata, unsigned int tx_lpi_enable)
if (tx_lpi_enable) {
/* phy_init_eee() returns 0 if EEE is supported by the PHY */
if (phy_init_eee(phydev, OSI_ENABLE)) {
if (phy_init_eee(phydev,
(osi_core->mac_ver == OSI_EQOS_MAC_5_30) ?
false : true)) {
/* PHY does not support EEE, disable it in MAC */
enable = OSI_DISABLE;
} else {