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kernel-nvidia-oot: Restrict enabling MACSec in PHY

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Restrict enabling MACSec support in below PHYs via MDIO

- MV-Q3244
- 88Q2221M

Jira NET-2795

Change-Id: I2cf767ad89762a5daa8ac29e753365af2e5d24fb
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3308513
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Narayana Reddy P <narayanr@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sanath Kumar Gampa
2025-02-24 08:59:42 +00:00
committed by Jon Hunter
parent 247613d6ce
commit 5193e86207
2 changed files with 82 additions and 2 deletions
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23
drivers/net/ethernet/nvidia/nvethernet/ether_linux.h
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@@ -1,5 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2019-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved */
/* SPDX-FileCopyrightText: Copyright (c) 2019-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef ETHER_LINUX_H
#define ETHER_LINUX_H
@@ -250,6 +263,12 @@
*/
#define FIXED_PHY_INVALID_MDIO_ADDR 0xFFU
/**
* @brief PHY register address to enable MACSEc feature in PHY
*/
#define MACSEC_REG_MVQ3244 0x401e002aU
#define MACSEC_REG_88Q2221M 0x401fa008U
#define ETHER_ADDRESS_32BIT 0
#define ETHER_ADDRESS_40BIT 1
#define ETHER_ADDRESS_48BIT 2
@@ -662,6 +681,8 @@ struct ether_priv_data {
int phy_reset_post_delay;
/** PHY reset duration delay */
int phy_reset_duration;
/** Pointer to the phy type being used */
const char *phy_str;
#ifdef ETHER_NVGRO
/** Master queue */
struct sk_buff_head mq;